 Stanislav Mekhanoshin
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10f786ca0f
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[AMDGPU] Change register type for v32 vectors
When it is AReg_1024 this results in unnecessary copying into
AGPRs of a 32 element vectors even though they are not intended
for an mfma instruction.
Differential Revision: https://reviews.llvm.org/D64815
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366252 91177308-0d34-0410-b5e6-96231b3b80d8
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2019-07-16 20:06:00 +00:00 |
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