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de36af4c15
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16857 Commits

Author SHA1 Message Date
Chris Lattner
de36af4c15 more simplifications. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119067 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-14 20:40:08 +00:00
Chris Lattner
112f2390e1 simplify and tidy up 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119066 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-14 20:31:06 +00:00
Chris Lattner
fdb2ded765 implement basic support for memory operands and crbit operands, 
this fixes 3 more ppc tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119065 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-14 20:22:56 +00:00
Chris Lattner
99889132f3 implement several trivial operand printers, reducing 
failures in CodeGen/PowerPC from 120 -> 117


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119063 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-14 20:11:21 +00:00
Chris Lattner
0d1b7d9e3d Implement support for printing register and immediate operands, 
add support for darwin vs aix syntax.  We now can print instructions
like this:

	add r3, r3, r4
	blr 

and (in aix mode):
	add 3, 3, 4
	blr 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119062 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-14 20:02:39 +00:00
Chris Lattner
293ef9ae0f stub out PPCMCInstLowering, add a new option that uses it and the new 
instprinter when -enable-ppc-inst-printer is passed to llc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119061 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-14 19:53:02 +00:00
Chris Lattner
60d5b5fdee stub out a powerpc MCInstPrinter implementation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119059 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-14 19:40:38 +00:00
Chris Lattner
1139691e3a move all the target's asmprinters into the main target. The piece 
that should be split out is the InstPrinter (if a target is mc'ized).
This change makes all the targets be consistent.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119056 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-14 18:43:56 +00:00
Chris Lattner
0094345184 move PPCAsmPrinter into the main PPC library, like ARM and X86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119054 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-14 18:33:33 +00:00
Chris Lattner
02bc19438f fix cmake 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119053 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-14 18:27:11 +00:00
Chris Lattner
c476ed93f1 remove JIT support from the Alpha backend. The JIT will be moving to MC, 
and the Alpha backend isn't MCized yet.  Approved by Andrew.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119051 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-14 18:24:41 +00:00
Chris Lattner
b0269cd2c8 random acts of tidiness. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119049 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-14 18:09:50 +00:00
Owen Anderson
83da6cd5e2 Second attempt at providing correct encodings for Thumb2 binary operators. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119029 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-14 05:37:38 +00:00
Peter Collingbourne
948cf0289f Recognise 32-bit ror-based bswap implementation used by uclibc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119007 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 19:54:30 +00:00
Peter Collingbourne
983611836c Support ; as asm separator 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119006 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 19:54:23 +00:00
Bill Wendling
c93989a060 Comment out the defms until they're activated. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119000 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 11:20:05 +00:00
Bill Wendling
ddc918b379 Add uses of the *_ldst_multi multiclasses. These aren't used yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118999 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 10:57:02 +00:00
Bill Wendling
1f4abcfa5c Convert the modes to lower case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118998 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 10:43:34 +00:00
Bill Wendling
04863d06fb Minor cleanups: 
- Get the opcode once.
- Add a ParserMatchClass to reglist.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118997 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 10:40:19 +00:00
Bill Wendling
6c470b806f Add *_ldst_mult multiclasses to the ARM back-end. These will be used in the 
future to separate out the ia, ib, da, db variants of the load/store multiple
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118995 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 09:09:38 +00:00
Daniel Dunbar
115a3dd066 MC: Simplify Mach-O and ELF object writer implementations. 
- What was I thinking?????

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118992 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 07:33:40 +00:00
Wesley Peck
90eff7337d Fixed error and re-enabled MBlaze MC disassembler tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118987 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 05:48:21 +00:00
Evan Cheng
c47f7d643e Conditional moves are slightly more expensive than moves. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118985 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 05:14:20 +00:00
Wesley Peck
ec57d53342 1. Adding test cases for MBlaze MC disassembler. 
2. Fixing several errors in disassembler uncovered by test cases.
3. Fixing invalid encoding of PCMPEQ and PCMPNE uncovered by test cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118969 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 02:37:59 +00:00
Evan Cheng
63f3544a7f Add conditional move of large immediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118968 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 02:25:14 +00:00
Jim Grosbach
df7e0f8d5d Swap multiclass operand order for consistency with other patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118965 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 01:28:30 +00:00
Jim Grosbach
0f6e33b0c8 Continue ARM indexed load refactoring. Multiclass for LDR{B} pre/post indexed 
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118963 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 01:07:20 +00:00
Jim Grosbach
9e0bfb5829 More ARM load/store indexed refactoring. Also fix an incorrect IndexMode 
flag for the LDRT/STRT family instructions as a side effect.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118955 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 00:35:48 +00:00
Dan Gohman
0e65eb2065 Revert r118917, which is implicated in the llvm-gcc-i386-linux-selfhost failure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118954 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 00:31:40 +00:00
Evan Cheng
e5e0ef180e Fix an obvious typo which inverted an immediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118951 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 00:27:47 +00:00
Wesley Peck
24d06f2be5 1. Adding missing immediate mode asm parser test cases. 
2. Fixing improper immediate mode reverse subtract.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118948 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-13 00:03:46 +00:00
Eric Christopher
84e86c0156 Temporarily revert this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118946 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 23:50:48 +00:00
Evan Cheng
11c11f8ab0 For pre-v6t2 targets, only select MOVi32imm if the immediate can be handled with movi + orr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118945 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 23:46:13 +00:00
Wesley Peck
8bfdd87714 Fixing improperly encoded reverse subtract instructions in MBlaze backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118943 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 23:41:10 +00:00
Owen Anderson
b9a643e2cd Revert r118939 while I work out why it broke some buildbots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118942 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 23:36:03 +00:00
Wesley Peck
41400da31e 1. Finishing MBlaze MC asm parser test cases 
2. Parsing .word directive in MBlaze asm parser
3. Fixing hack where memory instructions reversed order of last two parameters
4. Fixing many improperly encoded instructions
5. Support parsing special instructions (MFS,MTS,etc.)
6. Removing unused functions from inst printer


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118941 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 23:30:17 +00:00
Owen Anderson
7a6b810dcb Attemt to provide correct encodings for Thumb2 binary operators. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118939 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 23:18:11 +00:00
Evan Cheng
893d7fe209 Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either movi+orr or movw+movt depending on the subtarget. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118938 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 23:03:38 +00:00
Eric Christopher
c0394c0b8c Make this happen for ARM like x86. Don't entirely bail out when 
an address is in a different block, get it into a register and go
from there.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118936 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 22:52:32 +00:00
Evan Cheng
875a6ac09a Add conditional mvn instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118935 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 22:42:47 +00:00
Jim Grosbach
e1634e9351 Zap a copy/paste-o bit of dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118926 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 21:29:10 +00:00
Jim Grosbach
2716e25c2c Refactor to parameterize some ARM load/store encoding patterns. Preparatory 
to splitting the load/store pre/post indexed instructions into [r, r] and
[r, imm] forms.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118925 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 21:28:15 +00:00
Owen Anderson
5de6d841a5 First stab at providing correct Thumb2 encodings, start with adc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118924 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 21:12:40 +00:00
Evan Cheng
529916ca4a Add some missing isel predicates on def : pat patterns to avoid generating VFP vmla / vmls (they cause stalls). Disabling them in isel is properly not a right solution, I'll look into a proper solution next. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118922 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 20:32:20 +00:00
Jim Grosbach
b39e6488ee Kill more unused stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118921 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 19:27:45 +00:00
Jim Grosbach
a0a6a47c02 Remove unused class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118919 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 19:24:53 +00:00
Dan Gohman
52668c9a30 When the definition of an address value is in a different block 
from the user of the address, fall back to just using the
address in a register instead of bailing out of fast-isel
altogether.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118917 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 19:14:00 +00:00
Chris Lattner
269f10b316 accept lret as an alias for lretl, fixing the reopened part of PR8592 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118916 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 18:54:56 +00:00
Jim Grosbach
d75c3f136b Fill in the default predication bits for ARM unconditional branch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118907 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 18:13:26 +00:00
Jim Grosbach
80f9e6724f Encoding for ARM LDRSB instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118905 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 17:52:59 +00:00