Commit Graph

46556 Commits

Author SHA1 Message Date
Rafael Espindola 9aafb854cc Delete Default and JITDefault code models
IMHO it is an antipattern to have a enum value that is Default.

At any given piece of code it is not clear if we have to handle
Default or if has already been mapped to a concrete value. In this
case in particular, only the target can do the mapping and it is nice
to make sure it is always done.

This deletes the two default enum values of CodeModel and uses an
explicit Optional<CodeModel> when it is possible that it is
unspecified.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309911 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-03 02:16:21 +00:00
Dehao Chen ca9f2fdb19 Fix the bug when SampleProfileWriter writes out number of callsites.
Summary: As we support multiple callsites for the same location, we need to traverse all locations to get the number of callsites.

Reviewers: davidxl

Reviewed By: davidxl

Subscribers: sanjoy, llvm-commits

Differential Revision: https://reviews.llvm.org/D36246

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309907 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-03 00:09:18 +00:00
Vedant Kumar f6b53455df [llvm-cov] Respect the value of the -show-instantiations option
Make `-show-instantiations=false` actually skip displaying instantiation
sub-views, instead of simply ignoring the option.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309903 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 23:35:24 +00:00
Tom Stellard 58dd3a3775 AMDGPU/GlobalISel: Mark 32-bit G_FMUL as legal
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D36218

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309898 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 22:56:30 +00:00
Zachary Turner 50b0dc9e5b [pdb/lld] Write a valid FPM.
The PDB reserves certain blocks for the FPM that describe which
blocks in the file are allocated and which are free.  We weren't
filling that out at all, and in some cases we were even stomping
it with incorrect data.  This patch writes a correct FPM.

Differential Revision: https://reviews.llvm.org/D36235

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309896 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 22:31:39 +00:00
Zachary Turner 34173def44 [pdbutil] Add a command to dump the FPM.
Recently problems have been discovered in the way we write the FPM
(free page map).  In order to fix this, we first need to establish
a baseline about what a correct FPM looks like using an MSVC
generated PDB, so that we can then make our own generated PDBs
match.  And in order to do this, the dumper needs a mode where it
can dump an FPM so that we can write tests for it.

This patch adds a command to dump the FPM, as well as a test against
a known-good PDB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309894 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 22:25:52 +00:00
Matt Arsenault c8df92092d LV: Don't insert runtime ptr checks on divergent targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309890 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 21:43:08 +00:00
Teresa Johnson 99dd11f7e8 [PM] Split LoopUnrollPass and make partial unroller a function pass
Summary:
This is largely NFC*, in preparation for utilizing ProfileSummaryInfo
and BranchFrequencyInfo analyses. In this patch I am only doing the
splitting for the New PM, but I can do the same for the legacy PM as
a follow-on if this looks good.

*Not NFC since for partial unrolling we lose the updates done to the
loop traversal (adding new sibling and child loops) - according to
Chandler this is not very useful for partial unrolling, but it also
means that the debugging flag -unroll-revisit-child-loops no longer
works for partial unrolling.

Reviewers: chandlerc

Subscribers: mehdi_amini, mzolotukhin, eraman, llvm-commits

Differential Revision: https://reviews.llvm.org/D36157

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309886 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 20:35:29 +00:00
Rafael Espindola 2600a677c9 Don't pass the code model to MC
I was surprised to see the code model being passed to MC. After all,
it assembles code, it doesn't create it.

The one place it is used is in the expansion of .cfi directives to
handle .eh_frame being more that 2gb away from the code.

As far as I can tell, gnu assembler doesn't even have an option to
enable this. Compiling a c file with gcc -mcmodel=large produces a
regular looking .eh_frame. This is probably because in practice linker
parse and recreate .eh_frames.

In llvm this is used because the JIT can place the code and .eh_frame
very far apart. Ideally we would fix the jit and delete this
option. This is hard.

Apart from confusion another problem with the current interface is
that most callers pass CodeModel::Default, which is bad since MC has
no way to map it to the target default if it actually needed to.

This patch then replaces the argument with a boolean with a default
value. The vast majority of users don't ever need to look at it. In
fact, only CodeGen and llvm-mc use it and llvm-mc just to enable more
testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309884 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 20:32:26 +00:00
Craig Topper 80b5f5982a [InstCombine] Support sext in foldLogicCastConstant
This adds support for sext in foldLogicCastConstant. This is a prerequisite for D36214.

Differential Revision: https://reviews.llvm.org/D36234

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309880 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 20:25:56 +00:00
David Blaikie 61dba579be DebugInfo: Test & handle (differently) non-zero DW_AT_ranges_base
Followup to r309570, fixing it slightly differently (ranges_base and
addr_base should never be read from a DWO file - so there shouldn't be
any issue with 'overriding' the values - conditionalize the code and
assert that the values aren't being overriden).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309879 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 20:16:22 +00:00
Stefan Pintilie 07635d3971 [Power9] Exploit vector absolute difference instructions on Power 9
Power 9 has instructions to do absolute difference (VABSDUB, VABSDUH, VABSDUW)
for byte, halfword and word. We should take advantage of these.

Differential Revision: https://reviews.llvm.org/D34684

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309876 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 20:07:21 +00:00
Davide Italiano 82f73ee5b3 [NewGVN] Now that load coercion is enable, we pass this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309872 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 19:47:37 +00:00
Evandro Menezes 7fee9f87f4 [AArch64] Add Exynos M2 feature test (NFC)
Test fusion of AES operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309855 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 18:55:34 +00:00
Jakub Kuderski 95e74fa238 [Dominators] Teach LoopDeletion to use the new incremental API
Summary:
This patch makes LoopDeletion use the incremental DominatorTree API.

We modify LoopDeletion to perform the deletion in 5 steps:
1. Create a new dummy edge from the preheader to the exit, by adding a conditional branch.
2. Inform the DomTree about the new edge.
3. Remove the conditional branch and replace it with an unconditional edge to the exit. This removes the edge to the loop header, making it unreachable.
4. Inform the DomTree about the deleted edge.
5. Remove the unreachable block from the function.

Creating the dummy conditional branch is necessary to perform incremental DomTree update.
We should consider using the batch updater when it's ready.

Reviewers: dberlin, davide, grosser, sanjoy

Reviewed By: dberlin, grosser

Subscribers: mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D35391

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309850 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 18:17:52 +00:00
Coby Tayree fac03ed36c [AsmParser][GAS-compatibility] Ignore an empty 'p2align' directive
GAS ignores the aforementioned issue
this patch aligns LLVM + throws in an appropriate warning

Differential Revision: https://reviews.llvm.org/D36060


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309841 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 17:36:10 +00:00
Craig Topper dbf7ec5b15 [InstCombine] Add missing test case for (xor (sext (cmp)), -1) -> (sext (!cmp)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309839 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 17:33:02 +00:00
Evandro Menezes 749993640b [AArch64] Improve the test of conditional branch fusion
Separate the checking of the fused pairings with B.cc and CBcc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309825 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 15:34:06 +00:00
Chad Rosier e279499faf [InlineCost] Simplify more 'and' and 'or' operations.
Differential Revision: https://reviews.llvm.org/D35856

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309817 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 14:40:42 +00:00
Alexey Bataev e764b9b3dc [SLPVectorizer] Test update, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309814 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 14:22:53 +00:00
Alexey Bataev b51029d1f1 [SLP] Fix for PR31880: shuffle and vectorize repeated scalar ops on extracted elements
Summary:
Currently most of the time vectors of extractelement instructions are
treated as scalars that must be gathered into vectors. But in some
cases, like when we have extractelement instructions from single vector
with different constant indeces or from 2 vectors of the same size, we
can treat this operations as shuffle of a single vector or blending of 2
vectors.
```
define <2 x i8> @g(<2 x i8> %x, <2 x i8> %y) {
  %x0 = extractelement <2 x i8> %x, i32 0
  %y1 = extractelement <2 x i8> %y, i32 1
  %x0x0 = mul i8 %x0, %x0
  %y1y1 = mul i8 %y1, %y1
  %ins1 = insertelement <2 x i8> undef, i8 %x0x0, i32 0
  %ins2 = insertelement <2 x i8> %ins1, i8 %y1y1, i32 1
  ret <2 x i8> %ins2
}
```
can be converted to something like
```
define <2 x i8> @g(<2 x i8> %x, <2 x i8> %y) {
  %1 = shufflevector <2 x i8> %x, <2 x i8> %y, <2 x i32> <i32 0, i32 3>
  %2 = mul <2 x i8> %1, %1
  ret <2 x i8> %2
}
```
Currently this type of conversion is considered as high cost
transformation.

Reviewers: mzolotukhin, delena, mkuper, hfinkel, RKSimon

Subscribers: ashahid, RKSimon, spatel, llvm-commits

Differential Revision: https://reviews.llvm.org/D30200

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309812 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 13:25:26 +00:00
Diana Picus bb326e2526 [MIR] Print target-specific constant pools
This should enable us to test the generation of target-specific constant
pools, e.g. for ARM:

constants:
 - id:              0
   value:           'g(GOT_PREL)-(LPC0+8-.)'
   alignment:       4
   isTargetSpecific: true

I intend to use this to test PIC support in GlobalISel for ARM.

This is difficult to test outside of that context, since the existing
MIR tests usually rely on parser support as well, and that seems a bit
trickier to add. We could try to add a unit test, but the setup for that
seems rather convoluted and overkill.

We do test however that the parser reports a nice error when
encountering a target-specific constant pool.

Differential Revision: https://reviews.llvm.org/D36092

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309806 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 11:09:30 +00:00
Daniel Sanders e36182d580 [globalisel][tablegen] Do not merge memoperands from instructions that weren't in the match.
Summary:
Fix a bug discovered in an out-of-tree target where memoperands from
pseudo-instructions that weren't part of the match were being merged into the
result instructions as part of GIR_MergeMemOperands.

This bug was caused by a change to the handling of State.MIs between rules when
the state machine tables were fused into a single table. Previously, each rule
would reset State.MIs using State.MIs.resize(1) but this is no longer done, as a
result stale data is occasionally left in some elements of State.MIs. Most
opcodes aren't affected by this but GIR_MergeMemOperands merges all memoperands
from the intructions recorded in State.MIs into the result instruction.

Suppose for example, we processed but rejected the following pattern:
  (signextend (load x))
at this point, State.MIs contains the signextend and the load. Now suppose we
process and accept this pattern:
  (add x, y)
at this point, State.MIs contains the add as well as the (now irrelevant) load.
When GIR_MergeMemOperands is processed, the memoperands from that irrelevant
load will be merged into the result instruction even though it was not part of
the match.

Bringing back the State.MIs.resize(1) would fix the problem but it would limit
our ability to optimize the table in the future. Instead, this patch fixes the
problem by explicitly stating which instructions should be merged into the result.

There's no direct test case in this commit because a test case would be very brittle.
However, at the time of writing this should fix the failures in
http://green.lab.llvm.org/green/job/Compiler_Verifiers_GlobalISEL/ as well as a
failure in test/CodeGen/ARM/GlobalISel/arm-isel.ll when expensive checks are enabled.

Reviewers: ab, t.p.northover, qcolombet, rovka, aditya_nandakumar

Subscribers: fhahn, kristof.beyls, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D36094



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309804 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 11:03:36 +00:00
Craig Topper fb0e1f524b [InstCombine] Add test cases for 'or' and 'xor' to match the vector 'and' of 'sext' of 'cmp' test.
When the 'and' test was originally added it was intended to make sure we didn't change it to a sext of and of cmp. But since then the test was changed to expect it to be turned into 'select cmp1, sext cmp2, 0'. Then another optimization was added to turn the select into 'sext (and cmp1, cmp2)' which is exactly the transformation that was being blocked when the test case started.

Looks like 'or' gets optimized in a similar way, but not 'xor'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309793 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 06:35:15 +00:00
Dehao Chen b929c3e6e4 Fix the bug that parseAAPipeline is not invoked in runNewPMPasses in release compiler.
Summary: The logic is guarded by "assert".

Reviewers: davidxl, davide, chandlerc

Reviewed By: davide, chandlerc

Subscribers: sanjoy, llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D36195

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309787 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 03:03:19 +00:00
Chandler Carruth 759393be2d [PM] Fix a bug where through CGSCC iteration we can get
infinite-inlining across multiple runs of the inliner by keeping a tiny
history of internal-to-SCC inlining decisions.

This is still a bit gross, but I don't yet have any fundamentally better
ideas and numerous people are blocked on this to use new PM and ThinLTO
together.

The core of the idea is to detect when we are about to do an inline that
has a chance of re-splitting an SCC which we have split before with
a similar inlining step. That is a critical component in the inlining
forming a cycle and so far detects all of the various cyclic patterns
I can come up with as well as the original real-world test case (which
comes from a ThinLTO build of libunwind).

I've added some tests that I think really demonstrate what is going on
here. They are essentially state machines that march the inliner through
various steps of a cycle and check that we stop when the cycle is closed
and that we actually did do inlining to form that cycle.

A lot of thanks go to Eric Christopher and Sanjoy Das for the help
understanding this issue and improving the test cases.

The biggest "yuck" here is the layering issue -- the CGSCC pass manager
is providing somewhat magical state to the inliner for it to use to make
itself converge. This isn't great, but I don't honestly have a lot of
better ideas yet and at least seems nicely isolated.

I have tested this patch, and it doesn't block *any* inlining on the
entire LLVM test suite and SPEC, so it seems sufficiently narrowly
targeted to the issue at hand.

We have come up with hypothetical issues that this patch doesn't cover,
but so far none of them are practical and we don't have a viable
solution yet that covers the hypothetical stuff, so proceeding here in
the interim. Definitely an area that we will be back and revisiting in
the future.

Differential Revision: https://reviews.llvm.org/D36188

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309784 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 02:09:22 +00:00
Matt Arsenault 6023e68dae AMDGPU: Fix clobbering CSR VGPRs when spilling SGPR to it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309783 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 01:52:45 +00:00
Matt Arsenault 5474c6d8df AMDGPU: Fix emitting encoded calls
This was failing on out of bounds access to the extra operands
on the s_swappc_b64 beyond those in the instruction definition.

This was working, but somehow regressed within the past few weeks,
although I don't see any obvious commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309782 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 01:42:04 +00:00
Matt Arsenault 23e59ddf6d AMDGPU: Analyze callee resource usage in AsmPrinter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309781 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 01:31:28 +00:00
Dehao Chen cbd284128f Update the new PM pipeline to make ICP aware if it is SamplePGO build.
Summary: In ThinLTO backend compile, OPTOptions are not set so that the ICP in ThinLTO backend does not know if it is a SamplePGO build, in which profile count needs to be annotated directly on call instructions. This patch cleaned up the PGOOptions handling logic and passes down PGOOptions to ThinLTO backend.

Reviewers: chandlerc, tejohnson, davidxl

Reviewed By: chandlerc

Subscribers: sanjoy, llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D36052

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309780 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 01:28:31 +00:00
Matt Arsenault 01ddaaf508 AMDGPU: Don't place arguments in emergency stack slot
When finding the fixed offsets for function arguments,
this needs to skip over the 4 bytes reserved for the
emergency stack slot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309776 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 00:59:51 +00:00
Matt Arsenault 6e8db40d65 DAG: Undo and->or combine with FrameIndexes
This pattern shows up when lowering byval copies on AMDGPU.

The byval object access is split into 4-byte chunks, adding a
constant offset to the FixedStack base. When some of the offsets
turn into ors, this prevents combining the constant offsets.

This makes it not apparent that the object is there when matching
addressing modes, so it ends up using a scratch wave offset
relative access and the lengthy frame index expansion for that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309775 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 00:43:42 +00:00
Matthias Braun 3a6f6d93bf X86: Do not use llc -march in tests.
`llc -march` is problematic because it only switches the target
architecture, but leaves the operating system unchanged. This
occasionally leads to indeterministic tests because the OS from
LLVM_DEFAULT_TARGET_TRIPLE is used.

However we can simply always use `llc -mtriple` instead. This changes
all the tests to do this to avoid people using -march when they copy and
paste parts of tests.

See also the discussion in https://reviews.llvm.org/D35287

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309774 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 00:28:10 +00:00
Adrian Prantl cc3f143b8d Update LiveDebugValues to generate DIExpressions for spill offsets
instead of using the deprecated offset field of DBG_VALUE.

This has no observable effect on the generated DWARF, but the
assembler comments will look different.

rdar://problem/33580047

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309773 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 00:16:56 +00:00
Petr Hosek 5f53af3617 Revert "Reland "[llvm][llvm-objcopy] Added support for outputting to binary in llvm-objcopy""
This is failing to compile on 32-bit ARM bots.

This reverts commit r309768.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309771 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 00:03:33 +00:00
Adrian Prantl 9b08f328ab Update MIR testcase to reflect change in r309751.
rdar://problem/33580047

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309769 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-01 23:47:23 +00:00
Petr Hosek d6fd4b09af Reland "[llvm][llvm-objcopy] Added support for outputting to binary in llvm-objcopy"
This change adds the "-O binary" flag which directs llvm-objcopy to
output the object file to the same format as GNU objcopy does when given
the flag "-O binary". This was done by splitting the Object class into
two subclasses ObjectELF and ObjectBianry which each output a different
format but relay on the same code to read in the Object in Object.

Patch by Jake Ehrlich

Differential Revision: https://reviews.llvm.org/D34480

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309768 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-01 23:46:33 +00:00
Stanislav Mekhanoshin 3499304a9a [AMDGPU] Turn s_and_saveexec_b64 into s_and_b64 if result is unused
With SI_END_CF elimination for some nested control flow we can now
eliminate saved exec register completely by turning a saveexec version
of instruction into just a logical instruction.

Differential Revision: https://reviews.llvm.org/D36007

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309766 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-01 23:44:35 +00:00
Stanislav Mekhanoshin 5b53ac928d [AMDGPU] Collapse adjacent SI_END_CF
Add a pass to remove redundant S_OR_B64 instructions enabling lanes in
the exec. If two SI_END_CF (lowered as S_OR_B64) come together without any
vector instructions between them we can only keep outer SI_END_CF, given
that CFG is structured and exec bits of the outer end statement are always
not less than exec bit of the inner one.

This needs to be done before the RA to eliminate saved exec bits registers
but after register coalescer to have no vector registers copies in between
of different end cf statements.

Differential Revision: https://reviews.llvm.org/D35967

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309762 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-01 23:14:32 +00:00
Sanjoy Das 2d38e17cd0 [SCEV/IndVars] Always compute loop exiting values if the backedge count is 0
If SCEV can prove that the backedge taken count for a loop is zero, it does not
need to "understand" a recursive PHI to compute its exiting value.

This should fix PR33885.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309758 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-01 22:37:58 +00:00
Matthias Braun fe7581c1d1 ARM: Do not use llc -march in tests.
`llc -march` is problematic because it only switches the target
architecture, but leaves the operating system unchanged. This
occasionally leads to indeterministic tests because the OS from
LLVM_DEFAULT_TARGET_TRIPLE is used.

However we can simply always use `llc -mtriple` instead. This changes
all the tests to do this to avoid people using -march when they copy and
paste parts of tests.

See also the discussion in https://reviews.llvm.org/D35287

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309755 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-01 22:20:49 +00:00
Matthias Braun b0a0439255 PowerPC: Do not use llc -march in tests.
`llc -march` is problematic because it only switches the target
architecture, but leaves the operating system unchanged. This
occasionally leads to indeterministic tests because the OS from
LLVM_DEFAULT_TARGET_TRIPLE is used.

However we can simply always use `llc -mtriple` instead. This changes
all the tests to do this to avoid people using -march when they copy and
paste parts of tests.

This patch:
- Removes -march if the .ll file already has a matching `target triple`
  directive or -mtriple argument.
- In all other cases changes -march=ppc32/-march=ppc64 to
  -mtriple=ppc32--/-mtriple=ppc64--

See also the discussion in https://reviews.llvm.org/D35287

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309754 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-01 22:20:41 +00:00
Adrian Prantl 2cd77a8486 Remove PrologEpilogInserter's usage of DBG_VALUE's offset field
In the last half-dozen commits to LLVM I removed code that became dead
after removing the offset parameter from llvm.dbg.value gradually
proceeding from IR towards the backend. Before I can move on to
DwarfDebug and friends there is one last side-called offset I need to
remove:  This patch modifies PrologEpilogInserter's use of the
DBG_VALUE's offset argument to use a DIExpression instead. Because the
PrologEpilogInserter runs at the Machine level I had to play a little
trick with a named llvm.dbg.mir node to get the DIExpressions to print
in MIR dumps (which print the llvm::Module followed by the
MachineFunction dump).

I also had to add rudimentary DwarfExpression support to CodeView and
as a side-effect also fixed a bug (CodeViewDebug::collectVariableInfo
was supposed to give up on variables with complex DIExpressions, but
would fail to do so for fragments, which are also modeled as
DIExpressions).

With this last holdover removed we will have only one canonical way of
representing offsets to debug locations which will simplify the code
in DwarfDebug (and future versions of CodeViewDebug once it starts
handling more complex expressions) and make it easier to reason about.

This patch is NFC-ish: All test case changes are for assembler
comments and the binary output does not change.

rdar://problem/33580047
Differential Revision: https://reviews.llvm.org/D36125

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309751 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-01 21:45:24 +00:00
Vedant Kumar e72b881e28 [llvm-cov] Allow specifying distinct architectures for each loaded binary
The coverage tool needs to know which slice to look at when it's handed
a universal binary. Some projects need to look at aggregate coverage
reports for a variety of slices in different binaries: this patch adds
support for these kinds of projects to llvm-cov.

rdar://problem/33579007

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309747 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-01 21:23:26 +00:00
Martin Storsjo 39bec211f0 [AArch64] Rewrite stack frame handling for win64 vararg functions
The previous attempt, which made do with a single offset in
computeCalleeSaveRegisterPairs, wasn't quite enough. The previous
attempt only worked as long as CombineSPBump == true (since the
offset would be adjusted later in fixupCalleeSaveRestoreStackOffset).

Instead include the size for the fixed stack area used for win64
varargs in calculations in emitPrologue/emitEpilogue. The stack
consists of mainly three parts;
- AFI->getLocalStackSize()
- AFI->getCalleeSavedStackSize()
- FixedObject

Most of the places in the code which previously used the CSStackSize
now use PrologueSaveSize instead, which is the sum of the latter
two, while some cases which need exactly the middle one use
AFI->getCalleeSavedStackSize() explicitly instead of a local variable.

In addition to moving the offsetting into emitPrologue/emitEpilogue
(which fixes functions with CombineSPBump == false), also set the
frame pointer to point to the right location, where the frame pointer
and link register actually are stored. In addition to the prologue/epilogue,
this also requires changes to resolveFrameIndexReference.

Add tests for a function that keeps a frame pointer and another one
that uses a VLA.

Differential Revision: https://reviews.llvm.org/D35919

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309744 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-01 21:13:54 +00:00
Matt Arsenault f9a65f9c7e AMDGPU: Fix handling of div_scale with undef inputs
The src0 register must match src1 or src2, but if these
were undefined they could end up using different implicit_defed
virtual registers. Force these to use one undef vreg or pick the
defined other register.

Also fixes producing invalid nodes without the right number of
inputs when src2 is undef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309743 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-01 20:49:41 +00:00
Matt Arsenault ff9e21161d AMDGPU: Add test for r308774
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309733 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-01 19:54:58 +00:00
Matt Arsenault 43950949ad AMDGPU: Initial implementation of calls
Includes a hack to fix the type selected for
the GlobalAddress of the function, which will be
fixed by changing the default datalayout to use
generic pointers for 0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309732 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-01 19:54:18 +00:00
Reid Kleckner a68b470aba [DebugInfo] Don't turn dbg.declare into DBG_VALUE for static allocas
Summary:
We already have information about static alloca stack locations in our
side table. Emitting instructions for them is inefficient, and it only
happens when the address of the alloca has been materialized within the
current block, which isn't often.

Reviewers: aprantl, probinson, dblaikie

Subscribers: jfb, dschuff, sbc100, jgravelle-google, hiraditya, llvm-commits, aheejin

Differential Revision: https://reviews.llvm.org/D36117

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309729 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-01 19:45:09 +00:00
Simon Pilgrim 7e482e3a79 [X86][SSE3] Add scheduler tests for MONITOR/MWAIT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309718 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-01 18:16:44 +00:00