135823 Commits

Author SHA1 Message Date
Vedant Kumar
e201775db6 [llvm-cov] Add a debug mode for source range highlighting (in html)
llvm-cov's `-dump' option now emits information which helps debug source
range highlighting in html mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276924 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 21:57:15 +00:00
Justin Lebar
d4f04da5fe [LSV] Don't assume that bitcast ops are Instructions.
Summary:
When we ask the builder to create a bitcast on a constant, we get back a
constant, not an instruction.

Reviewers: asbirlea

Subscribers: jholewinski, mzolotukhin, llvm-commits, arsenm

Differential Revision: https://reviews.llvm.org/D22878

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276922 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 21:45:48 +00:00
Krzysztof Parzyszek
ca740c1356 [Hexagon] Find speculative loop preheader in hardware loop generation
Before adding a new preheader block, check if there is a candidate block
where the loop setup could be placed speculatively. This will be off by
default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276919 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 21:20:54 +00:00
Michael Kuperstein
3e611f85b8 [X86] Factor out another piece of the SAD combine. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276918 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 20:59:51 +00:00
Krzysztof Parzyszek
47fb8653da [Hexagon] Add option to bisect spill slot optimization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276917 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 20:58:43 +00:00
Krzysztof Parzyszek
6d5ee09dd7 [Hexagon] Do not optimize volatile stack spill slots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276916 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 20:50:42 +00:00
Hans Wennborg
da34deb1c6 build_llvm_package.bat: try tests three times
Sometimes they're flaky on Windows, and starting the whole thing
over is painful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276913 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 20:38:01 +00:00
Matt Masten
549ec0895e test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276911 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 20:22:21 +00:00
Kyle Butt
efe4c058da Codegen: IfConversion: Factor out a function to count dup instrs.
Factor out countDuplicatedInstructions to Count duplicated instructions at the
beginning and end of a diamond pattern. This is in prep for adding support for
diamonds that need to be tail-merged.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276910 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 20:19:33 +00:00
Kyle Butt
3fcba98890 Codegen: IfConversion: add const qualifier. NFC
Add a const qualifier to ReverseBranchCondition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276909 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 20:19:31 +00:00
Vedant Kumar
627477de2c Revert "[llvm-cov] Minor aesthetic improvements for html reports"
This reverts commit r276906. It breaks tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276908 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 19:59:44 +00:00
Vedant Kumar
afafefeaee [llvm-cov] Minor aesthetic improvements for html reports
This fixes the highlighting for lines without any coverage segments. I
don't have a neat way of testing this yet, but am working on it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276906 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 19:51:17 +00:00
Nirav Dave
2be4b41f7a Initialize PreserveAsmComments in MCTargetOptions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276905 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 19:19:13 +00:00
Krzysztof Parzyszek
81494d624d [Hexagon] Handle extended versions of restore routines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276903 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 18:47:25 +00:00
Duncan P. N. Exon Smith
fe912bf4b0 CodeGen: Make iterator-to-pointer conversion explicit, NFC
Remove the implicit conversion from MachineInstrBundleIterator to
MachineInstr*, leaving behind an explicit conversion.

I *think* this is the last ilist_iterator-related implicit conversion to
ilist_node subclass.  If I'm right, I can finally dig in and fix the UB
in ilist that these conversions were relying on.

Note that the implicit users of this conversion have already been
removed.  If you have out-of-tree code that doesn't update, you might be
able to buy some time by temporarily reverting this commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276902 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 18:45:18 +00:00
David Majnemer
aa32a0d2ed Fix the build for libstdc++ 4.7
libstdc++ 4.7 doesn't have emplace.  Use std::map::insert instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276901 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 18:25:12 +00:00
Duncan P. N. Exon Smith
cfc6fb48a8 XCore: Avoid implicit iterator conversions, NFC
Avoid implicit conversions from MachineInstrBundleIterator to
MachineInstr*, mainly by preferring MachineInstr& over MachineInstr*.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276899 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 18:14:38 +00:00
Andrew Kaylor
67e13d65ae Revert EH-specific checks in BranchFolding that were causing blow ups in compile time.
Differential Revision: https://reviews.llvm.org/D22839



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276898 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 17:55:33 +00:00
Tim Northover
331274dbc8 GlobalISel: support zero-sized allocas
All allocas must be at least 1 byte at the MachineIR level so we allocate just
one byte.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276897 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 17:47:54 +00:00
Nirav Dave
27b2476a1f [MC][X86] Fix Intel Operand assembly parsing for .set ids
Fix intel syntax special case identifier operands that refer to a constant
(e.g. .set <ID> n) to be interpreted as immediate not memory in parsing.

Reviewers: rnk

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D22585

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276895 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 17:39:41 +00:00
Jun Bum Lim
3655e657b3 [DSE] Fix bug in updating MadeChange flag
Summary: The MadeChange flag should be ORed to keep the previous result.

Reviewers: mcrosier

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D22873

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276894 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 17:25:20 +00:00
Krzysztof Parzyszek
f2ff85c3c2 [Hexagon] Add saved callee-saved registers as live-in in non-wrapped blocks
The callee-saved registers that are saved in a function are not pristine,
and so they can be defined and used. In case of shrink-wrapping though,
there are blocks that are outside of the save/restore range, and in those
blocks the saved registers must be treated as pristine. To avoid any uses
of these registers, add them as live-in in all those blocks.
This was already done for blocks reaching function exits after restore,
add code that does the same for blocks reached from the function entry
before save.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276886 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 16:26:39 +00:00
Daniel Berlin
41bc5c29c9 Make bugpoint transform conditional jumps into unconditional jumps.
Summary:
Add a pass to bugpoint to make it transform conditional jumps into unconditional jumps.

Often, bugpoint generates output that has large numbers of br undef jumps, where
one side is dead.

What is happening is two fold:
1. It never tries to just pick a direction for the jump, and just see what happens
<<<< this patch

2. SimplifyCFG no longer is a good match for bugpoint's usecase. It
does too much.
Even things in SimplifyCFG, like removeUnreachableBlocks, go to great
lengths to transform undefined behavior into  blocks and kill large
parts of the CFG.  This is great for regular code, not so much for
bugpoint, which often generates UB on purpose (store undef is a great
example).
<<<< a followup patch that is coming, to move simplifycfg into a
separate reduction pass, and move the existing reduceCrashingBlocks
pass to use simpleSimplifyCFG.

Both of these patches significantly reduce the size and complexity of bugpoint
generated testcases.

Reviewers: chandlerc, majnemer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D22841

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276884 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 16:13:25 +00:00
Reid Kleckner
12e910f70a Remove MCAsmInfo.h include from TargetOptions.h
TargetOptions wants the ExceptionHandling enum. Move that to
MCTargetOptions.h to avoid transitively including Dwarf.h everywhere in
clang. Now you can add a DWARF tag without a full rebuild of clang
semantic analysis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276883 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 16:03:57 +00:00
Simon Pilgrim
30428b19cd [X86][SSE] Updated test so that both are applying the post-multiply
This is to ensure that there are no diffs other than due to buildvector/legalization

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276882 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 15:30:20 +00:00
Diana Picus
5a1c38a46a Typo fix. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276879 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 15:13:25 +00:00
Renato Golin
a772715d72 [ARM] Check that the thumb COFF segment flag gets set on thumb windows
Patch by Martin Storsjö.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276877 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 14:37:18 +00:00
Ahmed Bougacha
f15a020711 [GlobalISel] Introduce an instruction selector.
And implement it for AArch64, supporting x/w ADD/OR.

Differential Revision: https://reviews.llvm.org/D22373

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276875 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 14:31:55 +00:00
Ahmed Bougacha
cd0d4b0055 [AArch64] Mark various *Info classes as 'final'. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276874 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 14:31:46 +00:00
Ahmed Bougacha
896894239c [AArch64] Define AArch64RegisterInfo as a class, not a struct. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276873 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 14:31:40 +00:00
Tim Northover
60367c56e4 GlobalISel: remove variable_ops from output list.
The instance in the input operand list allows both inputs and outputs,
but the one in (outs) is not treated specially which leads to the
MachineVerifier invoking UB (looking at an invalid MCInstrDesc field).

No functional change except in UBSan builds (maybe, who knows!), where
it fixes the legalize-add.mir test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276872 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 14:30:49 +00:00
Daniel Sanders
1f35f2fa6a [mips][ias] Check '$rs = $rd' constraints when both registers are in AsmText.
Summary:
This is one possible solution to the problem of ignoring constraints that Simon
raised in D21473 but it's a bit of a hack.

The integrated assembler currently ignores violations of the tied register
constraints when the operands involved in a tie are both present in the AsmText.
For example, 'dati $rs, $rt, $imm' with the '$rs = $rt' will silently replace
$rt with $rs. So 'dati $2, $3, 1' is processed as if the user provided
'dati $2, $2, 1' without any diagnostic being emitted.

This is difficult to solve properly because there are multiple parts of the
matcher that are silently forcing these constraints to be met. Tied operands are
rendered to instructions by cloning previously rendered operands but this is
unnecessary because the matcher was already instructed to render the operand it
would have cloned. This is also unnecessary because earlier code has already
replaced the MCParsedOperand with the one it was tied to (so the parsed input
is matched as if it were 'dati <RegIdx 2>, <RegIdx 2>, <Imm 1>'). As a result,
it looks like fixing this properly amounts to a rewrite of the tied operand
handling which affects all targets.

This patch however, merely inserts a checking hook just before the
substitution of MCParsedOperands and the Mips target overrides it. It's not
possible to accurately check the registers are the same this early (because
numeric registers haven't been bound to a register class yet) so it cheats a
bit and checks that the tokens that produced the operand are lexically
identical. This works because tied registers need to have the same register
class but it does have a flaw. It will reject 'dati $4, $a0, 1' for violating
the constraint even though $a0 ends up as the same register as $4.

Reviewers: sdardis

Subscribers: dsanders, llvm-commits, sdardis

Differential Revision: https://reviews.llvm.org/D21994

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276867 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 13:49:44 +00:00
Nemanja Ivanovic
d7d539df50 [PowerPC] Fix typo in PPCHazardRecognizers.cpp
Fixes PR28731.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276865 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 13:24:54 +00:00
Duncan P. N. Exon Smith
f5be002fc9 PowerPC: Avoid implicit iterator conversions, NFC
Avoid implicit conversions from MachineInstrBundleIterator to
MachineInstr* in the PowerPC backend, mainly by preferring MachineInstr&
over MachineInstr* when a pointer isn't nullable and using range-based
for loops.

There was one piece of questionable code in PPCInstrInfo::AnalyzeBranch,
where a condition checked a pointer converted from an iterator for
nullptr.  Since this case is impossible (moreover, the code above
guarantees that the iterator is valid), I removed the check when I
changed the pointer to a reference.

Despite that case, there should be no functionality change here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276864 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 13:24:16 +00:00
Teresa Johnson
8b87628b0f [test/gold] Add gold test subdirectory tests needing v1.12 (or higher)
Summary:
As discussed in the review for D22677, added a subdirectory to
enable tests that require at least version 1.12 of gold.

Add an initial test requiring this version.

Reviewers: davidxl, mehdi_amini

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D22827

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276860 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 12:59:51 +00:00
Renato Golin
b9c61f0c04 [ARM] Set a non-conflicting comment character for assembly in MSVC mode
Currently, for ARMCOFFMCAsmInfoMicrosoft, no comment character is set, thus the
idefault, '#', is used.

The hash character doesn't work as comment character in ARM assembly, since '#'
is used for immediate values.

The comment character is set to ';', which is the comment character used by MS
armasm.exe. (The microsoft armasm.exe uses a different directive syntax than
what LLVM currently supports though, similar to ARM's armasm.)

This allows inline assembly with immediate constants to be built (and brings the
assembly output from clang -S closer to being possible to assemble).

A test is added that verifies that ';' is correctly interpreted as comments in
this mode, and verifies that assembling code that includes literal constants
with a '#' works.

Patch by Martin Storsjö.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276859 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 12:31:58 +00:00
Renato Golin
f689bed10b [ARM] Adds test for immediate encoding
The encoding of expressions as immediates wasn't correct, and was reported in
PR23000. However, we have done some refactoring on how immediates are handled
and now it seems the problem is fixed. This is a test just to make sure it
won't regress again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276858 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 12:15:26 +00:00
John Brawn
5682750bf9 Revert r276856 "Adjust Registry interface to not require plugins to export a registry"
This is causing a huge pile of buildbot failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276857 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 11:41:18 +00:00
John Brawn
1a61c31c5a Adjust Registry interface to not require plugins to export a registry
Currently the Registry class contains the vestiges of a previous attempt to
allow plugins to be used on Windows without using BUILD_SHARED_LIBS, where a
plugin would have its own copy of a registry and export it to be imported by
the tool that's loading the plugin. This only works if the plugin is entirely
self-contained with the only interface between the plugin and tool being the
registry, and in particular this conflicts with how IR pass plugins work.

This patch changes things so that instead the add_node function of the registry
is exported by the tool and then imported by the plugin, which solves this
problem and also means that instead of every plugin having to export every
registry they use instead LLVM only has to export the add_node functions. This
allows plugins that use a registry to work on Windows if
LLVM_EXPORT_SYMBOLS_FOR_PLUGINS is used.

Differential Revision: http://reviews.llvm.org/D21385


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276856 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 11:18:38 +00:00
Simon Pilgrim
36a9d65357 [DAGCombiner] Use APInt directly to detect out of range shift constants
Using getZExtValue() will assert if the value doesn't fit into uint64_t - SHL was already doing this, I've just updated ASHR/LSHR to match

As mentioned on D22726

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276855 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 10:30:55 +00:00
Simon Pilgrim
18e7325396 Removed unusued template function declaration that has no definition - fixes MSVC warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276852 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 10:11:05 +00:00
Daniel Sanders
af18ad3fb3 [mips] Update the link to the MIPS documentation in CompilerWriterInfo.rst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276850 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 08:52:15 +00:00
Sjoerd Meijer
23ce79724b [MBP] Added some more debug messages and some clean ups /NFC
Differential Revision: https://reviews.llvm.org/D22669


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276849 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 08:49:23 +00:00
Sean Silva
9968808357 Refactor - CodeExtractor : Move check for valid block to static utility
This lets you actually check to see if a block is valid before trying to
extract.

Patch by River Riddle!

Differential Revision: https://reviews.llvm.org/D22699

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276846 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 08:02:46 +00:00
George Burgess IV
7963f422e1 [GVNHoist] Fix typo in assert.
This fixes PR28730.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276844 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 06:34:53 +00:00
Mehdi Amini
c53e16cc30 Fix Coroutines doc example
SSA was broken.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276843 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 06:03:47 +00:00
Davide Italiano
8a6d1ad936 [MC] Add command-line option to choose the max nest level in asm macros.
Submitted by: t83wCSLq
Differential Revision:  https://reviews.llvm.org/D22313


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276842 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 05:51:56 +00:00
Sebastian Pop
7c4932c37d GVN-hoist: improve code generation for recursive GEPs
When loading or storing in a field of a struct like "a.b.c", GVN is able to
detect the equivalent expressions, and GVN-hoist would fail in the code
generation.  This is because the GEPs are not hoisted as scalar operations to
avoid moving the GEPs too far from their ld/st instruction when the ld/st is not
movable.  So we end up having to generate code for the GEP of a ld/st when we
move the ld/st.  In the case of a GEP referring to another GEP as in "a.b.c" we
need to code generate all the GEPs necessary to make all the operands available
at the new location for the ld/st.  With this patch we recursively walk through
the GEP operands checking whether all operands are available, and in the case of
a GEP operand, it recursively makes all its operands available. Code generation
happens from the inner GEPs out until reaching the GEP that appears as an
operand of the ld/st.

Differential Revision: https://reviews.llvm.org/D22599

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276841 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 05:48:12 +00:00
Sebastian Pop
c58cbcd10d GVN-hoist: use DFS numbers instead of walking the instruction stream
The patch replaces a function that walks the IR with a call to firstInBB() that
uses the DFS numbering.  NFC.

Differential Revision: https://reviews.llvm.org/D22809

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276840 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 05:13:52 +00:00
David Majnemer
af5d051e3e [coroutines] Part 2 of N: Adding Coroutine Intrinsics
This is the second patch in the coroutine series. It adds coroutine
intrinsics and updates intrinsic cost in TargetTransformInfoImpl.h.

Patch by Gor Nishanov!

Differential Revision: https://reviews.llvm.org/D22659

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276839 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 05:12:35 +00:00