1346 Commits

Author SHA1 Message Date
Matthias Braun
347847bcdc Move most EH from MachineModuleInfo to MachineFunction
Recommitting r288293 with some extra fixes for GlobalISel code.

Most of the exception handling members in MachineModuleInfo is actually
per function data (talks about the "current function") so it is better
to keep it at the function instead of the module.

This is a necessary step to have machine module passes work properly.

Also:
- Rename TidyLandingPads() to tidyLandingPads()
- Use doxygen member groups instead of "//===- EH ---"... so it is clear
  where a group ends.
- I had to add an ugly const_cast at two places in the AsmPrinter
  because the available MachineFunction pointers are const, but the code
  wants to call tidyLandingPads() in between
  (markFunctionEnd()/endFunction()).

Differential Revision: https://reviews.llvm.org/D27227

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288405 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-01 19:32:15 +00:00
Eric Christopher
e7b3959e01 Temporarily Revert "Move most EH from MachineModuleInfo to MachineFunction"
This apprears to have broken the global isel bot:
http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-globalisel_build/5174/console

This reverts commit r288293.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288322 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-01 07:50:12 +00:00
Matthias Braun
29c7b3a03e Move most EH from MachineModuleInfo to MachineFunction
Most of the exception handling members in MachineModuleInfo is actually
per function data (talks about the "current function") so it is better
to keep it at the function instead of the module.

This is a necessary step to have machine module passes work properly.

Also:
- Rename TidyLandingPads() to tidyLandingPads()
- Use doxygen member groups instead of "//===- EH ---"... so it is clear
  where a group ends.
- I had to add an ugly const_cast at two places in the AsmPrinter
  because the available MachineFunction pointers are const, but the code
  wants to call tidyLandingPads() in between
  (markFunctionEnd()/endFunction()).

Differential Revision: https://reviews.llvm.org/D27227

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288293 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-30 23:49:01 +00:00
Matthias Braun
9262f00f1a Timer: Track name and description.
The previously used "names" are rather descriptions (they use multiple
words and contain spaces), use short programming language identifier
like strings for the "names" which should be used when exporting to
machine parseable formats.

Also removed a unused TimerGroup from Hexxagon.

Differential Revision: https://reviews.llvm.org/D25583

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287369 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-18 19:43:18 +00:00
Arnold Schwaighofer
4ba2b03e44 Silence -Wunused-but-set-variable warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283927 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-11 19:49:29 +00:00
Arnold Schwaighofer
c4f04d9726 swifterror: Don't compute swifterror vregs during instruction selection
The code used llvm basic block predecessors to decided where to insert phi
nodes. Instruction selection can and will liberally insert new machine basic
block predecessors. There is not a guaranteed one-to-one mapping from pred.
llvm basic blocks and machine basic blocks.

Therefore the current approach does not work as it assumes we can mark
predecessor machine basic block as needing a copy, and needs to know the set of
all predecessor machine basic blocks to decide when to insert phis.

Instead of computing the swifterror vregs as we select instructions, propagate
them at the end of instruction selection when the MBB CFG is complete.

When an instruction needs a swifterror vreg and we don't know the value yet,
generate a new vreg and remember this "upward exposed" use, and reconcile this
at the end of instruction selection.

This will only happen if the target supports promoting swifterror parameters to
registers and the swifterror attribute is used.

rdar://28300923

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283617 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 22:06:55 +00:00
Sanjay Patel
a7c48ccd3f getValueType().getSizeInBits() -> getValueSizeInBits() ; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281493 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 16:05:51 +00:00
Arnold Schwaighofer
65ddbeccd7 Create phi nodes for swifterror values at the end of the phi instructions list
ISel makes assumption about the order of phi nodes.

rdar://28190150

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281095 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-09 21:18:47 +00:00
Quentin Colombet
aaa2879009 [SelectionDAG] Do not run the ISel process on already selected code.
Right now, this cannot happen, but with the fall back path of GlobalISel
it will show up eventually.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279877 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-26 22:32:55 +00:00
Pete Cooper
0504d91b00 Fix some more asserts after r279466.
That commit added a new version of Intrinsic::getName which should only
be called when the intrinsic has no overloaded types.  There are several
debugging paths, such as SDNode::dump which are printing the name of the
intrinsic but don't have the overloaded types.  These paths should be ok
to just print the name instead of crashing.

The fix here is ultimately to just add a 'None' second argument as that
calls the overload capable getName, which is less efficient, but this is a
debugging path anyway, and not perf critical.

Thanks to Björn Pettersson for pointing out that there were more crashes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279528 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 16:23:45 +00:00
David Majnemer
975248e4fb Use the range variant of find instead of unpacking begin/end
If the result of the find is only used to compare against end(), just
use is_contained instead.

No functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278433 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-11 22:21:41 +00:00
Matthias Braun
f79c57a412 MachineFunction: Return reference for getFrameInfo(); NFC
getFrameInfo() never returns nullptr so we should use a reference
instead of a pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277017 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-28 18:40:00 +00:00
Simon Dardis
5ebefb8fd2 [inlineasm] Propagate operand constraints to the backend
When SelectionDAGISel transforms a node representing an inline asm
block, memory constraint information is not preserved. This can cause
constraints to be broken when a memory offset is of the form:

offset + frame index

when the frame is resolved.

By propagating the constraints all the way to the backend, targets can
enforce memory operands of inline assembly to conform to their constraints.

For MIPSR6, some instructions had their offsets reduced to 9 bits from
16 bits such as ll/sc. This becomes problematic when using inline assembly
to perform atomic operations, as an offset can generated that is too big to
encode in the instruction.

Reviewers: dsanders, vkalintris

Differential Review: https://reviews.llvm.org/D21615


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275786 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-18 13:17:31 +00:00
Duncan P. N. Exon Smith
9ea0ae7891 SelectionDAG: Avoid implicit iterator conversions in SelectionDAGISel, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274904 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-08 19:11:40 +00:00
Andrew Kaylor
9e4419db36 Include SelectionDAGISel in the opt-bisect process
Differential Revision: http://reviews.llvm.org/D21143



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274786 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-07 18:55:02 +00:00
Duncan P. N. Exon Smith
a204da23db CodeGen: Use MachineInstr& in TargetLowering, NFC
This is a mechanical change to make TargetLowering API take MachineInstr&
(instead of MachineInstr*), since the argument is expected to be a valid
MachineInstr.  In one case, changed a parameter from MachineInstr* to
MachineBasicBlock::iterator, since it was used as an insertion point.

As a side effect, this removes a bunch of MachineInstr* to
MachineBasicBlock::iterator implicit conversions, a necessary step
toward fixing PR26753.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274287 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-30 22:52:52 +00:00
Rafael Espindola
809018e56e Delete unused includes. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274225 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-30 12:19:16 +00:00
Benjamin Kramer
af18e017d2 Pass DebugLoc and SDLoc by const ref.
This used to be free, copying and moving DebugLocs became expensive
after the metadata rewrite. Passing by reference eliminates a ton of
track/untrack operations. No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272512 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-12 15:39:02 +00:00
Etienne Bergeron
70cf01c276 [stack-protection] Add support for MSVC buffer security check
Summary:
This patch is adding support for the MSVC buffer security check implementation

The buffer security check is turned on with the '/GS' compiler switch.
  * https://msdn.microsoft.com/en-us/library/8dbf701c.aspx
  * To be added to clang here: http://reviews.llvm.org/D20347

Some overview of buffer security check feature and implementation:
  * https://msdn.microsoft.com/en-us/library/aa290051(VS.71).aspx
  * http://www.ksyash.com/2011/01/buffer-overflow-protection-3/
  * http://blog.osom.info/2012/02/understanding-vs-c-compilers-buffer.html


For the following example:
```
int example(int offset, int index) {
  char buffer[10];
  memset(buffer, 0xCC, index);
  return buffer[index];
}
```

The MSVC compiler is adding these instructions to perform stack integrity check:
```
        push        ebp  
        mov         ebp,esp  
        sub         esp,50h  
  [1]   mov         eax,dword ptr [__security_cookie (01068024h)]  
  [2]   xor         eax,ebp  
  [3]   mov         dword ptr [ebp-4],eax  
        push        ebx  
        push        esi  
        push        edi  
        mov         eax,dword ptr [index]  
        push        eax  
        push        0CCh  
        lea         ecx,[buffer]  
        push        ecx  
        call        _memset (010610B9h)  
        add         esp,0Ch  
        mov         eax,dword ptr [index]  
        movsx       eax,byte ptr buffer[eax]  
        pop         edi  
        pop         esi  
        pop         ebx  
  [4]   mov         ecx,dword ptr [ebp-4]  
  [5]   xor         ecx,ebp  
  [6]   call        @__security_check_cookie@4 (01061276h)  
        mov         esp,ebp  
        pop         ebp  
        ret  
```

The instrumentation above is:
  * [1] is loading the global security canary,
  * [3] is storing the local computed ([2]) canary to the guard slot,
  * [4] is loading the guard slot and ([5]) re-compute the global canary,
  * [6] is validating the resulting canary with the '__security_check_cookie' and performs error handling.

Overview of the current stack-protection implementation:
  * lib/CodeGen/StackProtector.cpp
    * There is a default stack-protection implementation applied on intermediate representation.
    * The target can overload 'getIRStackGuard' method if it has a standard location for the stack protector cookie.
    * An intrinsic 'Intrinsic::stackprotector' is added to the prologue. It will be expanded by the instruction selection pass (DAG or Fast).
    * Basic Blocks are added to every instrumented function to receive the code for handling stack guard validation and errors handling.
    * Guard manipulation and comparison are added directly to the intermediate representation.

  * lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  * lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    * There is an implementation that adds instrumentation during instruction selection (for better handling of sibbling calls).
      * see long comment above 'class StackProtectorDescriptor' declaration.
    * The target needs to override 'getSDagStackGuard' to activate SDAG stack protection generation. (note: getIRStackGuard MUST be nullptr).
      * 'getSDagStackGuard' returns the appropriate stack guard (security cookie)
    * The code is generated by 'SelectionDAGBuilder.cpp' and 'SelectionDAGISel.cpp'.

  * include/llvm/Target/TargetLowering.h
    * Contains function to retrieve the default Guard 'Value'; should be overriden by each target to select which implementation is used and provide Guard 'Value'.

  * lib/Target/X86/X86ISelLowering.cpp
    * Contains the x86 specialisation; Guard 'Value' used by the SelectionDAG algorithm.

Function-based Instrumentation:
  * The MSVC doesn't inline the stack guard comparison in every function. Instead, a call to '__security_check_cookie' is added to the epilogue before every return instructions.
  * To support function-based instrumentation, this patch is
    * adding a function to get the function-based check (llvm 'Value', see include/llvm/Target/TargetLowering.h),
      * If provided, the stack protection instrumentation won't be inlined and a call to that function will be added to the prologue.
    * modifying (SelectionDAGISel.cpp) do avoid producing basic blocks used for inline instrumentation,
    * generating the function-based instrumentation during the ISEL pass (SelectionDAGBuilder.cpp),
    * if FastISEL (not SelectionDAG), using the fallback which rely on the same function-based implemented over intermediate representation (StackProtector.cpp).

Modifications
  * adding support for MSVC (lib/Target/X86/X86ISelLowering.cpp)
  * adding support function-based instrumentation (lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp, .h)

Results

  * IR generated instrumentation:
```
clang-cl /GS test.cc /Od /c -mllvm -print-isel-input
```

```
*** Final LLVM Code input to ISel ***

; Function Attrs: nounwind sspstrong
define i32 @"\01?example@@YAHHH@Z"(i32 %offset, i32 %index) #0 {
entry:
  %StackGuardSlot = alloca i8*                                                  <<<-- Allocated guard slot
  %0 = call i8* @llvm.stackguard()                                              <<<-- Loading Stack Guard value
  call void @llvm.stackprotector(i8* %0, i8** %StackGuardSlot)                  <<<-- Prologue intrinsic call (store to Guard slot)
  %index.addr = alloca i32, align 4
  %offset.addr = alloca i32, align 4
  %buffer = alloca [10 x i8], align 1
  store i32 %index, i32* %index.addr, align 4
  store i32 %offset, i32* %offset.addr, align 4
  %arraydecay = getelementptr inbounds [10 x i8], [10 x i8]* %buffer, i32 0, i32 0
  %1 = load i32, i32* %index.addr, align 4
  call void @llvm.memset.p0i8.i32(i8* %arraydecay, i8 -52, i32 %1, i32 1, i1 false)
  %2 = load i32, i32* %index.addr, align 4
  %arrayidx = getelementptr inbounds [10 x i8], [10 x i8]* %buffer, i32 0, i32 %2
  %3 = load i8, i8* %arrayidx, align 1
  %conv = sext i8 %3 to i32
  %4 = load volatile i8*, i8** %StackGuardSlot                                  <<<-- Loading Guard slot
  call void @__security_check_cookie(i8* %4)                                    <<<-- Epilogue function-based check
  ret i32 %conv
}
```

  * SelectionDAG generated instrumentation:

```
clang-cl /GS test.cc /O1 /c /FA
```

```
"?example@@YAHHH@Z":                    # @"\01?example@@YAHHH@Z"
# BB#0:                                 # %entry
        pushl   %esi
        subl    $16, %esp
        movl    ___security_cookie, %eax                                        <<<-- Loading Stack Guard value
        movl    28(%esp), %esi
        movl    %eax, 12(%esp)                                                  <<<-- Store to Guard slot
        leal    2(%esp), %eax
        pushl   %esi
        pushl   $204
        pushl   %eax
        calll   _memset
        addl    $12, %esp
        movsbl  2(%esp,%esi), %esi
        movl    12(%esp), %ecx                                                  <<<-- Loading Guard slot
        calll   @__security_check_cookie@4                                      <<<-- Epilogue function-based check
        movl    %esi, %eax
        addl    $16, %esp
        popl    %esi
        retl
```

Reviewers: kcc, pcc, eugenis, rnk

Subscribers: majnemer, llvm-commits, hans, thakis, rnk

Differential Revision: http://reviews.llvm.org/D20346

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272053 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-07 20:15:35 +00:00
Justin Bogner
78cd7cbf25 Re-apply "SDAG: Update ChainNodesMatched as nodes are deleted"
My first attempt at this had an overly aggressive assert - chain nodes
will only be removed, but we could hit the assert if a non-chain node
was CSE'd (NodeToMatch, for instance).

This reapplies r271706 by reverting r271713 and fixing an assert.

Original message:

Avoid relying on UB by looking into deleted nodes for a marker value.
Instead, update the list of chain nodes as we go.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271733 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-03 20:47:40 +00:00
Justin Bogner
6cf7e43da7 Revert "SDAG: Update ChainNodesMatched as nodes are deleted"
Seeing failures in CodeGen/Generic/icmp-illegal.ll on quite a few
bots.

This reverts r271706.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271713 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-03 19:40:06 +00:00
Justin Bogner
f0704e634f SDAG: Update ChainNodesMatched as nodes are deleted
Avoid relying on UB by looking into deleted nodes for a marker value.
Instead, update the list of chain nodes as we go.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271706 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-03 18:50:11 +00:00
Justin Bogner
9da1c6d5f3 SDAG: Replace some unreachable code with an assert. NFC
The current node shouldn't be (and isn't) removed partway through
selection.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271699 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-03 18:09:53 +00:00
Justin Bogner
bc434826ff SDAG: Drop a redundant replace and move the dead node removal closer. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271429 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-01 20:55:26 +00:00
Justin Bogner
cefd2c3002 SDAG: Have SelectNodeTo replace uses if it CSE's instead of morphing a node
It's awkward to force callers of SelectNodeTo to figure out whether
the node was morphed or CSE'd. Update uses here instead of requiring
callers to (sometimes) do it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269235 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-11 21:00:33 +00:00
Justin Bogner
182dac04e5 SDAG: Make SelectCodeCommon return void
This means SelectCode unconditionally returns nullptr now. I'll follow
up with a change to make that return void as well, but it seems best
to keep that one very mechanical.

This is part of the work to have Select return void instead of an
SDNode *, which is in turn part of llvm.org/pr26808.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269136 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 22:58:26 +00:00
Justin Bogner
0407944269 SDAG: Don't leave dangling dead nodes after SelectCodeCommon
Relying on the caller to clean up after we've replaced all uses of a
node won't work when we've migrated to the `void Select(...)` API.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268774 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 18:42:16 +00:00
Justin Bogner
9ed38db20e SDAG: Rename Select->SelectImpl and repurpose Select as returning void
This is a step towards removing the rampant undefined behaviour in
SelectionDAG, which is a part of llvm.org/PR26808.

We rename SelectionDAGISel::Select to SelectImpl and update targets to
match, and then change Select to return void and consolidate the
sketchy behaviour we're trying to get away from there.

Next, we'll update backends to implement `void Select(...)` instead of
SelectImpl and eventually drop the base Select implementation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268693 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 23:19:08 +00:00
Justin Bogner
5f2e6ee2b7 SDAG: Remove OPC_MarkGlueResults and associated logic. NFC
This opcode never happens in practice, and yet the logic we have in
place to handle it would be undefined behaviour if we ever executed
it. Remove it rather than trying to refactor code that's never
reached.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268692 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 22:37:45 +00:00
Craig Topper
8d0e28ce95 [CodeGen] Add some space optimized forms of EmitNode and MorphNodeTo that implicitly indicate the number of result VTs. This shaves about 16K off the X86 matching table taking it down to about 470K.
Overall this reduces the llc binary size with all in-tree targets by about 40K.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268365 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-03 05:54:13 +00:00
Craig Topper
b5bf834f5d [CodeGen] Add OPC_MoveChild0-OPC_MoveChild7 opcodes to isel matching tables to optimize table size. Shaves about 12K off the X86 matcher table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268209 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-02 01:53:30 +00:00
Simon Pilgrim
34d5a9f606 Use SelectionDAG::getTargetConstant* helper functions. NFC.
Instead of SelectionDAG::getConstant directly to make it more obvious that we're creating target constants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268074 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-29 17:42:45 +00:00
Hans Wennborg
a82c87c900 Switch lowering: don't add incoming PHI values from skipped bit test MBB's (PR27135)
After r245976, LLVM will skip the last bit test case if knows it will always be
true. However, we would still erroneously update PHI nodes with incoming values
from the MBB that would perform the final bit test, causing -verify-machineinstrs
to fail.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266479 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-15 21:45:30 +00:00
Hans Wennborg
3301aed47e SelectionDAGISel: rangeify a loop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266478 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-15 21:45:09 +00:00
Tim Shen
1a7750eecd [SSP] Remove llvm.stackprotectorcheck.
This is a cleanup patch for SSP support in LLVM. There is no functional change.
llvm.stackprotectorcheck is not needed, because SelectionDAG isn't
actually lowering it in SelectBasicBlock; rather, it adds check code in
FinishBasicBlock, ignoring the position where the intrinsic is inserted
(See FindSplitPointForStackProtector()).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265851 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-08 21:26:31 +00:00
Manman Ren
2bf0ebe961 Swift Calling Convention: swifterror target-independent change.
At IR level, the swifterror argument is an input argument with type
ErrorObject**. For targets that support swifterror, we want to optimize it
to behave as an inout value with type ErrorObject*; it will be passed in a
fixed physical register.

The main idea is to track the virtual registers for each swifterror value. We
define swifterror values as AllocaInsts with swifterror attribute or a function
argument with swifterror attribute.

In SelectionDAGISel.cpp, we set up swifterror values (SwiftErrorVals) before
handling the basic blocks.

When iterating over all basic blocks in RPO, before actually visiting the basic
block, we call mergeIncomingSwiftErrors to merge incoming swifterror values when
there are multiple predecessors or to simply propagate them. There, we create a
virtual register for each swifterror value in the entry block. For predecessors
that are not yet visited, we create virtual registers to hold the swifterror
values at the end of the predecessor. The assignments are saved in
SwiftErrorWorklist and will be materialized at the end of visiting the basic
block.

When visiting a load from a swifterror value, we copy from the current virtual
register assignment. When visiting a store to a swifterror value, we create a
virtual register to hold the swifterror value and update SwiftErrorMap to
track the current virtual register assignment.

Differential Revision: http://reviews.llvm.org/D18108


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265433 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-05 18:13:16 +00:00
Manman Ren
7121713797 CXX TLS: collect return blocks after SelectAllBasicBlocks.
It is incorrect to get the corresponding MBB for a ReturnInst before
SelectAllBasicBlocks since SelectAllBasicBlocks can change the
correspondence between a ReturnInst and the MBB it is in.

PR27062


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264358 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-24 23:21:29 +00:00
Manman Ren
2dadc1aa4d [CXX_FAST_TLS] fix issues with O0 on ARM, AArch64 and X86.
Since at O0, explicit copies via SplitCSR may not be removed even if
they are unnecessary, we choose not to use SplitCSR at O0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263855 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-18 23:38:49 +00:00
Craig Topper
4016ad20d2 [CodeGen] Add space-optimized EmitMergeInputChains1_2 to the DAG isel matching tables. Shaves about 5100 bytes from the X86 matcher table. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262815 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 07:29:12 +00:00
Eugene Zelenko
380d47d651 Fix Clang-tidy readability-redundant-control-flow warnings; other minor fixes.
Differential revision: http://reviews.llvm.org/D16793


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259539 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 18:20:45 +00:00
Tim Shen
a750479355 [SelectionDAG] Eliminate exponential behavior in WalkChainUsers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259315 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-31 03:59:34 +00:00
Matthias Braun
5e08bd340a Avoid overly large SmallPtrSet/SmallSet
These sets perform linear searching in small mode so it is never a good
idea to use SmallSize/N bigger than 32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259283 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-30 01:24:31 +00:00
Benjamin Kramer
a2815b5dd7 Don't check if a list is empty with ilist::size.
ilist::size() is O(n) while ilist::empty() is O(1)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258636 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-23 20:58:09 +00:00
David Majnemer
f7cfdf8b26 [X86] Don't alter HasOpaqueSPAdjustment after we've relied on it
We rely on HasOpaqueSPAdjustment not changing after we've calculated
things based on it.  Things like whether or not we can use 'rep;movs' to
copy bytes around, that sort of thing.  If it changes, invariants in the
backend will quietly break.  This situation arose when we had a call to
memcpy *and* a COPY of the FLAGS register where we would attempt to
reference local variables using %esi, a register that was clobbered by
the 'rep;movs'.

This fixes PR26124.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257730 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-14 01:20:03 +00:00
David Majnemer
f124911f7a [X86] Make hasFP constant time
We need a frame pointer if there is a push/pop sequence after the
prologue in order to unwind the stack.  Scanning the instructions to
figure out if this happened made hasFP not constant-time which is a
violation of expectations.  Let's compute this up-front and reuse that
computation when we need it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256730 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-04 04:49:41 +00:00
Manman Ren
8f2b4f1f9e CXX_FAST_TLS calling convention: target independent portion.
Update supportSplitCSR's interface to take machine function instead of the
calling convention.

Review comments for http://reviews.llvm.org/D15341


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255818 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-16 20:45:48 +00:00
Manman Ren
6aac92b939 CXX_FAST_TLS calling convention: target independent portion.
The access function has a short entry and a short exit, the initialization
block is only run the first time. To improve the performance, we want to
have a short frame at the entry and exit.

We explicitly handle most of the CSRs via copies. Only the CSRs that are not
handled via copies will be in CSR_SaveList.

Frame lowering and prologue/epilogue insertion will generate a short frame
in the entry and exit according to CSR_SaveList. The majority of the CSRs will
be handled by register allcoator. Register allocator will try to spill and
reload them in the initialization block.

We add CSRsViaCopy, it will be explicitly handled during lowering.

1> we first set FunctionLoweringInfo->SplitCSR if conditions are met (the target
   supports it for the given calling convention and the function has only return
   exits). We also call TLI->initializeSplitCSR to perform initialization.
2> we call TLI->insertCopiesSplitCSR to insert copies from CSRsViaCopy to
   virtual registers at beginning of the entry block and copies from virtual
   registers to CSRsViaCopy at beginning of the exit blocks.
3> we also need to make sure the explicit copies will not be eliminated.

rdar://problem/23557469

Differential Revision: http://reviews.llvm.org/D15340


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2015-12-11 18:24:30 +00:00
David Majnemer
1114aa2fc6 Move EH-specific helper functions to a more appropriate place
No functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254562 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-02 23:06:39 +00:00
Paul Robinson
ae5d4bfbbe Have 'optnone' respect the -fast-isel=false option.
This is primarily useful for debugging optnone v. ISel issues.

Differential Revision: http://reviews.llvm.org/D14792


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2015-11-30 21:56:16 +00:00
Cong Hou
fc33b8bb31 Let SelectionDAG start to use probability-based interface to add successors.
The patch in http://reviews.llvm.org/D13745 is broken into four parts:

1. New interfaces without functional changes.
2. Use new interfaces in SelectionDAG, while in other passes treat probabilities
as weights.
3. Use new interfaces in all other passes.
4. Remove old interfaces.

This the second patch above. In this patch SelectionDAG starts to use
probability-based interfaces in MBB to add successors but other MC passes are
still using weight-based interfaces. Therefore, we need to maintain correct
weight list in MBB even when probability-based interfaces are used. This is
done by updating weight list in probability-based interfaces by treating the
numerator of probabilities as weights. This change affects many test cases
that check successor weight values. I will update those test cases once this
patch looks good to you.


Differential revision: http://reviews.llvm.org/D14361




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253965 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-24 08:51:23 +00:00