Commit Graph

108129 Commits

Author SHA1 Message Date
Petar Jovanovic
fd42335e83 Do not destroy external linkage when deleting function body
The function deleteBody() converts the linkage to external and thus destroys
original linkage type value. Lack of correct linkage type causes wrong
relocations to be emitted later.
Calling dropAllReferences() instead of deleteBody() will fix the issue.

Differential Revision: http://reviews.llvm.org/D5415


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218302 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-23 12:54:19 +00:00
Chandler Carruth
4850be49a3 [x86] Teach the vector comment parsing and printing to correctly handle
undef in the shuffle mask. This shows up when we're printing comments
during lowering and we still have an IR-level constant hanging around
that models undef.

A nice consequence of this is *much* prettier test cases where the undef
lanes actually show up as undef rather than as a particular set of
values. This also allows us to print shuffle comments in cases that use
undef such as the recently added variable VPERMILPS lowering. Now those
test cases have nice shuffle comments attached with their details.

The shuffle lowering for PSHUFB has been augmented to use undef, and the
shuffle combining has been augmented to comprehend it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218301 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-23 11:15:19 +00:00
Chandler Carruth
8f637786d8 [x86] Teach the AVX1 path of the new vector shuffle lowering one more
trick that I missed.

VPERMILPS has a non-immediate memory operand mode that allows it to do
asymetric shuffles in the two 128-bit lanes. Use this rather than two
shuffles and a blend.

However, it turns out the variable shuffle path to VPERMILPS (and
VPERMILPD, although that one offers no functional differenc from the
immediate operand other than variability) wasn't even plumbed through
codegen. Do such plumbing so that we can reasonably emit
a variable-masked VPERMILP instruction. Also plumb basic comment parsing
and printing through so that the tests are reasonable.

There are still a few tests which don't show the shuffle pattern. These
are tests with undef lanes. I'll teach the shuffle decoding and printing
to handle undef mask entries in a follow-up. I've looked at the masks
and they seem reasonable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218300 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-23 10:08:29 +00:00
Michael Kuperstein
5f843038fb Ensure bitcode encoding stays stable.
This includes constants, attributes, and some additional instructions not covered by previous tests.

Work was done by lama.saba@intel.com.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218297 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-23 08:48:01 +00:00
Argyrios Kyrtzidis
72bffaafb4 [ADT/IntrusiveRefCntPtr] Give friend access to IntrusiveRefCntPtr<X> so the relevant move constructor can access 'Obj'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218295 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-23 06:06:43 +00:00
NAKAMURA Takumi
66e6cd27a3 Windows/DynamicLibrary.inc: Remove 'extern "C"' in ELM_Callback.
'extern "C" static' is not accepted by g++-4.7. Rather to tweak, I just removed 'extern "C"', since it doesn't affect the ABI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218290 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-23 01:09:46 +00:00
Sanjay Patel
c4ef4e47c2 tighten up checks
We manage to generate all of the matching instructions (and a lot more) via
the reciprocal optimization function - even if we completely remove the square
root optimization. With CHECK_NEXT, we assure that we're executing the
expected square root optimization paths and not generating extra insts.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218284 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 22:46:44 +00:00
Chris Bieneman
f1a19cd9fc Converting terminalHasColors mutex to a global ManagedStatic to avoid the static destructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218283 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 22:39:20 +00:00
Chandler Carruth
4b365159bf [x86] Rename X86ISD::VPERMILP to X86ISD::VPERMILPI (and the same for the
td pattern). Currently we only model the immediate operand variation of
VPERMILPS and VPERMILPD, we should make that clear in the pseudos used.
Will be adding support for the variable mask variant in my next commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218282 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 22:29:42 +00:00
Kaelyn Takata
cdc451b1ae Fix a "typo" from my previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218281 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 22:17:59 +00:00
Kaelyn Takata
1488ba63fe Silence unused variable warnings in the new stub functions that occur
when assertions are disabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218280 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 22:14:13 +00:00
Sanjay Patel
90969b9ee0 remove unnecessary labels; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218278 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 21:52:53 +00:00
Chandler Carruth
8571ae37ae [x86] Stub out the integer lowering of 256-bit vectors with AVX2
support. No interesting functionality yet, but this will let me
implement one vector type at a time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218277 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 21:45:57 +00:00
Yaron Keren
612d00a347 In this callback ModuleName includes the file path.
Comparing ModuleName to the file names listed will 
always fail. 

I wonder how this code ever worked and what its 
purpose was. Why exclude the msvc runtime DLLs
but not exclude all Windows system DLLs?

Anyhow, it does not function as intended.

clang-formatted as well.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218276 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 21:40:15 +00:00
Juergen Ributzka
af989653e0 [FastISel][AArch64] Also allow folding of sign-/zero-extend and shift-left for booleans (i1).
Shift-left immediate with sign-/zero-extensions also works for boolean values.
Update the assert and the test cases to reflect that fact.

This should fix a bug found by Chad.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218275 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 21:08:53 +00:00
Ehsan Akhgari
e6f6980d5b ms-inline-asm: Fix parsing label names inside bracket expressions
Summary:
This fixes a couple of issues.  One is ensuring that AOK_Label rewrite
rules have a lower priority than AOK_Skip rules, as AOK_Skip needs to
be able to skip the brackets properly.  The other part of the fix ensures
that we don't overwrite Identifier when looking up the identifier, and
that we use the locally available information to generate the AOK_Label
rewrite in ParseIntelIdentifier.  Doing that in CreateMemForInlineAsm
would be problematic since the Start location there may point to the
beginning of a bracket expression, and not necessarily the beginning of
an identifier.

This also means that we don't need to carry around the InternlName field,
which helps simplify the code.

Test Plan: This will be tested on the clang side.

Reviewers: rnk

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5445

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218270 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 20:40:36 +00:00
David Majnemer
d80fc698f3 MC: ReadOnlyWithRel section kinds should map to rdata in COFF
Don't consider ReadOnlyWithRel as a writable section in COFF, they
really belong in .rdata.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218268 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 20:39:23 +00:00
Chandler Carruth
56c7cfe41f [x86] Introduce tests covering the gamut of 256-bit vector shuffling.
These are just test cases, no actual code yet. This establishes the
baseline fallback strategy we're starting from on AVX2 and the expected
lowering we use on AVX1.

Also, these test cases are very much generated. I've manually crafted
the specific pattern set that I'm hoping will be useful at exercising
the lowering code, but I've not (and could not) manually verify *all* of
these. I've spot checked and they seem legit to me.

As with the rest of vector shuffling, at a certain point the only really
useful way to check the correctness of this stuff is through fuzz
testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218267 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 20:25:08 +00:00
Ehsan Akhgari
a956b28d32 Make MCAsmParserSemaCallback::LookupInlineAsmLabel a pure virtual function
Summary:
r218229 made this function return a dummy nullptr in order to avoid
API breakage between clang/llvm.

Reviewers: rnk

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5432

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218266 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 19:49:07 +00:00
Sanjay Patel
6539887847 Use broadcasts to optimize overall size when loading constant splat vectors (x86-64 with AVX or AVX2).
We generate broadcast instructions on CPUs with AVX2 to load some constant splat vectors.
This patch should preserve all existing behavior with regular optimization levels, 
but also use splats whenever possible when optimizing for *size* on any CPU with AVX or AVX2.

The tradeoff is up to 5 extra instruction bytes for the broadcast instruction to save
at least 8 bytes (up to 31 bytes) of constant pool data.

Differential Revision: http://reviews.llvm.org/D5347



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218263 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 18:54:01 +00:00
Akira Hatanaka
73c604b290 Fix test case commited in r218242 to appease buildbot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218261 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 18:07:20 +00:00
Tom Stellard
e1bc40b1e6 Revert "R600/SI: Add support for global atomic add"
This reverts commit r218254.

The global_atomics.ll test fails with asserts disabled.  For some reason,
the compiler fails to produce the atomic no return variants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218257 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 16:44:04 +00:00
Frederic Riss
22d448775e Fix a test introduced in r218246 to work also on Windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218255 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 16:17:32 +00:00
Tom Stellard
6d625ad495 R600/SI: Add support for global atomic add
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218254 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 15:35:35 +00:00
Tom Stellard
2de7c388a6 R600/SI: Remove modifier operands from V_CNDMASK_B32_e64
Modifiers don't work for this instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218253 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 15:35:34 +00:00
Tom Stellard
a05b67769e R600: Don't set BypassSlowDiv for 64-bit division
BypassSlowDiv is used by codegen prepare to insert a run-time
check to see if the operands to a 64-bit division are really 32-bit
values and if they are it will do 32-bit division instead.

This is not useful for R600, which has predicated control flow since
both the 32-bit and 64-bit paths will be executed in most cases.  It
also increases code size which can lead to more instruction cache
misses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218252 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 15:35:32 +00:00
Tom Stellard
e2badaf84f R600/SI: Use ISD::MUL instead of ISD::UMULO when lowering division
ISD::MUL and ISD:UMULO are the same except that UMULO sets an overflow
bit.  Since we aren't using the overflow bit, we should use ISD::MUL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218251 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 15:35:30 +00:00
Tom Stellard
2c4a45fa67 R600/SI: Add enums for some hard-coded values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218250 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 15:35:29 +00:00
Pavel Chupin
25c57d5cfe [x32] Fix segmented stacks support
Summary:
Update segmented-stacks*.ll tests with x32 target case and make
corresponding changes to make them pass.

Test Plan: tests updated with x32 target

Reviewers: nadav, rafael, dschuff

Subscribers: llvm-commits, zinovy.nis

Differential Revision: http://reviews.llvm.org/D5245

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218247 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 13:11:35 +00:00
Frederic Riss
21e5bf8461 [dwarfdump] Dump full filenames as DW_AT_(decl|call)_file attribute values
Reviewers: dblaikie samsonov

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5192

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218246 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 12:36:04 +00:00
Frederic Riss
cc55b73867 Allow DWARFDebugInfoEntryMinimal::getSubroutineName to resolve cross-unit references.
Summary: getSubroutineName is currently only used by llvm-symbolizer, thus add a binary test containing a cross-cu inlining example.

Reviewers: samsonov, dblaikie

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5394

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218245 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 12:35:53 +00:00
Robert Lougher
2ee97f03a4 Fix assert when decoding PSHUFB mask
The PSHUFB mask decode routine used to assert if the mask index was out of
range (<0 or greater than the size of the vector).  The problem is, we can
legitimately have a PSHUFB with a large index using intrinsics.  The
instruction only uses the least significant 4 bits.  This change removes the
assert and masks the index to match the instruction behaviour.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218242 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 11:54:38 +00:00
Oliver Stannard
98ef3474ef Downgrade DWARF2 section limit error to a warning
We currently emit an error when trying to assemble a file with more
than one section using DWARF2 debug info. This should be a warning
instead, as the resulting file will still be usable, but with a
degraded debug illusion.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218241 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 10:45:16 +00:00
Hal Finkel
1e165a0d5e Update comment on AtomicRMWInst::Nand
As of July 2014, all backends have been updated to implement
AtomicRMWInst::Nand as ~(x & y) (and not as x & ~y, as some did previously).
This was added to the release notes in r212635 (and the LangRef had been
changed), but it seems that we forgot to update the header-file description.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218236 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 06:47:10 +00:00
Chandler Carruth
ec35919c9a [x86] Move the AVX v4i64 test cases down to group them together.
Increasingly I don't want to mix the integer and floating point tests,
especially with AVX where they are handled quite differently.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218233 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 03:05:23 +00:00
Jiangning Liu
de3646b278 Add two thresholds lvi-overdefined-BB-threshold and lvi-overdefined-threshold
for LVI algorithm. For a specific value to be lowered, when the number of basic
blocks being checked for overdefined lattice value is larger than
lvi-overdefined-BB-threshold, or the times of encountering overdefined value
for a single basic block is larger than lvi-overdefined-threshold, the LVI
algorithm will stop further lowering the lattice value.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218231 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 02:23:05 +00:00
Ehsan Akhgari
ffaafbe92d ms-inline-asm: Add a sema callback for looking up label names
The implementation of the callback in clang's Sema will return an
internal name for labels.

Test Plan: Will be tested in clang.

Reviewers: rnk

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D4587

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218229 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 02:21:35 +00:00
Chandler Carruth
de95c380c7 [x86] Back out a bad choice about lowering v4i64 and pave the way for
a more sane approach to AVX2 support.

Fundamentally, there is no useful way to lower integer vectors in AVX.
None. We always end up with a VINSERTF128 in the end, so we might as
well eagerly switch to the floating point domain and do everything
there. This cleans up lots of weird and unlikely to be correct
differences between integer and floating point shuffles when we only
have AVX1.

The other nice consequence is that by doing things this way we will make
it much easier to write the integer lowering routines as we won't need
to duplicate the logic to check for AVX vs. AVX2 in each one -- if we
actually try to lower a 256-bit vector as an integer vector, we have
AVX2 and can rely on it. I think this will make the code much simpler
and more comprehensible.

Currently, I've disabled *all* support for AVX2 so that we always fall
back to AVX. This keeps everything working rather than asserting. That
will go away with the subsequent series of patches that provide
a baseline AVX2 implementation.

Please note, I'm going to implement AVX2 *without access to hardware*.
That means I cannot correctness test this path. I will be relying on
those with access to AVX2 hardware to do correctness testing and fix
bugs here, but as a courtesy I'm trying to sketch out the framework for
the new-style vector shuffle lowering in the context of the AVX2 ISA.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218228 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 00:32:15 +00:00
Chandler Carruth
37bb4b0365 [x86] Teach the new vector shuffle lowering how to cleverly lower single
input v8f32 shuffles which are not 128-bit lane crossing but have
different shuffle patterns in the low and high lanes. This removes most
of the extract/insert traffic that was unnecessary and is particularly
good at lowering cases where only one of the two lanes is shuffled at
all.

I've also added a collection of test cases with undef lanes because this
lowering is somewhat more sensitive to undef lanes than others.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218226 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-21 23:46:13 +00:00
Chandler Carruth
7da57cf5b4 [x86] Add a bunch of test cases where we have different shuffle patterns
in the high and low 128-bit lanes of a v8f32 vector.

No functionality change yet, but wanted to set up the baseline for my
next patch which will make these quite a bit better. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218224 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-21 23:32:42 +00:00
Matt Arsenault
b16c657c18 Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218223 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-21 17:27:32 +00:00
Matt Arsenault
19ebadd716 Use llvm_unreachable instead of assert(!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218222 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-21 17:27:31 +00:00
Matt Arsenault
c65f7bcf77 R600/SI: Don't use strings for single characters
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218221 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-21 17:27:28 +00:00
Lang Hames
52eebba413 Remove redundant if test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218220 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-21 17:21:56 +00:00
Sanjay Patel
3e05b40fd0 Refactor reciprocal square root estimate into target-independent function; NFC.
This is purely a plumbing patch. No functional changes intended.

The ultimate goal is to allow targets other than PowerPC (certainly X86 and Aarch64) to turn this:

z = y / sqrt(x)

into:

z = y * rsqrte(x)

using whatever HW magic they can use. See http://llvm.org/bugs/show_bug.cgi?id=20900 .

The first step is to add a target hook for RSQRTE, take the already target-independent code selfishly hoarded by PPC, and put it into DAGCombiner.

Next steps:

    The code in DAGCombiner::BuildRSQRTE() should be refactored further; tests that exercise that logic need to be added.
    Logic in PPCTargetLowering::BuildRSQRTE() should be hoisted into DAGCombiner.
    X86 and AArch64 overrides for TargetLowering.BuildRSQRTE() should be added.

Differential Revision: http://reviews.llvm.org/D5425



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218219 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-21 15:19:15 +00:00
Sanjay Patel
42dac6565f mop up: "Don’t duplicate function or class name at the beginning of the comment."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218218 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-21 14:48:16 +00:00
Chandler Carruth
974e872b03 [x86] With the stronger canonicalization of shuffles added in r218216,
the new vector shuffle lowering no longer needs to check both symmetric
forms of UNPCK patterns for v4f64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218217 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-21 13:37:51 +00:00
Chandler Carruth
974542d7d8 [x86] Teach the new vector shuffle lowering to re-use the SHUFPS
lowering when it can use a symmetric SHUFPS across both 128-bit lanes.

This required making the SHUFPS lowering tolerant of other vector types,
and adjusting our canonicalization to canonicalize harder.

This is the last of the clever uses of symmetry I've thought of for
v8f32. The rest of the tricks I'm aware of here are to work around
assymetry in the mask.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218216 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-21 13:35:14 +00:00
Chandler Carruth
38e181630a [x86] Refactor the logic to form SHUFPS instruction patterns to lower
a generic vector shuffle mask into a helper that isn't specific to the
other things that influence which choice is made or the specific types
used with the instruction.

No functionality changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218215 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-21 13:03:00 +00:00
Chandler Carruth
1a5f7f54f4 [x86] Teach the new vector shuffle lowering the basics about insertion
of a single element into a zero vector for v4f64 and v4i64 in AVX.
Ironically, there is less to see here because xor+blend is so crazy fast
that we can't really beat that to zero the high 128-bit lane.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218214 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-21 12:49:46 +00:00