114271 Commits

Author SHA1 Message Date
Joseph Tremoulet
52d8fd61ea [InstCombine] Avoid iteration/mutation conflict
Summary:
When iterating users of a multiply in processUMulZExtIdiom, the
call to setOperand in the truncation case may replace the use
being visited; make sure the iterator has been advanced before
doing that replacement.

Reviewers: majnemer, davide

Reviewed By: davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D48192

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334844 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 16:52:40 +00:00
Sander de Smalen
4b7915e49a [AArch64][SVE] Asm: Support for CPY SIMD/FP and GPR instructions.
Predicated splat/copy of SIMD/FP register or general purpose
register to SVE vector, along with MOV-aliases.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334842 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 16:39:46 +00:00
Jordan Rose
187c713c75 Avoid copying PrettyStackTrace messages an extra time on Apple OSs
We were unnecessarily going from SmallString to std::string just to
get a null-terminated C string. So just...don't do that. Crash
slightly faster!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334841 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 16:35:31 +00:00
Diego Caballero
ff160b6333 [LV] Prevent LV to run cost model twice for VF=2
This is a minor fix for LV cost model, where the cost for VF=2 was
computed twice when the vectorization of the loop was forced without
specifying a VF.

Reviewers: xusx595, hsaito, fhahn, mkuper

Reviewed By: hsaito, xusx595

Differential Revision: https://reviews.llvm.org/D48048


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334840 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 16:21:35 +00:00
Sander de Smalen
df60d71070 [AArch64][SVE] Asm: Support for INC/DEC (scalar) instructions.
Increment/decrement scalar register by (scaled) element count given by
predicate pattern, e.g. 'incw x0, all, mul #4'.

Reviewers: rengolin, fhahn, SjoerdMeijer, samparker, javed.absar

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D47713



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334838 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 15:47:44 +00:00
Matt Arsenault
bd0b6b0e98 AMDGPU: Add combine for short vector extract_vector_elts
Try to access pieces 4 bytes at a time. This helps
various hasOneUse extract_vector_elt combines, such
as load width reductions.

Avoids test regressions in a future commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334836 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 15:31:36 +00:00
Matt Arsenault
9e41f5314e AMDGPU: Make v4i16/v4f16 legal
Some image loads return these, and it's awkward working
around them not being legal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334835 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 15:15:46 +00:00
Sander de Smalen
4ba09bb387 [AArch64][SVE] Asm: Support for FADD, FMUL and FMAX immediate instructions.
Reviewers: rengolin, fhahn, SjoerdMeijer, samparker, javed.absar

Reviewed By: javed.absar

Differential Revision: https://reviews.llvm.org/D47712


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334831 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 13:57:51 +00:00
Bjorn Pettersson
0ac3f0a4d9 Re-apply "[DebugInfo] Check size of variable in ConvertDebugDeclareToDebugValue"
This is r334704 (which was reverted in r334732) with a fix for
types like x86_fp80. We need to use getTypeAllocSizeInBits and
not getTypeStoreSizeInBits to avoid dropping debug info for
such types.

Original commit msg:
> Summary:
> Do not convert a DbgDeclare to DbgValue if the store
> instruction only refer to a fragment of the variable
> described by the DbgDeclare.
>
> Problem was seen when for example having an alloca for an
> array or struct, and there were stores to individual elements.
> In the past we inserted a DbgValue intrinsics for each store,
> just as if the store wrote the whole variable.
>
> When handling store instructions we insert a DbgValue that
> indicates that the variable is "undefined", as we do not know
> which part of the variable that is updated by the store.
>
> When ConvertDebugDeclareToDebugValue is used with a load/phi
> instruction we assert that the referenced value is large enough
> to cover the whole variable. Afaict this should be true for all
> scenarios where those methods are used on trunk. If the assert
> blows in the future I guess we could simply skip to insert a
> dbg.value instruction.
>
> In the future I think we should examine which part of the variable
> that is accessed, and add a DbgValue instrinsic with an appropriate
> DW_OP_LLVM_fragment expression.
>
> Reviewers: dblaikie, aprantl, rnk
>
> Reviewed By: aprantl
>
> Subscribers: JDevlieghere, llvm-commits
>
> Tags: #debug-info
>
> Differential Revision: https://reviews.llvm.org/D48024

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334830 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 13:48:55 +00:00
Simon Dardis
16d63b172e [mips] Add licensing information of the microMIPS tablegen files. (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334827 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 13:29:35 +00:00
Sander de Smalen
dde50dc133 [AArch64][SVE] Asm: Add parsing/printing support for exact FP immediates.
Some instructions require of a limited set of FP immediates as operands,
for example '#0.5 or #1.0' for SVE's FADD instruction.

This patch adds support for parsing and printing such FP immediates as
exact values (e.g. #0.499999 is not accepted for #0.5).

Reviewers: rengolin, fhahn, SjoerdMeijer, samparker, javed.absar

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D47711



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334826 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 13:11:49 +00:00
Matt Arsenault
bd512dd0f9 DAG: Fix creating concat_vectors with illegal type
Test passes as is, but fails with future patch to make v4i16/v4f16
legal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334823 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 12:09:15 +00:00
Roman Lebedev
ae2a6132b3 [InstCombine] Recommit: Fold (x << y) >> y -> x & (-1 >> y)
Summary:
We already do it for splat constants, but not just values.
Also, undef cases are mostly non-functional.

The original commit was reverted because
it broke tests for amdgpu backend, which i didn't check.
Now, the backed was updated to recognize these new
patterns, so we are good.

https://bugs.llvm.org/show_bug.cgi?id=37603
https://rise4fun.com/Alive/cplX

Reviewers: spatel, craig.topper, mareko, bogner, rampitec, nhaehnle, arsenm

Reviewed By: spatel, rampitec, nhaehnle

Subscribers: wdng, nhaehnle, llvm-commits

Differential Revision: https://reviews.llvm.org/D47980

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334818 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 09:56:52 +00:00
Roman Lebedev
f2c20b5ace [AMDGPU] Recognize x & ~(-1 << y) pattern.
Summary: The same pattern as D48010, but this one is IR-canonical as of D47428.

Reviewers: nhaehnle, bogner, tstellar, arsenm

Reviewed By: arsenm

Subscribers: arsenm, kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Tags: #amdgpu

Differential Revision: https://reviews.llvm.org/D48012

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334817 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 09:56:45 +00:00
Roman Lebedev
fc84800456 [AMDGPU] Recognize x & ((1 << y) - 1) pattern.
Summary:
As a followup for D48007.

Since we already handle `x << (bitwidth - y) >> (bitwidth - y)` pattern,
which does not have ub for both the edge cases (`y == 0`, `y == bitwidth`),
i think also handling a pattern that is ub for `y == bitwidth` should be fine.

Reviewers: nhaehnle, bogner, tstellar, arsenm

Reviewed By: arsenm

Subscribers: arsenm, kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Tags: #amdgpu

Differential Revision: https://reviews.llvm.org/D48010

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334816 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 09:56:39 +00:00
Roman Lebedev
1d9a02a498 [AMDGPU] Recognize x & (-1 >> (32 - y)) pattern.
Summary:
D47980 will canonicalize the `x << (32 - y) >> (32 - y)`,
which is the pattern the AMDGPU expects to `x &  (-1 >> (32 - y))`,
which is not recognized by AMDGPU.

Thus, it needs to be recognized, too.

Reviewers: nhaehnle, bogner, tstellar, arsenm

Reviewed By: arsenm

Subscribers: arsenm, kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Tags: #amdgpu

Differential Revision: https://reviews.llvm.org/D48007

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334815 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 09:56:31 +00:00
Peter Smith
565bf54c1c [MC] Move bundling and MCSubtargetInfo to MCEncodedFragment [NFC]
Instruction bundling is only supported on descendants of the
MCEncodedFragment type. By moving the bundling functionality and
MCSubtargetInfo to this class it makes it easier to set and extract the
MCSubtargetInfo when it is necessary.

This is a refactoring change that will make it easier to pass the
MCSubtargetInfo through to writeNops when nop padding is required.

Differential Revision: https://reviews.llvm.org/D45959



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334814 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 09:48:18 +00:00
Craig Topper
f045c54f1a Revert r334802 "[X86] Prevent folding stack reloads with instructions that have an undefined register update."
There's a typo causing the build to fail.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334803 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 06:15:26 +00:00
Craig Topper
f26b24c487 [X86] Prevent folding stack reloads with instructions that have an undefined register update.
We want to keep the load unfolded so we can use the same register for both sources to avoid a false dependency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334802 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 06:11:36 +00:00
Craig Topper
055e27a2ce [X86] Add more instructions to the memory folding tables using the autogenerated table as a guide.
I think this covers most of the unmasked vector instructions. We're still missing a lot of the masked instructions.

There are some test changes here because of the new folding support. I don't think these particular cases should be folded because it creates an undef register dependency. I think the changes introduced in r334175 are not handling stack folding. They're only blocking the peephole pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334800 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 05:49:19 +00:00
Craig Topper
61c89e393d [X86] Add 'Z' to the internal names of various EVEX instructions for overall consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334785 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 04:42:54 +00:00
Andrew Kaylor
156c4a865a Add debug info for OProfile profiling support
Patch by Gaetano Priori

Differential Revision: https://reviews.llvm.org/D47925



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334782 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-15 00:07:28 +00:00
Eli Friedman
caa16eabb4 Make uitofp and sitofp defined on overflow.
IEEE 754 defines the expected result on overflow. As far as I know,
hardware implementations (of f16), and compiler-rt (__floatuntisf)
correctly return +-Inf on overflow. And I can't think of any useful
transform that would take advantage of overflow being undefined here.

Differential Revision: https://reviews.llvm.org/D47807



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334777 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 22:58:48 +00:00
Lang Hames
a94df7d526 [ORC] Strip weak flags from a symbol once it is selected for materialization.
Once a symbol has been selected for materialization it can no longer be
overridden. Stripping the weak flag guarantees this (override attempts will
then be treated as duplicate definitions and result in a DuplicateDefinition
error).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334771 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 21:16:29 +00:00
Michael Berg
11f1b27ce7 easing the constraint for isNegatibleForFree and GetNegatedExpression
Summary:
Here we relax the old constraint which utilized unsafe with the TargetOption flag HonorSignDependentRoundingFPMathOption, with the assertion that unsafe is no longer needed or never was required for correctness on FDIV/FMUL.  



Reviewers: spatel, hfinkel, wristow, arsenm, javed.absar

Reviewed By: spatel

Subscribers: efriedma, wdng, tpr

Differential Revision: https://reviews.llvm.org/D48057

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334769 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 20:54:13 +00:00
George Burgess IV
1967f637b4 [MSSA] Print more optimization information
In particular, when asked to print a MemoryAccess, we'll now print where
defs are optimized to, and we'll print optimized access types.

This patch also introduces an operator<< to make printing AliasResults
easier.

Patch by Juneyoung Lee!

Differential Revision: https://reviews.llvm.org/D47860


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334760 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 19:55:53 +00:00
Sanjay Patel
a641736633 [x86] be more selective about converting 'and' to shuffle (PR37749)
isVectorClearMaskLegal() is the TLI hook used by the generic
DAGCombiner::XformToShuffleWithZero().

We've grown to accomodate/expect this transform to shuffle
(disabling it more generally results in many regressions).
So I'm narrowly excluding the 256-bit types that clearly 
are not worthwhile for AVX1. 

I think in most cases we are able to recover by converting 
the shuffle back into 'and' ops, but the cases in:
https://bugs.llvm.org/show_bug.cgi?id=37749
...show that there are cracks.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334759 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 19:55:02 +00:00
Craig Topper
b261e10390 [X86] Fix stale comment in folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334758 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 19:28:31 +00:00
Tom Stellard
b4220f48ed AMDGPU/GlobalISel: Implement select() for @llvm.amdgcn.cvt.pkrtz
Reviewers: arsenm, nhaehnle

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D45907

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334757 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 19:26:37 +00:00
Justin Bogner
3d2940410b Re-apply "[VirtRegRewriter] Avoid clobbering registers when expanding copy bundles"
This is r334750 (which was reverted in r334754) with a fix for an
uninitialized variable that was caught by msan.

Original commit message:
> If a copy bundle happens to involve overlapping registers, we can end
> up with emitting the copies in an order that ends up clobbering some
> of the subregisters. Since instructions in the copy bundle
> semantically happen at the same time, this is incorrect and we need to
> make sure we order the copies such that this doesn't happen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334756 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 19:24:03 +00:00
Justin Bogner
a9f3f668fc Revert "[VirtRegRewriter] Avoid clobbering registers when expanding copy bundles"
There's an msan failure:

  http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/19549

This reverts r334750.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334754 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 19:10:57 +00:00
Michael Berg
4bfcd6ff01 updating isNegatibleForFree and GetNegatedExpression with fmf for fadd
Summary:  A FMF constraint is added to FADD with unsafe still available as the fallback

Reviewers: spatel, wristow, arsenm, hfinkel

Reviewed By: spatel

Subscribers: wdng

Differential Revision: https://reviews.llvm.org/D48180

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334753 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 18:48:31 +00:00
Sam Clegg
10cde000da [WebAssembly] Ignore explicit section names for functions
WebAssembly doesn't support more than one function per section
and we rely on function sections being unique. This change ignores
the section provided by the function to avoid two functions being
in the same section.

Without this change the object writer produces the following
error for this test:
 LLVM ERROR: section already has a defining function: baz

Differential Revision: https://reviews.llvm.org/D48178

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334752 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 18:48:19 +00:00
Justin Bogner
a1b4efd4bd [VirtRegRewriter] Avoid clobbering registers when expanding copy bundles
If a copy bundle happens to involve overlapping registers, we can end
up with emitting the copies in an order that ends up clobbering some
of the subregisters. Since instructions in the copy bundle
semantically happen at the same time, this is incorrect and we need to
make sure we order the copies such that this doesn't happen.

Differential Revision: https://reviews.llvm.org/D48154

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334750 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 18:32:55 +00:00
Justin Lebar
ad5cfb94bc [SCEV] Fix a variable name, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334738 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 17:14:01 +00:00
Justin Lebar
3edd5bf908 [SCEV] Simplify zext/trunc idiom that appears when handling bitmasks.
Summary:
Specifically, we transform

  zext(2^K * (trunc X to iN)) to iM ->
  2^K * (zext(trunc X to i{N-K}) to iM)<nuw>

This is helpful because pulling the 2^K out of the zext allows further
optimizations.

Reviewers: sanjoy

Subscribers: hiraditya, llvm-commits, timshen

Differential Revision: https://reviews.llvm.org/D48158

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334737 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 17:13:48 +00:00
Justin Lebar
4090ce2a16 [SCEV] Simplify trunc-of-add/mul to add/mul-of-trunc under more circumstances.
Summary:
Previously we would do this simplification only if it did not introduce
any new truncs (excepting new truncs which replace other cast ops).

This change weakens this condition: If the number of truncs stays the
same, but we're able to transform trunc(X + Y) to X + trunc(Y), that's
still simpler, and it may open up additional transformations.

While we're here, also clean up some duplicated code.

Reviewers: sanjoy

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D48160

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334736 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 17:13:35 +00:00
Justin Lebar
bcaa109652 [SCEV] Fix indentation and combine two if statements in getMulExpr, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334735 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 17:13:22 +00:00
Sam Clegg
80e4916fc9 Revert "[MC] Factor MCObjectStreamer::addFragmentAtoms out of MachO streamer."
This reverts rL331412.  We didn't up using fragment atoms
in the wasm object writer after all.

Differential Revision: https://reviews.llvm.org/D48173

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334734 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 17:11:19 +00:00
Bjorn Pettersson
2522f2ba38 Revert rL334704: "[DebugInfo] Check size of variable in ConvertDebugDeclareToDebugValue"
This reverts commit r334704.

Buildbots detected an assertion in "test tsan in debug compiler-rt build".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334732 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 16:08:22 +00:00
Nirav Dave
8f682e9960 Avoid unused variable in non-assert builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334731 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 15:55:15 +00:00
Nirav Dave
f5c585b6fd [DAG] Avoid needing to walk out legalization tables. NFCI.
To avoid redundant work, during DAG legalization we keep tables
mapping pre-legalized SDValues to post-legalized SDValues and a
SDValue-to-SDValue map to enable fast node replacements. However, as
the keys are nodes which may be reused it is possible that an entry in
a table refers to a now deleted node N (that should have been renamed
by the value replacement map) while a new node N' exists. If N' is
then replaced that entry would be wrong. Previously we avoided this by
when potentially violating this property, walking every table and
updating all node pointers. This is very expensive but hopefully rare
occurance.

This patch assigns each instance of a SDValue used in legalization a
unique id and uses these ids in the legalization tables. This avoids
any such aliasing issue, avoiding the full table search and allowing
more aggressive incremental table pruning.

In some cases this is a 1000x speedup to compilation.

Reviewers: jyknight, echristo, bogner, tra

Reviewed By: bogner

Subscribers: dberris, grandinj, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D47959

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334729 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 15:46:23 +00:00
Craig Topper
b179f7438d [X86] Add more vector instructions to the memory folding table using the autogenerated table as a guide.
The test cahnge is because we now fold stack reload into RNDSCALE and RNDSCALE can be turned into ROUND by EVEX->VEX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334728 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 15:40:31 +00:00
Craig Topper
a56239d6e3 [X86] Remove '128' from the internal name of some scalar FP instructions to be consistent with other scalar instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334727 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 15:40:30 +00:00
Craig Topper
8a9fc632eb [X86] Disable load unfolding for a bunch of instruction where unfolding would increase the size of the load.
Found by an audit of the manual table vs the autogenerated table.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334726 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 15:40:29 +00:00
Craig Topper
474c12cb48 [X86] Remove NotMemoryFoldable from some AVX/AVX512 scalar instructions.
Some of these instructions are already in the manual folding table so we should have them in the auto table too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334725 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 15:40:27 +00:00
Lang Hames
c6679d1e09 [ORC] Filter out self-dependencies in VSO::addDependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334724 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 15:32:59 +00:00
Lang Hames
6ba3aa8738 [ORC] Assert that the query argument to VSO::lookup must be non-null.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334723 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 15:32:59 +00:00
Lang Hames
26907984ce [ORC] Add a WaitUntilReady argument to blockingLookup.
If WaitUntilReady is set to true then blockingLookup will return once all
requested symbols are ready. If WaitUntilReady is set to false then
blockingLookup will return as soon as all requested symbols have been
resolved. In the latter case, if any error occurs in finalizing the symbols it
will be reported to the ExecutionSession, rather than returned by
blockingLookup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334722 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 15:32:58 +00:00
Lang Hames
103c75a7db [ORC] Strip the Materializing flag off finalized symbols in VSOs.
Finalized symbols are no longer in the materializing state.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334721 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-14 15:32:56 +00:00