Commit Graph

1541 Commits

Author SHA1 Message Date
Han Shen d84132e455 Fix the test case that places intermediate in source directory.
This causes "permission denied" error in some controlled test environment where source tree is read-only.

Differential Revision: https://reviews.llvm.org/D47839



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334114 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-06 18:53:17 +00:00
Peter Smith e2b2a91087 [MC] Pass MCSubtargetInfo to fixupNeedsRelaxation and applyFixup
On targets like Arm some relaxations may only be performed when certain
architectural features are available. As functions can be compiled with
differing levels of architectural support we must make a judgement on
whether we can relax based on the MCSubtargetInfo for the function. This
change passes through the MCSubtargetInfo for the function to
fixupNeedsRelaxation so that the decision on whether to relax can be made
per function. In this patch, only the ARM backend makes use of this
information. We must also pass the MCSubtargetInfo to applyFixup because
some fixups skip error checking on the assumption that relaxation has
occurred, to prevent code-generation errors applyFixup must see the same
MCSubtargetInfo as fixupNeedsRelaxation.

Differential Revision: https://reviews.llvm.org/D44928



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334078 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-06 09:40:06 +00:00
Peter Smith 13e7624a74 [MC][ARM] Add range checking for Thumb2 resolved fixups.
When the branch target of a Thumb2 unconditional or conditonal branch is
resolved at assembly time, no range checking is performed on the result
leading to incorrect immediates. This change adds a range check:
+- 16 Megabytes for unconditional branches, +- 1 Megabyte for the
conditional branch.

Differential Revision: https://reviews.llvm.org/D46306



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333997 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-05 10:00:56 +00:00
Peter Smith 7fd3761e18 [MC][ARM] Correct Thumb BL instruction range
The Thumb BL range is + or - either 16 Megabytes or 4 Megabytes depending
on whether the CPU supports Thumb2 or the v8-m baseline ops. The existing
check for BL range is incorrectly set at +- 32 Megabytes. This change
corrects the higher range and uses the lower range if the featurebits
don't have the necessary support for it.

Differential Revision: https://reviews.llvm.org/D46305



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333991 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-05 09:32:28 +00:00
Nirav Dave cdcd5e1cac [MC] Relax .fill size requirements
Avoid requirement that number of values must be known at assembler
time.

Fixes PR33586.

Reviewers: rnk, peter.smith, echristo, jyknight

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D46703

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332741 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-18 17:45:48 +00:00
Shiva Chen a8a13bc662 [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
In order to set breakpoints on labels and list source code around
labels, we need collect debug information for labels, i.e., label
name, the function label belong, line number in the file, and the
address label located. In order to keep these information in LLVM
IR and to allow backend to generate debug information correctly.
We create a new kind of metadata for labels, DILabel. The format
of DILabel is

!DILabel(scope: !1, name: "foo", file: !2, line: 3)

We hope to keep debug information as much as possible even the
code is optimized. So, we create a new kind of intrinsic for label
metadata to avoid the metadata is eliminated with basic block.
The intrinsic will keep existing if we keep it from optimized out.
The format of the intrinsic is

llvm.dbg.label(metadata !1)

It has only one argument, that is the DILabel metadata. The
intrinsic will follow the label immediately. Backend could get the
label metadata through the intrinsic's parameter.

We also create DIBuilder API for labels to be used by Frontend.
Frontend could use createLabel() to allocate DILabel objects, and use
insertLabel() to insert llvm.dbg.label intrinsic in LLVM IR.

Differential Revision: https://reviews.llvm.org/D45024

Patch by Hsiangkai Wang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331841 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-09 02:40:45 +00:00
Mikhail Maltsev 4634fe0cb4 [ARM] Do not convert some vmov instructions
Summary:
Patch https://reviews.llvm.org/D44467 implements conversion of invalid
vmov instructions into valid ones. It turned out that some valid
instructions also get converted, for example

  vmov.i64 d2, #0xff00ff00ff00ff00 ->
  vmov.i16 d2, #0xff00

Such behavior is incorrect because according to the ARM ARM section
F2.7.7 Modified immediate constants in T32 and A32 Advanced SIMD
instructions, "On assembly, the data type must be matched in the table
if possible."

This patch fixes the isNEONmovReplicate check so that the above
instruction is not modified any more.

Reviewers: rengolin, olista01

Reviewed By: rengolin

Subscribers: javed.absar, kristof.beyls, rogfer01, llvm-commits

Differential Revision: https://reviews.llvm.org/D44678

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329158 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-04 08:54:19 +00:00
Paul Robinson 274009662f Reapply "[DWARFv5] Emit file 0 to the line table."
DWARF v5 specifies that the root file (also given in the DW_AT_name
attribute of the compilation unit DIE) should be emitted explicitly to
the line table's list of files.  This makes the line table more
independent of the .debug_info section.
We emit the new syntax only for DWARF v5 and later.

Fixes the bug found by asan. Also XFAIL the new test for Darwin, which
is stuck on DWARF v2, and fix up other tests so they stop failing on
Windows.  Last but not least, don't break "clang -g" of an assembler
file that has .file directives in it.

Differential Revision: https://reviews.llvm.org/D44054

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328805 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-29 17:16:41 +00:00
Alexander Potapenko 7323a7bf80 Revert "Reapply "[DWARFv5] Emit file 0 to the line table.""
This reverts commit r328676.

Commit r328676 broke the -no-integrated-as flag necessary to build Linux kernel with Clang:

$ cat t.c
void foo() {}
$ clang -no-integrated-as   -c  t.c -g
/tmp/t-dcdec5.s: Assembler messages:
/tmp/t-dcdec5.s:8: Error: file number less than one
clang-7.0: error: assembler command failed with exit code 1 (use -v to see invocation)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328699 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-28 12:36:46 +00:00
Paul Robinson 973d7ed6e9 Reapply "[DWARFv5] Emit file 0 to the line table."
DWARF v5 specifies that the root file (also given in the DW_AT_name
attribute of the compilation unit DIE) should be emitted explicitly to
the line table's list of files.  This makes the line table more
independent of the .debug_info section.

Fixes the bug found by asan. Also XFAIL the new test for Darwin, which
is stuck on DWARF v2, and fix up other tests so they stop failing on
Windows.  Last but not least, don't break "clang -g" of an assembler
file that has .file directives in it.

Differential Revision: https://reviews.llvm.org/D44054

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328676 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-27 22:40:34 +00:00
Martin Storsjo 20ec3b01c7 [ARM] Error out on .arm assembler directives on windows
Windows on arm is thumb only.

Differential Revision: https://reviews.llvm.org/D43005

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328298 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-23 09:10:03 +00:00
Mikhail Maltsev 91d396d6ec [ARM] Convert more invalid NEON immediate loads
Summary:
Currently the LLVM MC assembler is able to convert e.g.

  vmov.i32 d0, #0xabababab

(which is technically invalid) into a valid instruction

  vmov.i8 d0, #0xab

this patch adds support for vmov.i64 and for cases with the resulting
load types other than i8, e.g.:

  vmov.i32 d0, #0xab00ab00 ->
  vmov.i16 d0, #0xab00

Reviewers: olista01, rengolin

Reviewed By: rengolin

Subscribers: rengolin, javed.absar, kristof.beyls, rogfer01, llvm-commits

Differential Revision: https://reviews.llvm.org/D44467

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327709 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-16 14:10:56 +00:00
Mikhail Maltsev c96f2d40f9 [ARM] Fix a check in vmov/vmvn immediate parsing
Summary:
Currently the check is incorrect and the following invalid
instruction is accepted and incorrectly assembled:

  vmov.i32        d2, #0x00a500a6

This patch fixes the issue.

Reviewers: olista01, rengolin

Reviewed By: rengolin

Subscribers: SjoerdMeijer, javed.absar, rogfer01, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D44460

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327704 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-16 12:46:49 +00:00
Rafael Espindola 9e6c29a2f0 Don't treat .symver as a regular alias definition.
This patch starts simplifying the handling of .symver.

For now it just moves the responsibility for creating an alias down to
the streamer. With that the asm streamer can pass a .symver unchanged,
which is nice since gas cannot parse "foo@bar = zed".

In a followup I hope to move the handling down to the writer so that
we don't need special hacks for avoiding breaking names with @@@ on
windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327101 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-09 03:13:37 +00:00
Alexander Kornienko b0846f97d6 Revert "Reapply "[DWARFv5] Emit file 0 to the line table.""
This reverts commit r326839.

r326839 breaks assembly file parsing:

$ cat q.c
void g() {}
$ clang -S q.c -g
$ clang -g -c q.s
q.s:9:2: error: file number already allocated
     .file   1 "/tmp/test" "q.c"
     ^

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326902 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-07 16:27:44 +00:00
Paul Robinson c7343198ca Reapply "[DWARFv5] Emit file 0 to the line table."
Fixes the bug found by asan. Also XFAIL the new test for Darwin,
which is stuck on DWARF v2, and fix up other tests so they stop
failing on Windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326839 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-06 22:37:45 +00:00
Simi Pallipurath 0cf7d296a2 [ARM]Decoding MSR with unpredictable destination register causes an assert
This patch handling:

    Enable parsing of raw encodings of system registers .
    Allows UNPREDICTABLE sysregs to be decoded to a raw number in the same way that disasslib does, rather than llvm crashing.
    Disassemble msr/mrs with unpredictable sysregs as SoftFail.
    Fix regression due to SoftFailing some encodings.

Patch by Chris Ryder

Differential revision:https://reviews.llvm.org/D43374

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326803 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-06 15:21:19 +00:00
Paul Robinson bc32224980 Revert "[DWARFv5] Emit file 0 to the line table."
Caused an asan failure.

This reverts commit d54883f081186cdcce74e6f98cfc0438579ec019.
aka r326758

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326762 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-06 03:15:21 +00:00
Paul Robinson 13c8f235f1 [DWARFv5] Emit file 0 to the line table.
DWARF v5 specifies that the root file (also given in the DW_AT_name
attribute of the compilation unit DIE) should be emitted explicitly to
the line table's list of files.  This makes the line table more
independent of the .debug_info section.

Differential Revision: https://reviews.llvm.org/D44054

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326758 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-06 01:59:56 +00:00
Oliver Stannard 4a9afc559e [ARM][Asm] VMOVSRR and VMOVRRS need sequential S registers
These instructions require that the two S registers are adjacent (but not the R
registers), because only the first register is included in the encoding, but we
were not checking this in the assembler.

Differential revision: https://reviews.llvm.org/D44084



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326696 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-05 13:27:26 +00:00
Scott Linder 5e4b515c4b [DebugInfo] Support DWARF v5 source code embedding extension
In DWARF v5 the Line Number Program Header is extensible, allowing values with
new content types. In this extension a content type is added,
DW_LNCT_LLVM_source, which contains the embedded source code of the file.

Add new optional attribute for !DIFile IR metadata called source which contains
source text. Use this to output the source to the DWARF line table of code
objects. Analogously extend METADATA_FILE in Bitcode and .file directive in ASM
to support optional source.

Teach llvm-dwarfdump and llvm-objdump about the new values. Update the output
format of llvm-dwarfdump to make room for the new attribute on file_names
entries, and support embedded sources for the -source option in llvm-objdump.

Differential Revision: https://reviews.llvm.org/D42765



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325970 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-23 23:01:06 +00:00
Andre Vieira 1a38f4851f [ARM] Don't print "Requires NEON" error message for M-profile
Differential Revision: https://reviews.llvm.org/D43125


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325000 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-13 11:46:38 +00:00
Oliver Stannard 32bbb278db [ELF] Print the .type assembly directive correctly for STT_NOTYPE
The llvm assembly parser and gas both accept "@notype" in the .type
assembly directive, but we were printing it as "@no_type", which isn't
accepted by either assembler.

Differential revision: https://reviews.llvm.org/D43116



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324731 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-09 13:34:39 +00:00
Paul Robinson f0574ca6a6 [DWARFv5] Fix dumper to show the file table starts at index 0.
Emitting the correct (root of compilation) file at index 0 will be
posted for review later; I wanted to get this minor change out of the
way first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324669 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-08 23:08:02 +00:00
Oliver Stannard 19cf5bffa2 [ARM][AArch64] Add CSDB speculation barrier instruction
This adds the CSDB instruction, which is a new barrier instruction
described by the whitepaper at [1].

This is in encoding space which was previously executed as a NOP, so it is
available for all targets that have the relevant NOP encoding space. This
matches the binutils behaviour for these instructions [2][3].

[1] https://developer.arm.com/support/security-update
[2] https://sourceware.org/ml/binutils/2018-01/msg00116.html
[3] https://sourceware.org/ml/binutils/2018-01/msg00120.html



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324324 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-06 09:24:47 +00:00
Paul Robinson c849b2e28e [DWARF] Regularize dumping strings from line tables.
The major visible difference here is that in line-table dumps,
directory and file names are wrapped in double-quotes; previously,
directory names got single quotes and file names were not quoted at
all.

The improvement in this patch is that when a DWARF v5 line table
header has indirect strings, in a verbose dump these will all have
their section[offset] printed as well as the name itself.  This
matches the format used for dumping strings in the .debug_info
section.

Differential Revision: https://reviews.llvm.org/D42802

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324270 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-05 20:43:15 +00:00
Yvan Roux 0d1ee416a9 [ARM] Add support for unpredictable MVN instructions.
This fixes bugzilla 33011
https://bugs.llvm.org/show_bug.cgi?id=33011

Defines bits {19-16} as zero or unpredictable as specified by the ARM ARM in
sections A8.8.116 and A8.8.117.

It fixes also the usage of PC register as destination register for MVN
register-shifted register version as specified in A8.8.117.

Differential Revision: https://reviews.llvm.org/D41905

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323954 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-01 12:06:57 +00:00
Paul Robinson dca3ef156e [DWARFv5] Number the line-table's directory array correctly.
The compilation directory has always been #0, but as of DWARF v5 it is
explicitly listed in the line-table section instead of implicitly
being a reference to the compile_unit DIE's DW_AT_comp_dir attribute.
This means the dumper should number the dumped array starting with 0
or 1 depending on the DWARF version of the line table.

References in the generated DWARF are correct, it's just the dumper
that was wrong.  Also some assembler-coded tests were similarly
confused about directory numbers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322884 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-18 20:33:35 +00:00
Jonas Devlieghere 231176041f [DebugInfo] Unify dumping of address ranges
Summary:
This patch unifies the printing of address ranges as [0x0, 0x1).

rdar://34822059

Reviewers: aprantl, dblaikie

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D42056

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322543 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-16 11:17:57 +00:00
Momchil Velikov 2e4bd2aa72 [ARM] Issue an erorr when non-general-purpose registers are used in address operands
Currently the assembler would accept, e.g. `ldr r0, [s0, #12]` and similar.
This patch add checks that only general-purpose registers are used in address
operands, shifted registers, and shift amounts.

Differential revision: https://reviews.llvm.org/D39910



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321866 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-05 13:28:10 +00:00
Oliver Stannard 1f052d6e5e [ARM] Fix endianness of Thumb .inst.w directive
Wide Thumb2 instructions should be emitted into the object file as pairs of
16-bit words of the appropriate endianness, not one 32-bit word.

Differential revision: https://reviews.llvm.org/D41185



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321799 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-04 13:56:40 +00:00
Benjamin Kramer 8e02a4b93a Fix tests after move to utohexstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321527 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-28 17:00:37 +00:00
Sam Parker dacebdf03d [ARM] Armv8-R DFB instruction
Implement MC support for the Armv8-R 'Data Full Barrier' instruction.

Differential Revision: https://reviews.llvm.org/D41430


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321256 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-21 11:17:49 +00:00
Paul Robinson 67f873792b [DWARFv5] Emit v5 line table header.
Differential Revision: https://reviews.llvm.org/D40741

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319827 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-05 20:35:00 +00:00
Francis Visoiu Mistrih ca0df55065 [CodeGen] Unify MBB reference format in both MIR and debug output
As part of the unification of the debug format and the MIR format, print
MBB references as '%bb.5'.

The MIR printer prints the IR name of a MBB only for block definitions.

* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g'
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g'
* find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g'
* grep -nr 'BB#' and fix

Differential Revision: https://reviews.llvm.org/D40422

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319665 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-04 17:18:51 +00:00
Oliver Stannard 9d9981028d Revert r319649 - [Asm, ARM] Add fallback diag for multiple invalid operands
This is causing a failure in the llvm-clang-x86_64-expensive-checks-win
buildbot, and I can't reproduce it locally, so reverting until I can work out
what is wrong.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319654 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-04 13:42:22 +00:00
Oliver Stannard a53a7f0627 [Asm, ARM] Add fallback diag for multiple invalid operands
This adds a "invalid operands for instruction" diagnostic for
instructions where there is an instruction encoding with the correct
mnemonic and which is available for this target, but where multiple
operands do not match those which were provided. This makes it clear
that there is some combination of operands that is valid for the current
target, which the default diagnostic of "invalid instruction" does not.

Since this is a very general error, we only emit it if we don't have a
more specific error.

Differential revision: https://reviews.llvm.org/D36747



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319649 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-04 12:02:32 +00:00
Oliver Stannard 3aae870071 [ARM] Add support for armv7e-m to the .arch directive
This will allow compilation of assembly files targeting armv7e-m without having
to specify the Tag_CPU_arch attribute as a workaround.

Differential revision: https://reviews.llvm.org/D40370

Patch by Ian Tessier!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319303 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-29 10:12:15 +00:00
Oliver Stannard 36acc9a9f4 [ARM] Remove pre-UAL FLDM/FSTM aliases
These are pre-UAL syntax, and we don't support any other pre-UAL instructions,
with the exception of FLDMX/FSTMX, which don't have a UAL equivalent. Therefore
there's no reason to keep them or their AsmParser hacks around.

With the AsmParser hacks removed, the FLDMX and FSTMX instructions get the same
operand diagnostics as the UAL instructions.

Differential revision: https://reviews.llvm.org/D39196



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318777 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-21 16:20:25 +00:00
Oliver Stannard 14544e6ee7 [ARM] Don't omit non-default predication code
This was causing the (invalid) predicated versions of the NEON VRINTX and
VRINTZ instructions to be accepted, with the condition code being ignored.

Also, there is no NEON VRINTR instruction, so that part of the check was not
necessary.

Differential revision: https://reviews.llvm.org/D39193



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318771 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-21 15:34:15 +00:00
Oliver Stannard 252ae7370a [Asm] Improve "too few operands" errors
- We can still emit this error if the actual instruction has two or more
  operands missing compared to the expected one.
- We should only emit this error once per instruction.

Differential revision: https://reviews.llvm.org/D36746



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318770 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-21 15:16:50 +00:00
Oliver Stannard 3149db1b8c [ARM] Add diagnostics for SPR/DPR lists
Differential revision: https://reviews.llvm.org/D39195



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318766 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-21 15:06:01 +00:00
Oliver Stannard 3caa1be631 [ARM] Tighten up CHECK lines in a test
These tests checked for the line number without a leading ":", so for example,
a missed diagnostic on line 123 could match one on line 1123, 2123, etc,
desynchronising the test for hundreds of lines.

This couldn't cause it to incorrectly pass or fail, but made it hard to track
down test failures.

Differential revision: https://reviews.llvm.org/D39238



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316442 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-24 14:20:13 +00:00
Oliver Stannard 60da1ac8d3 [ARM] Error for invalid shift in memory operand
Report a diagnostic when we fail to parse a shift in a memory operand because
the shift type is not an identifier. Without this, we were silently ignoring
the whole instruction.

Differential revision: https://reviews.llvm.org/D39237



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316441 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-24 14:19:08 +00:00
Oliver Stannard 3665c8cf58 [ARM] Remove tCPS alias which just crashed
This alias caused a crash when trying to print the "cps #0" instruction in a
diagnostic for thumbv6 (which doesn't have that instruction).
	    
The comment was incorrect, this instruction is UNPREDICTABLE if no flag bits
are set, so I don't think it's worth keeping.

Differential Revision: https://reviews.llvm.org/D39191



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316420 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-24 08:55:36 +00:00
Sanjay Patel eb90eda86f [ARM, AArch64] adjust tests trying to maintain their objective; NFC
A smarter compiler will see that these might be better without a jump table
if we're just using the constant values of the switch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316012 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-17 16:54:56 +00:00
Oliver Stannard 40bc0f3ba8 [ARM, Asm] Harden GNU LDRD/STRD aliases against invalid inputs
Previously, the code that implemented the GNU assembler aliases for the
LDRD and STRD instructions (where the second register is omitted)
assumed that the input was a valid instruction. This caused assertion
failures for every example in ldrd-strd-gnu-bad-inst.s.

This improves this code so that it bails out if the instruction is not
in the expected format, the check bails out, and the asm parser is run
on the unmodified instruction.

It also relaxes the alias on thumb targets, so that unaligned pairs of
registers can be used. The restriction that Rt must be even-numbered
only applies to the ARM versions of these instructions.

Differential revision: https://reviews.llvm.org/D36732



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315305 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-10 12:38:22 +00:00
Oliver Stannard dd15603e13 [ARM, Asm] Add diagnostics for floating-point register operands
This adds diagnostic strings for the ARM floating-point register
classes, which will be used when these classes are expected by the
assembler, but the provided operand is not valid.

One of these, DPR, requires C++ code to select the correct error
message, as that class contains different registers depending on the
FPU. The rest can all have their diagnostic strings stored in the
tablegen decription of them.

Differential revision: https://reviews.llvm.org/D36693



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315304 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-10 12:35:09 +00:00
Oliver Stannard fe1782b4a9 [ARM, Asm] Add diagnostics for general-purpose register operands
This adds diagnostic strings for the ARM general-purpose register
classes, which will be used when these classes are expected by the
assembler, but the provided operand is not valid.

One of these, rGPR, requires C++ code to select the correct error
message, as that class contains different registers in pre-v8 and v8
targets. The rest can all have their diagnostic strings stored in the
tablegen description of them.

Differential revision: https://reviews.llvm.org/D36692



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315303 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-10 12:31:53 +00:00
Oliver Stannard 78762a19e4 [ARM] Add diag string for movw/movt immediates in assembly
This adds diagnostics for invalid immediate operands to the MOVW and MOVT
instructions (ARM and Thumb).

Differential revision: https://reviews.llvm.org/D31879



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314888 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-04 09:24:54 +00:00