llvm/lib/Target/Hexagon
Jack Carter 0518fca843 There are a number of generic inline asm operand modifiers that
up to r158925 were handled as processor specific. Making them 
generic and putting tests for these modifiers in the CodeGen/Generic
directory caused a number of targets to fail. 

This commit addresses that problem by having the targets call 
the generic routine for generic modifiers that they don't currently
have explicit code for.

For now only generic print operands 'c' and 'n' are supported.vi


Affected files:

    test/CodeGen/Generic/asm-large-immediate.ll
    lib/Target/PowerPC/PPCAsmPrinter.cpp
    lib/Target/NVPTX/NVPTXAsmPrinter.cpp
    lib/Target/ARM/ARMAsmPrinter.cpp
    lib/Target/XCore/XCoreAsmPrinter.cpp
    lib/Target/X86/X86AsmPrinter.cpp
    lib/Target/Hexagon/HexagonAsmPrinter.cpp
    lib/Target/CellSPU/SPUAsmPrinter.cpp
    lib/Target/Sparc/SparcAsmPrinter.cpp
    lib/Target/MBlaze/MBlazeAsmPrinter.cpp
    lib/Target/Mips/MipsAsmPrinter.cpp
    
MSP430 isn't represented because it did not even run with
the long existing 'c' modifier and it was not apparent what
needs to be done to get it inline asm ready.

Contributer: Jack Carter



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159203 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 13:49:27 +00:00
..
InstPrinter Revert 156634 upon request until code improvement changes are made. 2012-05-14 19:35:42 +00:00
MCTargetDesc Support for target dependent Hexagon VLIW packetizer. 2012-05-03 21:52:53 +00:00
TargetInfo Target/Hexagon: Fix CMake build. We don't use add_llvm_library_dependencies(). 2011-12-13 00:36:04 +00:00
CMakeLists.txt llvm/lib: [CMake] Add explicit dependency to intrinsics_gen. 2012-06-24 13:32:01 +00:00
Hexagon.h Revert 156634 upon request until code improvement changes are made. 2012-05-14 19:35:42 +00:00
Hexagon.td Hexagon V5 FP Support. 2012-05-10 20:20:25 +00:00
HexagonAsmPrinter.cpp There are a number of generic inline asm operand modifiers that 2012-06-26 13:49:27 +00:00
HexagonAsmPrinter.h Hexagon: enable assembler output through the MC layer. 2012-04-12 17:55:53 +00:00
HexagonCallingConv.td Hexagon V5 FP Support. 2012-05-10 20:20:25 +00:00
HexagonCallingConvLower.cpp Switch some getAliasSet clients to MCRegAliasIterator. 2012-06-01 20:36:54 +00:00
HexagonCallingConvLower.h
HexagonCFGOptimizer.cpp Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonExpandPredSpillCode.cpp Support for target dependent Hexagon VLIW packetizer. 2012-05-03 21:52:53 +00:00
HexagonFrameLowering.cpp Extract some pointer hacking to a function. 2012-05-30 22:40:03 +00:00
HexagonFrameLowering.h
HexagonHardwareLoops.cpp Fix typos found by http://github.com/lyda/misspell-check 2012-06-02 10:20:22 +00:00
HexagonImmediates.td Fix typos found by http://github.com/lyda/misspell-check 2012-06-02 10:20:22 +00:00
HexagonInstrFormats.td Hexagon V5 FP Support. 2012-05-10 20:20:25 +00:00
HexagonInstrFormatsV4.td Extensions of Hexagon V4 instructions. 2012-05-03 16:18:50 +00:00
HexagonInstrInfo.cpp *typo: Cyles changed to Cycles 2012-06-13 15:53:04 +00:00
HexagonInstrInfo.h *typo: Cyles changed to Cycles 2012-06-13 15:53:04 +00:00
HexagonInstrInfo.td Fix typos found by http://github.com/lyda/misspell-check 2012-06-02 10:20:22 +00:00
HexagonInstrInfoV3.td Extensions of Hexagon V4 instructions. 2012-05-03 16:18:50 +00:00
HexagonInstrInfoV4.td Revert 156634 upon request until code improvement changes are made. 2012-05-14 19:35:42 +00:00
HexagonInstrInfoV5.td Revert 156634 upon request until code improvement changes are made. 2012-05-14 19:35:42 +00:00
HexagonIntrinsics.td Hexagon V5 intrinsics support. 2012-05-11 19:39:13 +00:00
HexagonIntrinsicsDerived.td Hexagon V5 intrinsics support. 2012-05-11 19:39:13 +00:00
HexagonIntrinsicsV3.td
HexagonIntrinsicsV4.td
HexagonIntrinsicsV5.td Hexagon V5 intrinsics support. 2012-05-11 19:39:13 +00:00
HexagonISelDAGToDAG.cpp Revert 156634 upon request until code improvement changes are made. 2012-05-14 19:35:42 +00:00
HexagonISelLowering.cpp Fix typos found by http://github.com/lyda/misspell-check 2012-06-02 10:20:22 +00:00
HexagonISelLowering.h Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall 2012-05-25 16:35:28 +00:00
HexagonMachineFunctionInfo.h
HexagonMCInst.h Remove excess semi-colons to quiet warnings. 2012-05-08 20:45:04 +00:00
HexagonMCInstLower.cpp Support for target dependent Hexagon VLIW packetizer. 2012-05-03 21:52:53 +00:00
HexagonNewValueJump.cpp Silence a gcc-4.6 warning: GCC fails to understand that secondReg and cmpOp2 are 2012-06-09 10:04:03 +00:00
HexagonPeephole.cpp Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations. 2012-03-17 18:46:09 +00:00
HexagonRegisterInfo.cpp Fix some uses of getSubRegisters() to use getSubReg() instead. 2012-05-30 18:40:49 +00:00
HexagonRegisterInfo.h This patch fixes a problem which arose when using the Post-RA scheduler 2012-04-23 21:39:35 +00:00
HexagonRegisterInfo.td Hexagon V5 FP Support. 2012-05-10 20:20:25 +00:00
HexagonRemoveSZExtArgs.cpp Fix typos found by http://github.com/lyda/misspell-check 2012-06-02 10:20:22 +00:00
HexagonSchedule.td misched: Added MultiIssueItineraries. 2012-06-05 03:44:40 +00:00
HexagonScheduleV4.td misched: Added MultiIssueItineraries. 2012-06-05 03:44:40 +00:00
HexagonSelectCCInfo.td Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonSelectionDAGInfo.cpp
HexagonSelectionDAGInfo.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonSplitTFRCondSets.cpp Hexagon V5 FP Support. 2012-05-10 20:20:25 +00:00
HexagonSubtarget.cpp misched: Added MultiIssueItineraries. 2012-06-05 03:44:40 +00:00
HexagonSubtarget.h Hexagon V5 FP Support. 2012-05-10 20:20:25 +00:00
HexagonTargetMachine.cpp Revert 156634 upon request until code improvement changes are made. 2012-05-14 19:35:42 +00:00
HexagonTargetMachine.h Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations. 2012-03-17 18:46:09 +00:00
HexagonTargetObjectFile.cpp Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations. 2012-03-17 18:46:09 +00:00
HexagonTargetObjectFile.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonVarargsCallingConvention.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonVLIWPacketizer.cpp Revert r158679 - use case is unclear (and it increases the memory footprint). 2012-06-22 20:27:13 +00:00
LLVMBuild.txt Hexagon: enable assembler output through the MC layer. 2012-04-12 17:55:53 +00:00
Makefile Hexagon: enable assembler output through the MC layer. 2012-04-12 17:55:53 +00:00