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32dcf8b8e9
llvm/lib/Target/AMDGPU
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Tom Stellard 32dcf8b8e9 AMDGPU/SI: Re-order PreloadedValue enum and number entries based on init order 
Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D12451

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248978 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-01 02:02:46 +00:00
..
AsmParser AMDGPU/SI: Use .hsatext section instead of .text for HSA 2015-09-25 21:41:28 +00:00
InstPrinter Untabify. 2015-09-22 11:15:07 +00:00
MCTargetDesc AMDGPU/SI: Use .hsatext section instead of .text for HSA 2015-09-25 21:41:28 +00:00
TargetInfo
Utils AMDGPU/SI: Use .hsatext section instead of .text for HSA 2015-09-25 21:41:28 +00:00
AMDGPU.h
AMDGPU.td
AMDGPUAlwaysInlinePass.cpp
AMDGPUAsmPrinter.cpp Untabify. 2015-09-22 11:15:07 +00:00
AMDGPUAsmPrinter.h
AMDGPUCallingConv.td
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUHSATargetObjectFile.cpp AMDGPU/SI: Use .hsatext section instead of .text for HSA 2015-09-25 21:41:28 +00:00
AMDGPUHSATargetObjectFile.h AMDGPU: address -Winconsistent-missing-override 2015-09-26 04:34:52 +00:00
AMDGPUInstrInfo.cpp
AMDGPUInstrInfo.h AMDGPU: Make getNamedOperandIdx declaration readonly 2015-09-25 18:09:15 +00:00
AMDGPUInstrInfo.td
AMDGPUInstructions.td
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp AMDGPU: Handle i64->v2i32 loads/stores in PreprocessISelDAG 2015-09-25 17:27:08 +00:00
AMDGPUISelLowering.cpp propagate fast-math-flags on DAG nodes 2015-09-16 16:31:21 +00:00
AMDGPUISelLowering.h
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPUOpenCLImageTypeLoweringPass.cpp
AMDGPUPromoteAlloca.cpp
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h AMDGPU: Remove dead code 2015-09-19 06:41:10 +00:00
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC. 2015-09-15 16:17:27 +00:00
AMDGPUSubtarget.h
AMDGPUTargetMachine.cpp AMDGPU/SI: Use .hsatext section instead of .text for HSA 2015-09-25 21:41:28 +00:00
AMDGPUTargetMachine.h AMDGPU/SI: Use .hsatext section instead of .text for HSA 2015-09-25 21:41:28 +00:00
AMDGPUTargetTransformInfo.cpp
AMDGPUTargetTransformInfo.h
AMDILCFGStructurizer.cpp AMDGPU: Remove dead code 2015-09-19 06:41:10 +00:00
AMDKernelCodeT.h
CaymanInstructions.td
CIInstructions.td AMDGPU: Add s_dcache_* instructions 2015-09-24 19:52:27 +00:00
CMakeLists.txt AMDGPU/SI: Use .hsatext section instead of .text for HSA 2015-09-25 21:41:28 +00:00
EvergreenInstructions.td
LLVMBuild.txt
Makefile
Processors.td
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp Pass BranchProbability/BlockMass by value instead of const& as they are small. NFC. 2015-09-10 23:10:42 +00:00
R600InstrInfo.h Pass BranchProbability/BlockMass by value instead of const& as they are small. NFC. 2015-09-10 23:10:42 +00:00
R600Instructions.td Fix typos. 2015-09-12 01:17:08 +00:00
R600Intrinsics.td
R600ISelLowering.cpp propagate fast-math-flags on DAG nodes 2015-09-16 16:31:21 +00:00
R600ISelLowering.h
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp
R600RegisterInfo.cpp
R600RegisterInfo.h AMDGPU: Remove dead code 2015-09-19 06:41:10 +00:00
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td
SIAnnotateControlFlow.cpp
SIDefines.h
SIFixControlFlowLiveIntervals.cpp AMDGPU: Remove unused includes 2015-09-25 00:28:43 +00:00
SIFixSGPRCopies.cpp AMDGPU: Fix recomputing dominator tree unnecessarily 2015-09-25 17:21:28 +00:00
SIFixSGPRLiveRanges.cpp
SIFoldOperands.cpp Improved the interface of methods commuting operands, improved X86-FMA3 mem-folding&coalescing. 2015-09-28 20:33:22 +00:00
SIInsertWaits.cpp AMDGPU: Fix recomputing dominator tree unnecessarily 2015-09-25 17:21:28 +00:00
SIInstrFormats.td AMDGPU: Remove hasPostISelHook from most instructions 2015-09-26 05:06:48 +00:00
SIInstrInfo.cpp AMDGPU/SI: Don't set DATA_FORMAT if ADD_TID_ENABLE is set 2015-09-29 23:37:32 +00:00
SIInstrInfo.h AMDGPU/SI: Don't set DATA_FORMAT if ADD_TID_ENABLE is set 2015-09-29 23:37:32 +00:00
SIInstrInfo.td AMDGPU: Remove hasPostISelHook from most instructions 2015-09-26 05:06:48 +00:00
SIInstructions.td AMDGPU: VOP3b definition cleanups 2015-09-26 02:25:48 +00:00
SIIntrinsics.td
SIISelLowering.cpp AMDGPU/SI: Don't set DATA_FORMAT if ADD_TID_ENABLE is set 2015-09-29 23:37:32 +00:00
SIISelLowering.h
SILoadStoreOptimizer.cpp
SILowerControlFlow.cpp AMDGPU: Fix recomputing dominator tree unnecessarily 2015-09-25 17:21:28 +00:00
SILowerI1Copies.cpp AMDGPU: Fix recomputing dominator tree unnecessarily 2015-09-25 17:21:28 +00:00
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIPrepareScratchRegs.cpp AMDGPU/SI: Don't set DATA_FORMAT if ADD_TID_ENABLE is set 2015-09-29 23:37:32 +00:00
SIRegisterInfo.cpp AMDGPU: Switch over reg class size instead of checking all super classes 2015-09-26 04:59:04 +00:00
SIRegisterInfo.h AMDGPU/SI: Re-order PreloadedValue enum and number entries based on init order 2015-10-01 02:02:46 +00:00
SIRegisterInfo.td AMDGPU: Set CopyCost of register classes 2015-09-26 04:09:34 +00:00
SISchedule.td AMDGPU: Improve accuracy of instruction rates for VOPC 2015-09-25 16:58:25 +00:00
SIShrinkInstructions.cpp AMDGPU: Simplify debug printing 2015-09-10 21:51:19 +00:00
SITypeRewriter.cpp
VIInstrFormats.td
VIInstructions.td AMDGPU: Add s_dcache_* instructions 2015-09-24 19:52:27 +00:00