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%reg1024<def> = MOVSDrm %reg0, 1, %reg0, <cp#0>, Mem:LD(8,8) [ConstantPool + 0] %reg1025<def> = MOVSD2PDrr %reg1024 %reg1026<def> = MOVDI2PDIrm <fi#-1>, 1, %reg0, 0, Mem:LD(4,16) [FixedStack-1 + 0] %reg1027<def> = ORPSrr %reg1025<kill>, %reg1026<kill> %reg1028<def> = MOVPD2SDrr %reg1027<kill> %reg1029<def> = SUBSDrr %reg1028<kill>, %reg1024<kill> %reg1030<def> = CVTSD2SSrr %reg1029<kill> MOVSSmr <fi#0>, 1, %reg0, 0, %reg1030<kill>, Mem:ST(4,4) [FixedStack0 + 0] %reg1031<def> = LD_Fp32m80 <fi#0>, 1, %reg0, 0, Mem:LD(4,16) [FixedStack0 + 0] RET %reg1031<kill>, %ST0<imp-use,kill> The reason 2-addr pass isn't smart enough to commute the ORPSrr is because it can't look pass the MOVSD2PDrr instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62505 91177308-0d34-0410-b5e6-96231b3b80d8
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