Richard Trieu c09324483c Fix broken asserts that never fire. ...

Change assert("text") to assert(0 && "text").  The first case is a const char *
to bool conversion, which always evaluates to true, never triggering the
assert.  The second case will always trigger the assert.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185227 91177308-0d34-0410-b5e6-96231b3b80d8

2013-06-28 21:54:25 +00:00

..

InstPrinter

Fix broken asserts that never fire.

2013-06-28 21:54:25 +00:00

MCTargetDesc

Remove the MachineMove class.

2013-05-13 01:16:13 +00:00

TargetInfo

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

CMakeLists.txt

Hexagon: Pass to replace tranfer/copy instructions into combine instruction

2013-05-14 18:54:06 +00:00

Hexagon.h

Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.

2013-06-19 21:36:55 +00:00

Hexagon.td

Hexagon: Fix switch statements in GetDotOldOp and IsNewifyStore.

2013-05-10 20:58:11 +00:00

HexagonAsmPrinter.cpp

Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.

2013-02-20 16:13:27 +00:00

HexagonAsmPrinter.h

Delete executive bit on ./lib/Target/Hexagon/HexagonAsmPrinter.h.

2012-12-29 15:23:06 +00:00

HexagonCallingConv.td

Hexagon V5 FP Support.

2012-05-10 20:20:25 +00:00

HexagonCallingConvLower.cpp

Don't cache the instruction and register info from the TargetMachine, because

2013-06-07 06:19:56 +00:00

HexagonCallingConvLower.h

Don't cache the instruction and register info from the TargetMachine, because

2013-06-07 06:19:56 +00:00

HexagonCFGOptimizer.cpp

Print IR from Hexagon MI passes with -print-before/after-all.

2013-05-06 21:58:00 +00:00

HexagonCopyToCombine.cpp

Hexagon: Typo fix.

2013-05-28 19:01:45 +00:00

HexagonExpandPredSpillCode.cpp

Print IR from Hexagon MI passes with -print-before/after-all.

2013-05-06 21:58:00 +00:00

HexagonFixupHwLoops.cpp

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

HexagonFrameLowering.cpp

Remove dead calls to addFrameMove.

2013-05-16 15:08:37 +00:00

HexagonFrameLowering.h

Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo

2013-02-21 20:05:00 +00:00

HexagonHardwareLoops.cpp

Hexagon: Use multiclass for Jump instructions.

2013-05-01 21:37:34 +00:00

HexagonInstrFormats.td

Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp.

2013-05-10 20:27:34 +00:00

HexagonInstrFormatsV4.td

Hexagon: Change insn class to support instruction encoding.

2013-02-14 19:57:17 +00:00

HexagonInstrInfo.cpp

DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs

2013-06-16 20:34:27 +00:00

HexagonInstrInfo.h

DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs

2013-06-16 20:34:27 +00:00

HexagonInstrInfo.td

Hexagon: Pass to replace tranfer/copy instructions into combine instruction

2013-05-14 18:54:06 +00:00

HexagonInstrInfoV3.td

Hexagon: Use multiclass for Jump instructions.

2013-05-01 21:37:34 +00:00

HexagonInstrInfoV4.td

Hexagon: Add patterns to generate 'combine' instructions.

2013-05-14 17:16:38 +00:00

HexagonInstrInfoV5.td

Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp.

2013-05-10 20:27:34 +00:00

HexagonIntrinsics.td

Hexagon V5 intrinsics support.

2012-05-11 19:39:13 +00:00

HexagonIntrinsicsDerived.td

Hexagon V5 intrinsics support.

2012-05-11 19:39:13 +00:00

HexagonIntrinsicsV3.td

…

HexagonIntrinsicsV4.td

…

HexagonIntrinsicsV5.td

Remove tabs.

2012-07-19 00:25:04 +00:00

HexagonISelDAGToDAG.cpp

Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.

2013-06-19 21:36:55 +00:00

HexagonISelLowering.cpp

The getRegForInlineAsmConstraint function should only accept MVT value types.

2013-06-22 18:37:38 +00:00

HexagonISelLowering.h

The getRegForInlineAsmConstraint function should only accept MVT value types.

2013-06-22 18:37:38 +00:00

HexagonMachineFunctionInfo.h

Hexagon: Use multiclass for Jump instructions.

2013-05-01 21:37:34 +00:00

HexagonMachineScheduler.cpp

Machine Model: Add MicroOpBufferSize and resource BufferSize.

2013-06-15 04:49:57 +00:00

HexagonMachineScheduler.h

Don't cache the instruction and register info from the TargetMachine, because

2013-06-07 06:19:56 +00:00

HexagonMCInstLower.cpp

Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.

2013-02-20 16:13:27 +00:00

HexagonNewValueJump.cpp

Suppress GCC compiler warnings in release builds about variables that are only

2013-05-13 07:50:47 +00:00

HexagonOperands.td

Move all operand definitions into HexagonOperands.td

2012-12-04 05:00:31 +00:00

HexagonPeephole.cpp

Print IR from Hexagon MI passes with -print-before/after-all.

2013-05-06 21:58:00 +00:00

HexagonRegisterInfo.cpp

Don't cache the instruction and register info from the TargetMachine, because

2013-06-07 06:19:56 +00:00

HexagonRegisterInfo.h

Don't cache the instruction and register info from the TargetMachine, because

2013-06-07 06:19:56 +00:00

HexagonRegisterInfo.td

Make SubRegIndex size mandatory, following r183020.

2013-05-31 23:45:26 +00:00

HexagonRemoveSZExtArgs.cpp

Print IR from Hexagon MI passes with -print-before/after-all.

2013-05-06 21:58:00 +00:00

HexagonSchedule.td

Hexagon: Change insn class to support instruction encoding.

2013-02-14 19:57:17 +00:00

HexagonScheduleV4.td

Hexagon: Change insn class to support instruction encoding.

2013-02-14 19:57:17 +00:00

HexagonSelectCCInfo.td

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

HexagonSelectionDAGInfo.cpp

Track IR ordering of SelectionDAG nodes 2/4.

2013-05-25 02:42:55 +00:00

HexagonSelectionDAGInfo.h

Track IR ordering of SelectionDAG nodes 2/4.

2013-05-25 02:42:55 +00:00

HexagonSplitConst32AndConst64.cpp

Hexagon: Fix Small Data support to handle -G 0 correctly.

2013-05-07 19:53:00 +00:00

HexagonSplitTFRCondSets.cpp

Print IR from Hexagon MI passes with -print-before/after-all.

2013-05-06 21:58:00 +00:00

HexagonSubtarget.cpp

Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.

2013-03-22 18:41:34 +00:00

HexagonSubtarget.h

Sort includes for all of the .h files under the 'lib' tree. These were

2012-12-04 07:12:27 +00:00

HexagonTargetMachine.cpp

Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.

2013-06-19 21:36:55 +00:00

HexagonTargetMachine.h

Switch TargetTransformInfo from an immutable analysis pass that requires

2013-01-07 01:37:14 +00:00

HexagonTargetObjectFile.cpp

Hexagon: Fix Small Data support to handle -G 0 correctly.

2013-05-07 19:53:00 +00:00

HexagonTargetObjectFile.h

Hexagon: Fix Small Data support to handle -G 0 correctly.

2013-05-07 19:53:00 +00:00

HexagonVarargsCallingConvention.h

Move TargetData to DataLayout.

2012-10-08 16:38:25 +00:00

HexagonVLIWPacketizer.cpp

Hexagon: Make helper functions static.

2013-05-23 15:43:11 +00:00

LLVMBuild.txt

Hexagon: enable assembler output through the MC layer.

2012-04-12 17:55:53 +00:00

Makefile

Hexagon: enable assembler output through the MC layer.

2012-04-12 17:55:53 +00:00