Commit Graph

121949 Commits

Author SHA1 Message Date
Matt Arsenault
124f7d9b25 AMDGPU: Add failing testcase for live interval construction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248067 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-19 00:03:56 +00:00
Sanjoy Das
9025a1f860 [IndVars] Widen more comparisons for non-negative induction vars
Summary:
If an induction variable is provably non-negative, its sign extension is
equal to its zero extension.  This means narrow uses like

  icmp slt iNarrow %indvar, %rhs

can be widened into

  icmp slt iWide zext(%indvar), sext(%rhs)

Reviewers: atrick, mcrosier, hfinkel

Subscribers: hfinkel, reames, llvm-commits

Differential Revision: http://reviews.llvm.org/D12745

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248045 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 21:21:02 +00:00
Luke Larson
204847af9d Fix typo and test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248042 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 21:15:45 +00:00
Rafael Espindola
26a99b2dc8 This code never uses r_addend, so it can just use Elf_Rel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248040 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 21:12:38 +00:00
Chris Bieneman
907451c6d6 [CMake] Adding ALWAYS_GENERATE option to symlink utility functions.
This implements the behavior required for clang symlinks which should be always generated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248039 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 21:08:32 +00:00
Davide Italiano
5310d9c491 [Object/ELF] Change comment to reflect reality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248032 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 20:41:15 +00:00
Cong Hou
2f91ab3d22 Update edge weights properly when merging blocks in if-conversion.
In if-conversion, there is a utility function MergeBlocks() that is used to merge blocks. However, when new edges are built in this function the edge weight is either not provided or not updated properly, leading to a modified CFG with incorrect edge weights. This patch corrects this issue.

Differential Revision: http://reviews.llvm.org/D12513



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248030 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 20:22:41 +00:00
Eric Christopher
c4db514911 Limit the range of processors supported by ARM fast isel to v6 or
later as that's all that is tested right now.

Fixes PR24858.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248027 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 20:08:18 +00:00
Teresa Johnson
c4736349a5 Remove couple of new Bitcode enum vals that snuck in via r247927 (NFC)
These are meant to be part of the follow on patch I am sending for
review shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248023 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 19:38:53 +00:00
Larisse Voufo
69328805da Clean up: Refactoring the hardcoded value of 6 for FindAvailableLoadedValue()'s parameter MaxInstsToScan. (Complete version of r247497. See D12886)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248022 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 19:14:35 +00:00
James Y Knight
dc18fbbb2d Make MachineScheduler debug output less confusing.
At least...a little bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248020 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 18:52:20 +00:00
Cong Hou
759d988de3 Scaling up values in ARMBaseInstrInfo::isProfitableToIfCvt() before they are scaled by a probability to avoid precision issue.
In ARMBaseInstrInfo::isProfitableToIfCvt(), there is a simple cost model in which the number of cycles is scaled by a probability to estimate the cost. However, when the number of cycles is small (which is usually the case), there is a precision issue after the computation. To avoid this issue, this patch scales those cycles by 1024 (chosen to make the multiplication a litter faster) before they are scaled by the probability. Other variables are also scaled up for the final comparison.

Differential Revision: http://reviews.llvm.org/D12742



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248018 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 18:19:40 +00:00
Matthias Braun
8aa8c4d086 SelectionDAGDumper: Leave out the <multiple use> markers
They mostly clutter the output while it is still possible to see which
node has multiple users without them.

Differential Revision: http://reviews.llvm.org/D12569

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248013 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 17:57:33 +00:00
Matthias Braun
780502f6f2 SelectionDAGDumper: Avoid unnecessary newlines
Before:
  t0 = EntryToken:ch

    t0: <multiple use>
        t0: <multiple use>
      t1 = CopyFromReg:v4f32,ch t0, Register:v4f32  %vreg0

      t25 = IMPLICIT_DEF:v4f32

    t26 = HADDPSrr:v4f32 t1, t25

  t23 = CopyToReg:ch,glue t0, Register:v4f32  %XMM0, t26

    t23: <multiple use>
    t23: <multiple use>
  t24 = RETQ:ch Register:v4f32  %XMM0, t23, t23:1

After:
    t0: <multiple use>
        t0: <multiple use>
      t1 = CopyFromReg:v4f32,ch t0, Register:v4f32  %vreg0
    t26 = X86ISD::FHADD:v4f32 t1, undef:v4f32
  t23 = CopyToReg:ch,glue t0, Register:v4f32  %XMM0, t26
    t23: <multiple use>
    t21 = TargetConstant:i16<0>
    t23: <multiple use>
  t24 = X86ISD::RET_FLAG:ch t23, t21, Register:v4f32  %XMM0, t23:1

Differential Revision: http://reviews.llvm.org/D12568

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248012 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 17:57:31 +00:00
Matthias Braun
d53e4c92e5 SelectionDAGDumper: Hide [ID=X], [ORD=X] and source locations by default.
You can show them with the new -dag-dump-verbose switch.

Differential Revision: http://reviews.llvm.org/D12566

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248011 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 17:57:28 +00:00
Matthias Braun
6c76d11db8 SelectionDAG: Introduce PersistentID to SDNode for assert builds.
This gives us more human readable numbers to identify nodes in debug
dumps.

Before:
  0x7fcbd9700160: ch = EntryToken

  0x7fcbd985c7c8: i64 = Register %RAX

   ...

      0x7fcbd9700160: <multiple use>
    0x7fcbd985c578: i64,ch = MOV64rm 0x7fcbd985c6a0, 0x7fcbd985cc68, 0x7fcbd985c200, 0x7fcbd985cd90, 0x7fcbd985ceb8, 0x7fcbd9700160<Mem:LD8[@foo]> [ORD=2]

  0x7fcbd985c8f0: ch,glue = CopyToReg 0x7fcbd9700160, 0x7fcbd985c7c8, 0x7fcbd985c578 [ORD=3]

    0x7fcbd985c7c8: <multiple use>
    0x7fcbd985c8f0: <multiple use>
    0x7fcbd985c8f0: <multiple use>
  0x7fcbd985ca18: ch = RETQ 0x7fcbd985c7c8, 0x7fcbd985c8f0, 0x7fcbd985c8f0:1 [ORD=3]

Now:
  t0: ch = EntryToken

  t5: i64 = Register %RAX

    ...

      t0: <multiple use>
    t3: i64,ch = MOV64rm t10, t12, t11, t13, t14, t0<Mem:LD8[@foo]> [ORD=2]

  t6: ch,glue = CopyToReg t0, t5, t3 [ORD=3]

    t5: <multiple use>
    t6: <multiple use>
    t6: <multiple use>
  t7: ch = RETQ t5, t6, t6:1 [ORD=3]

Differential Revision: http://reviews.llvm.org/D12564

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248010 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 17:41:00 +00:00
Chris Bieneman
f8d6e92d57 [CMake] More cleanup of installing symlinks.
In order to support building clang out-of-tree the install_symlink script needs to be installed, and it needs to be found by searching the CMAKE_MODULE_PATH.

This change renames install_symlink -> LLVMInstallSymlink so it doesn't conflict with naming from other projects, and adds searching behavior in AddLLVM.cmake

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248009 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 17:39:58 +00:00
Geoff Berry
068d9ce827 [AArch64] Improved bitfield instruction selection.
Summary:
For bitfield insert OR matching, check both operands for larger pattern
first before checking for smaller pattern.

Add pattern for unsigned bitfield insert-in-zero done with SHL+AND.

Resolves PR21631.

Reviewers: jmolloy, t.p.northover

Subscribers: aemerson, rengolin, llvm-commits, mcrosier

Differential Revision: http://reviews.llvm.org/D12908

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248006 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 17:11:53 +00:00
Rafael Espindola
e016c66756 Remove temporary file on signal.
Without this lld leaves temporary files behind when it crashes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247994 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 15:17:53 +00:00
Yaron Keren
81a5ddcd9f Simplify SmallBitVector::applyMask by consolidating common code for 32- and 64-bit builds
and assert when mask is too large to apply in the small case,
previously the extra words were silently ignored.
clang-format the entire function to match current code standards.

This is a rewrite of r247972 which was reverted in r247983 due to
warning and possible UB on 32-bits hosts.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247993 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 15:08:24 +00:00
Daniel Sanders
45f413067f [mips][microMIPS] Fix an invalid read for lwm32 and reserved reglist values.
Summary:
Some values of 'reglist' are reserved and cause the disassembler to read past
the end of the Regs array. Treat lwm32's containing reserved values as invalid
instructions.

Reviewers: zoran.jovanovic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12959

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247990 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 14:20:54 +00:00
Chad Rosier
efcddc28d1 [AArch64] Reorder cases to improve readability. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247989 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 14:15:19 +00:00
Chad Rosier
e732875e6e [AArch64] Remove some redundant cases. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247988 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 14:13:18 +00:00
Aaron Ballman
c6b18f3b1a Silencing a -Wsign-compare warning; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247986 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 13:31:42 +00:00
Igor Laevsky
ef40e27a13 [LazyValueInfo] Report nonnull range for nonnull pointers
Currently LazyValueInfo will report only alloca's as having nonnull range. 
For loads with !nonnull metadata it will bailout with no additional information. 
Same is true for calls returning nonnull pointers.

This change extends LazyValueInfo to handle additional nonnull instructions.

Differential Revision: http://reviews.llvm.org/D12932



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247985 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 13:01:48 +00:00
Artur Pilipenko
0c5094b419 Support align attribute for return values
Reviewed By: reames

Differential Revision: http://reviews.llvm.org/D12844


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247984 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 12:33:31 +00:00
Aaron Ballman
5134443f60 Reverting r247972 (and subordinate commit r247972) as the 32-bit left-shift is undefined behavior on implementations where uinptr_t is 32-bits. One such platform is Windows, MSVC, x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247983 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 12:18:41 +00:00
Artur Pilipenko
e022bf6086 Nit cleanup in LangRef about dereferenceable metadata
Reviewed By: vsk

Differential Revision: http://reviews.llvm.org/D12847


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247982 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 12:07:10 +00:00
Michael Kruse
6150806853 [Support] Reapply r245289 "Always wait for GraphViz before opening the viewer"
The change was accidentally undone by r245290.

Original log message:
When calling DisplayGraph and a PS viewer is chosen, two programs are executed: The GraphViz generator and the PostScript viewer. Always wait for the generator to finish to ensure that the .ps file is written before opening the viewer for that file. DisplayGraph's wait parameter refers to whether to wait until the user closes the viewer.

This happened on Windows and if none of the options to open the .dot file directly applies, also on Linux.

Differential Revision: http://reviews.llvm.org/D11876

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247980 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 10:56:30 +00:00
Daniel Sanders
2cb0b641c5 [llvm-mc-fuzzer] Document llvm-mc-fuzzer in LibFuzzer.rst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247979 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 10:47:45 +00:00
David Majnemer
0115643a5b [WinEH] Moved funclet pads should be in relative order
We shifted the MachineBasicBlocks to the end of the MachineFunction in
DFS order.  This will not ensure that MachineBasicBlocks which fell
through to one another will remain contiguous.  Instead, implement
a stable sort algorithm for iplist.

This partially reverts commit r214150.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247978 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 08:18:07 +00:00
Yaron Keren
43c0cee390 Fix BitVectorTest on 32-bit hosts after r247972.
We can't apply two words of 32-bit mask in the small case
where the internal storage is just one 32-bit word.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247974 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 07:24:35 +00:00
Yaron Keren
a028622e48 Simplify SmallBitVector::applyMask by consolidating common code for 32-bit and 64-bit builds.
Extend mask value to 64 bits before taking its complement and assert when mask is
too large to apply in the small case (previously the extra words were silently ignored).

http://reviews.llvm.org/D11890

Patch by James Touton!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247972 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 06:35:12 +00:00
Lang Hames
fc85502bf6 Remove trailing whitespace from the old Orc Kaleidoscope examples.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247971 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 06:16:49 +00:00
Bob Wilson
bbbfd6aad1 Whitespace. Indent with spaces instead of a tab.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247969 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-18 05:36:13 +00:00
Quentin Colombet
d68bf2b419 [ShrinkWrap] Refactor the handling of infinite loop in the analysis.
- Strenghten the logic to be sure we hoist the restore point out of the current
  loop. (The fixes a bug with infinite loop, added as part of the patch.)
- Walk over the exit blocks of the current loop to conver to the desired restore
  point in one iteration of the update loop.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247958 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 23:21:34 +00:00
Davide Italiano
919b448c2e [llvm-readobj] Fix another "time of check to time of use bug".
It seems there's more copy-paste between tools than needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247954 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 22:29:58 +00:00
David Blaikie
5fab6109a3 [opaque pointer types] Add an explicit pointee type to alias records in the IR
Since aliases actually use and verify their explicit type already, no
further invalid testing is required here. The
invalid.test:ALIAS-TYPE-MISMATCH case catches errors due to emitting a
non-pointee type in the new format or a non-pointer type in the old
format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247952 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 22:18:59 +00:00
Alexei Starovoitov
7f61c22d41 [bpf] expand indirect branches
BPF instruction set doesn't have indirect branches. Expand them.

Reported by John Fastabend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247951 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 22:18:08 +00:00
Matthias Braun
d68f4c039e Revert "(HEAD -> master, origin/master, origin/HEAD) RegisterPressure: Move LiveInRegs/LiveOutRegs from RegisterPressure to PressureTracker"
This reverts commit r247943.

Accidental commit, code review was not finished yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247945 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 21:12:24 +00:00
David Majnemer
618b2eda98 [WinEH] Fix tests broken by funclet-layout
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247944 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 21:11:12 +00:00
Matthias Braun
80e35b7e27 RegisterPressure: Move LiveInRegs/LiveOutRegs from RegisterPressure to PressureTracker
Differential Revision: http://reviews.llvm.org/D12814

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247943 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 21:10:06 +00:00
Matthias Braun
4bdc7f8b14 MachineScheduler: Provide an option for node hiding cutoff and disable it by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247942 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 21:09:59 +00:00
Joerg Sonnenberger
e301d76124 [SPARC] Add mulscc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247940 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 20:54:26 +00:00
Sanjay Patel
8484edaccf fix typo; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247938 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 20:51:50 +00:00
David Majnemer
048d7e541d [WinEH] Add a funclet layout pass
Windows EH funclets need to be contiguous.  The FuncletLayout pass will
ensure that the funclets are together and begin with a funclet entry MBB.

Differential Revision: http://reviews.llvm.org/D12943

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247937 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 20:45:18 +00:00
Reid Kleckner
f946dd0412 [WinEH] Make funclet return instrs pseudo instrs
This makes catchret look more like a branch, and less like a weird use
of BlockAddress. It also lets us get away from
llvm.x86.seh.restoreframe, which relies on the old parentfpoffset label
arithmetic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247936 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 20:43:47 +00:00
Piotr Padlewski
9ac4d86567 gvn small fix
http://reviews.llvm.org/D12928

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247935 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 20:34:22 +00:00
Simon Pilgrim
2abbcc9f0c [InstCombine] Added vector demanded bits support for SSE4A EXTRQ/INSERTQ instructions
The SSE4A instructions EXTRQ/INSERTQ only use the lower 64-bits (or less) for many of their input vector operands and all of them have undefined upper 64-bits results.

Differential Revision: http://reviews.llvm.org/D12680

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247934 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 20:32:45 +00:00
Piotr Padlewski
c11b75566a Added MD_invariant_group to LLVMContext
http://reviews.llvm.org/D12926

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247931 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 20:25:07 +00:00