Commit Graph

86500 Commits

Author SHA1 Message Date
Anton Korobeynikov
12cfa11960 Add ARM TARGET2 relocation. The testcase will follow with actualy use-case.
Based on the patch by Logan Chien!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167633 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-09 20:20:12 +00:00
Roman Divacky
64f03673d2 Switch FreeBSD/i386 back to 4byte stack alignment. This partially
reverts r126226.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167632 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-09 20:10:44 +00:00
Jakob Stoklund Olesen
722c9a7925 Fix assertions in updateRegMaskSlots().
The RegMaskSlots contains 'r' slots while NewIdx and OldIdx are 'B'
slots. This broke the checks in the assertions.

This fixes PR14302.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167625 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-09 19:18:49 +00:00
Chad Rosier
b3235b128f Revert r167620; this can be implemented using an existing CL option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167622 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-09 18:25:27 +00:00
Chad Rosier
d054eda441 Add support for -mstrict-align compiler option for ARM targets.
rdar://12340498


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167620 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-09 17:29:38 +00:00
Benjamin Kramer
b754687fd7 Silence GCC warning about falling off the end of a non-void function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167618 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-09 15:45:22 +00:00
Dmitry Vyukov
c2e9ca15fb tsan: switch to new memory_order constants (ABI compatible)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167615 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-09 14:12:16 +00:00
Dmitry Vyukov
9f8a90b3ce tsan: instrument all atomics (including fetch_add, exchange, cas, etc)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167612 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-09 12:55:36 +00:00
Nadav Rotem
b1bf1eeede Add support for memory runtime check. When we can, we calculate array bounds.
If the arrays are found to be disjoint then we run the vectorized version of
the loop. If they are not, we run the scalar code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167608 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-09 07:09:44 +00:00
Nadav Rotem
b14a5f5f95 indent
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167607 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-09 07:02:24 +00:00
NAKAMURA Takumi
562b1d883f llvm/ConstantFolding.cpp: Make ReadDataFromGlobal() and FoldReinterpretLoadFromConstPtr() Big-endian-aware.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167595 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-08 20:34:25 +00:00
Benjamin Kramer
6b370e615c Drop the limitation to IEEE floating point types from the fdiv of pow2 -> fmul transform.
This is safe for x87 long doubles and ppc double doubles too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167582 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-08 13:58:10 +00:00
Amara Emerson
214fd3d244 Recommit modified r167540.
Improve ARM build attribute emission for architectures types.
This also changes the default architecture emitted for a generic CPU to "v7".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167574 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-08 09:51:45 +00:00
Michael Liao
be02a90de1 Add support of RTM from TSX extension
- Add RTM code generation support throught 3 X86 intrinsics:
  xbegin()/xend() to start/end a transaction region, and xabort() to abort a
  tranaction region



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167573 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-08 07:28:54 +00:00
Meador Inge
7629de3326 instcombine: Migrate strspn optimizations
This patch migrates the strspn optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167568 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-08 01:33:50 +00:00
Eric Christopher
eb3a8c5288 Fix up comment typo and 80-col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167560 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 23:38:51 +00:00
Eric Christopher
806e03d238 Add a relocation visitor to lib object. This works via caching relocated
values in a map that can be passed to consumers. Add a testcase that
ensures this works for llvm-dwarfdump.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167558 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 23:22:07 +00:00
Hans Wennborg
b0319962cf Only do switch-to-lookup table transformation when TargetTransformInfo
is available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167552 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 21:35:12 +00:00
Akira Hatanaka
e90a3bcae1 [mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node.
Patch by Sasa Stankovic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167548 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 19:10:58 +00:00
Akira Hatanaka
7085221a59 Delete MipsFunctionInfo::NextStackOffset. No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167546 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 19:04:26 +00:00
Amara Emerson
162d91c1e0 Revert r167540 until regression tests are updated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167545 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 18:57:14 +00:00
Bill Wendling
bef6eb0027 Remove accidental commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167544 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 18:39:32 +00:00
Hans Wennborg
ab1b6c83ad Fix bad test IR in switch_to_lookup_table.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167543 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 18:38:24 +00:00
Amara Emerson
19a1fcf868 Improve ARM build attribute emission for architectures types.
This also changes the default architecture emitted for a generic CPU to "v7".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167540 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 18:01:03 +00:00
Pawel Wodnicki
e4f2116afc fix typo PR1476
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167536 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 17:00:18 +00:00
Pawel Wodnicki
d36e8e8b73 fix for PR1476
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167535 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 16:56:52 +00:00
Kostya Serebryany
7846c1c851 [asan] fix bug 14277 (asan needs to fail with fata error if an __asan interface function is being redefined. Before this fix asan asserts)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167529 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 12:42:18 +00:00
Andrew Trick
3b87f6204f misched: Heuristics based on the machine model.
misched is disabled by default. With -enable-misched, these heuristics
balance the schedule to simultaneously avoid saturating processor
resources, expose ILP, and minimize register pressure. I've been
analyzing the performance of these heuristics on everything in the
llvm test suite in addition to a few other benchmarks. I would like
each heuristic check to be verified by a unit test, but I'm still
trying to figure out the best way to do that. The heuristics are still
in considerable flux, but as they are refined we should be rigorous
about unit testing the improvements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167527 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 07:05:09 +00:00
Andrew Trick
881a05b46c misched: handle on-the-fly regpressure queries better for 2-addr
instructions without relying on liveintervals.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167526 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 07:05:05 +00:00
Bill Wendling
168c190c58 Add comment describing what's going on here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167525 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 05:19:04 +00:00
Bill Wendling
a4c7693118 When we're updating the subprogram scope DIE, we want to determine if we're
updating an abstract DIE or not. If we are, then we use that. Its children will
be added on later, as well as the object pointer attribute. Otherwise, this
function may be called with a concrete DIE twice and adding the children and
object pointer attribute to it twice.
<rdar://problem/12401423&12600340>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167524 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 04:42:18 +00:00
Eli Bendersky
796f2b02f7 Fix a broken sentence
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167521 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 01:52:41 +00:00
Eli Bendersky
c78bb707a5 Document the -input-file option of FileCheck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167517 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 01:41:30 +00:00
Chad Rosier
6aa6e5a285 [arm fast-isel] Appease the machine verifier by using the proper register
classes.  For my test case the number of errors drop from 356 to 21.
Part of rdar://12594152

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167508 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 00:13:01 +00:00
Jakub Staszak
dccd7f9187 Simplify code. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167505 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 23:52:19 +00:00
Nadav Rotem
d8eae8ba05 Make the helper functions static. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167501 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 23:36:00 +00:00
Chad Rosier
e7bd51980a Mark the Int_eh_sjlj_dispatchsetup pseudo instruction as clobbering all
registers.  Previously, the register we being marked as implicitly defined, but
not killed.  In some cases this would cause the register scavenger to spill a
dead register.

Also, use an empty register mask to simplify the logic and to reduce the memory
footprint.
rdar://12592448

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167499 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 23:05:24 +00:00
Chad Rosier
7979b24e5c [regallocfast] Make sure the MachineRegisterInfo is aware of clobbers from a
register masks.  This is an obvious and necessary fix for a soon to be committed
patch.  No test case possible at this time.  Reviewed by Jakob.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167498 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 22:52:42 +00:00
Nadav Rotem
a6fb97a49a CostModel: add another known vector trunc optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167488 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 21:17:17 +00:00
Argyrios Kyrtzidis
9d8c678658 [c-index-test] When building with BUILD_CLANG_ONLY=YES, include c-index-test.
It is part of libclang and has other uses besides running the clang tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167484 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 19:54:46 +00:00
Nadav Rotem
b042868c01 Cost Model: add tables for some avx type-conversion hacks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167480 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 19:33:53 +00:00
Andrew Kaylor
a082892fb7 Fix build error from previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167477 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 19:06:46 +00:00
Andrew Kaylor
776054dd93 Add interface for object-based JIT events.
This patch adds the interface to expose events from MCJIT when an object is emitted or freed and implements the MCJIT functionality to send those events.  The IntelJITEventListener implementation is left empty for now.  It will be fleshed out in a future patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167475 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 18:51:59 +00:00
Daniel Dunbar
64afe13a20 MemoryBuffer: Windows doesn't define S_IFIFO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167467 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 17:08:09 +00:00
Alexey Samsonov
4db4a71ffd docs: use code font for console commands in phabricator manual
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167459 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 15:04:37 +00:00
Michael Liao
0f6a599434 Remove tailing whitespaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167445 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 08:06:35 +00:00
Andrew Trick
8d4abb2446 misched: TargetSchedule interface for machine resources.
Expose the processor resources defined by the machine model to the
scheduler and other clients through the TargetSchedule interface.

Normalize each resource count with respect to other kinds of
resources. This allows scheduling heuristics to balance resources
against other kinds of resources and latency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167444 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 07:10:38 +00:00
Andrew Trick
2276453e2b misched: Rename RemainingCount to avoid confusion with remaining resources.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167443 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 07:10:34 +00:00
Andrew Trick
a78d3228e8 ScheduleDAG interface. Added OrderKind to distinguish nonregister dependencies.
This is in preparation for adding "weak" DAG edges, but generally
simplifies the design.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167435 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 03:13:46 +00:00
Nadav Rotem
887c1fe701 Refactor the getTypeLegalizationCost interface. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167422 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 23:57:45 +00:00