Commit Graph

128619 Commits

Author SHA1 Message Date
Chandler Carruth
cf88e9244e [AA] Hoist the logic to reformulate various AA queries in terms of other
parts of the AA interface out of the base class of every single AA
result object.

Because this logic reformulates the query in terms of some other aspect
of the API, it would easily cause O(n^2) query patterns in alias
analysis. These could in turn be magnified further based on the number
of call arguments, and then further based on the number of AA queries
made for a particular call. This ended up causing problems for Rust that
were actually noticable enough to get a bug (PR26564) and probably other
places as well.

When originally re-working the AA infrastructure, the desire was to
regularize the pattern of refinement without losing any generality.
While I think it was successful, that is clearly proving to be too
costly. And the cost is needless: we gain no actual improvement for this
generality of making a direct query to tbaa actually be able to
re-use some other alias analysis's refinement logic for one of the other
APIs, or some such. In short, this is entirely wasted work.

To the extent possible, delegation to other API surfaces should be done
at the aggregation layer so that we can avoid re-walking the
aggregation. In fact, this significantly simplifies the logic as we no
longer need to smuggle the aggregation layer into each alias analysis
(or the TargetLibraryInfo into each alias analysis just so we can form
argument memory locations!).

However, we also have some delegation logic inside of BasicAA and some
of it even makes sense. When the delegation logic is baking in specific
knowledge of aliasing properties of the LLVM IR, as opposed to simply
reformulating the query to utilize a different alias analysis interface
entry point, it makes a lot of sense to restrict that logic to
a different layer such as BasicAA. So one aspect of the delegation that
was in every AA base class is that when we don't have operand bundles,
we re-use function AA results as a fallback for callsite alias results.
This relies on the IR properties of calls and functions w.r.t. aliasing,
and so seems a better fit to BasicAA. I've lifted the logic up to that
point where it seems to be a natural fit. This still does a bit of
redundant work (we query function attributes twice, once via the
callsite and once via the function AA query) but it is *exactly* twice
here, no more.

The end result is that all of the delegation logic is hoisted out of the
base class and into either the aggregation layer when it is a pure
retargeting to a different API surface, or into BasicAA when it relies
on the IR's aliasing properties. This should fix the quadratic query
pattern reported in PR26564, although I don't have a stand-alone test
case to reproduce it.

It also seems general goodness. Now the numerous AAs that don't need
target library info don't carry it around and depend on it. I think
I can even rip out the general access to the aggregation layer and only
expose that in BasicAA as it is the only place where we re-query in that
manner.

However, this is a non-trivial change to the AA infrastructure so I want
to get some additional eyes on this before it lands. Sadly, it can't
wait long because we should really cherry pick this into 3.8 if we're
going to go this route.

Differential Revision: http://reviews.llvm.org/D17329

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262490 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 15:56:53 +00:00
Simon Pilgrim
cef27046fd [X86][SSSE3] Added combine test for unary shuffle (pshufb) only referencing elements from one of the inputs of a binary shuffle (punpcklbw)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262486 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 14:16:50 +00:00
Michael Zuckerman
ab1bc1ad70 [LLVM][AVX512]PSRAWI Change imm8 to int.
Differential Revision: http://reviews.llvm.org/D17705


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262480 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 12:05:07 +00:00
Simon Pilgrim
d4c33f0b2c [X86][SSE] Lower 128-bit MOVDDUP with existing VBROADCAST mechanisms
We have a number of useful lowering strategies for VBROADCAST instructions (both from memory and register element 0) which the 128-bit form of the MOVDDUP instruction can make use of.

This patch tweaks lowerVectorShuffleAsBroadcast to enable it to broadcast 2f64 args using MOVDDUP as well.

It does require a slight tweak to the lowerVectorShuffleAsBroadcast mechanism as the existing MOVDDUP lowering uses isShuffleEquivalent which can match binary shuffles that can lower to (unary) broadcasts.

Differential Revision: http://reviews.llvm.org/D17680

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262478 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 11:43:05 +00:00
Nikolay Haustov
23e3fff616 Revert "[AMDGPU] table-driven parser/printer for amd_kernel_code_t structure fields"
Build failure with clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262477 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 11:16:56 +00:00
Nikolay Haustov
1bbd737b59 Revert "[AMDGPU] Using table-driven amd_kernel_code_t field parser in assembler."
Build failure with clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262475 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 10:54:21 +00:00
Nikolay Haustov
45f86de844 [AMDGPU] Using table-driven amd_kernel_code_t field parser in assembler.
complementary patch to table-driven amd_kernel_code_t field parser/printer utility. lit tests passed.

Patch by: Valery Pykhtin

Differential Revision: http://reviews.llvm.org/D17151

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262474 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 10:36:30 +00:00
Nikolay Haustov
c7d8cf3026 [AMDGPU] table-driven parser/printer for amd_kernel_code_t structure fields
This is going to be used in .hsatext disassembler and can be used
in current assembler parser (lit tests passed on parsing).
Code using this helpers isn't included in this patch.

Benefits:

unified approach
fast field name lookup on parsing
Later I would like to enhance some of the field naming/syntax using this code.

Patch by: Valery Pykhtin

Differential Revision: http://reviews.llvm.org/D17150

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262473 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 10:36:25 +00:00
Dmitry Vyukov
f984411dc5 libfuzzer: fix compiler warnings
- unused sigaction/setitimer result (used in assert)
- unchecked fscanf return value
- signed/unsigned comparison



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262472 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 09:54:40 +00:00
Craig Topper
6062be58e6 [X86] Remove unnecessary call to isReg from emitter's DestMem handling for VEX prefix. The operand is always a register. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262468 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 07:32:45 +00:00
Craig Topper
b2eadc30fa [X86] Make X86MCCodeEmitter::DetermineREXPrefix locate operands more like how VEX prefix handling does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262467 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 07:32:43 +00:00
David Majnemer
60cefca131 [X86] Permit reading of the FLAGS register without it being previously defined
We modeled the RDFLAGS{32,64} operations as "using" {E,R}FLAGS.
While technically correct, this is not be desirable for folks who want
to examine aspects of the FLAGS register which are not related to
computation like whether or not CPUID is a valid instruction.

Differential Revision: http://reviews.llvm.org/D17782

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262465 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 06:46:52 +00:00
Craig Topper
0da6ab99d4 [X86] Remove assertion I accidentally left in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262464 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 06:35:22 +00:00
Craig Topper
4a0b203f40 [X86] Be more structured about how we capture the register number when it is encoded in bits 7:4 of the immediate.
For some instructions the register is not the last operand and the immediate handling had to detect this and hardcode the index to find it. It also required CurOp to be pointing at the last operand handled in the Form switch whereas for any instruction it would be pointing at the next operand.

Now we just capture the value in the Form switch when we know exactly where it is and the CurOp pointer can behave normally.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262462 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 06:06:18 +00:00
Sanjoy Das
cffb9b972c [SCEV] Minor naming, braces cleanup; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262459 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 04:52:22 +00:00
Craig Topper
a28c17a212 [X86] Use MCPhysReg and uint16_t for static arrays of registers and opcodes respectively should reduce size tiny bit. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262458 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 04:42:31 +00:00
Matt Arsenault
a0358fa131 AMDGPU: Fix bug 26659.
Fix checking the same instruction twice instead of the
second branch that uses vccz. I don't think this matters
currently because s_branch_vccnz is always used currently.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262457 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 04:12:39 +00:00
Matt Arsenault
3c8187f7a7 AMDGPU: Cleanup suggested in bug 23960
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262456 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 04:05:14 +00:00
Matt Arsenault
16d6cd471c Bug 20810: Use report_fatal_error instead of unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262455 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 03:33:55 +00:00
Sanjoy Das
43d3a16be3 Add a comment with a rational for the unusual code structure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262454 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 02:56:29 +00:00
Sanjoy Das
3ee664b45c Qualify getRangeForAffineAR with this-> for MSVC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262453 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 02:44:08 +00:00
George Burgess IV
f3d29244a8 Attempt to fix ASAN failure in a MemorySSA test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262452 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 02:35:04 +00:00
Sanjoy Das
67499b434e Perturb code in an attempt to appease MSVC
For some reason MSVC seems to think I'm calling getConstant() from a
static context.  Try to avoid this issue by explicitly specifying
'this->' (though I'm not confident that this will actually work).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262451 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 02:34:20 +00:00
Sanjoy Das
29fa15036a More code permutation to appease MSVC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262449 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 02:15:42 +00:00
Sanjoy Das
29ae4c5fd9 Remove "auto" to appease the MSVC bots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262448 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 01:59:37 +00:00
Matt Arsenault
543afc9d41 DAGCombiner: Make sure an integer is being truncated
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262446 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 01:36:51 +00:00
Sanjay Patel
a7693ee508 revert r262424 because there's a *clang test* for AArch64 that checks -O3 asm output
that is broken by this change


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262440 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 01:04:09 +00:00
Daniel Berlin
dee2eabd02 Fix SHARED_LIBS build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262439 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 00:58:48 +00:00
Sanjoy Das
1c60097b64 [SCEV] Make getRange smarter around selects
Have ScalarEvolution::getRange re-consider cases like "{C?A:B,+,C?P:Q}"
by factoring out "C" and computing RangeOf{A,+,P} union RangeOf({B,+,Q})
instead.

The latter can be easier to compute precisely in cases like
"{C?0:N,+,C?1:-1}" N is the backedge taken count of the loop; since in
such cases the latter form simplifies to [0,N+1) union [0,N+1).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262438 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 00:57:54 +00:00
Sanjoy Das
a06e68cc8d [SCEV] Extract out a getRangeForAffineAR; NFC
Pure code-motion change.  Will be used later in making getRange more clever.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262437 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 00:57:39 +00:00
Chris Bieneman
d702b73a42 [CMake] Add convenience target llvm-test-depends to build test dependencies.
This is useful when paired with the distribution targets to build prerequisites for running tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262428 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 00:27:14 +00:00
Chris Bieneman
c26136be88 [CMake] Add distribution target that is the "just-build" side of install-distribution
This is just a convenience target to allow limiting what you build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262427 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 00:27:12 +00:00
Sanjay Patel
0cd6df9cc1 [InstCombine] convert 'isPositive' and 'isNegative' vector comparisons to shifts (PR26701)
As noted in the code comment, I don't think we can do the same transform that we do for
*scalar* integers comparisons to *vector* integers comparisons because it might pessimize
the general case. 

Exhibit A for an incomplete integer comparison ISA remains x86 SSE/AVX: it only has EQ and GT
for integer vectors.

But we should now recognize all the variants of this construct and produce the optimal code
for the cases shown in:
https://llvm.org/bugs/show_bug.cgi?id=26701
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262424 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 23:55:18 +00:00
Dehao Chen
3ff7d1073c Perform InstructioinCombiningPass before SampleProfile pass.
Summary: SampleProfile pass needs to be performed after InstructionCombiningPass, which helps eliminate un-inlinable function calls.

Reviewers: davidxl, dnovillo

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17742

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262419 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 22:53:02 +00:00
Kostya Serebryany
66bb64fd43 [libFuzzer] deprecate exit_on_first flag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262417 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 22:33:14 +00:00
David Blaikie
7ade1db315 llvm-dwp: Add missing copyright notice to llvm-dwp.cpp
Addressing feedback on IRC by Sean Silva.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262416 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 22:29:00 +00:00
Kostya Serebryany
7a1dcf9965 [libFuzzer] add generic signal handlers so that libFuzzer can report at least something if ASan is not handlig the signals for us. Remove abort_on_timeout flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262415 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 22:19:21 +00:00
Simon Pilgrim
912e48402f [X86][SSE41] Added missing fast-isel intrinsics tests
Match IR generated in clang/test/CodeGen/sse41-builtins.c

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262412 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 22:05:05 +00:00
Colin LeMahieu
71381aee13 [NFC] Convert tabs to spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262411 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 22:05:03 +00:00
Simon Pilgrim
c778e432d5 [X86][XOP] Regenerated intrinsics tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262410 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 21:58:50 +00:00
Matthias Braun
eb51cacf62 AArch64: Reenable CompleteModel for A53, A57 and Kryo models
The fixes in r262393 completed them as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262408 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 21:55:35 +00:00
Simon Pilgrim
b03901e073 [X86][AVX2] Regenerated 256-bit vector / 64-bit element permute tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262406 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 21:53:12 +00:00
Tim Northover
9645a0d878 Fix typo. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262405 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 21:45:22 +00:00
Simon Pilgrim
8c0b039587 [X86][AVX2] Regenerated horizontal add/sub tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262403 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 21:43:55 +00:00
Simon Pilgrim
7339de5481 [X86][AVX2] Regenerated intrinsics tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262401 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 21:38:41 +00:00
Colin LeMahieu
9371f402bc [Hexagon] Modifying r262258 to only be in effect in the hand assembler path, not the integrated assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262400 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 21:37:41 +00:00
Matthias Braun
3b1588aa81 TableGen: Display helpfull message for incomplete models.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262399 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 21:36:12 +00:00
Simon Pilgrim
b6e5058d1b [X86][AVX] Fixed triple/arch clash in test case
We were specifying a x64 triple and then overriding with a x86 arch. 

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262398 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 21:33:08 +00:00
Matt Arsenault
d06f393d79 DAGCombiner: Turn truncate of a bitcasted vector to an extract
On AMDGPU where operations i64 operations are often bitcasted to v2i32
and back, this pattern shows up regularly where it breaks some
expected combines on i64, such as load width reducing.

This fixes some test failures in a future commit when i64 loads
are changed to promote.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262397 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 21:31:53 +00:00
Rafael Espindola
b2d0b15d68 Add LLVMBuild for ObjectYAML.
Should fix the DBUILD_SHARED_LIBS bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262396 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 21:29:33 +00:00