Commit Graph

128619 Commits

Author SHA1 Message Date
Sanjay Patel
1ede7cb611 use range-based for loop; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262956 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 20:53:48 +00:00
Sanjay Patel
be9115f49d fix variable name; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262953 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 19:07:42 +00:00
Sanjay Patel
57d9dbefb3 use range-based loop; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262952 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 19:06:12 +00:00
Hans Wennborg
44e9ec2873 Add self to CODE_OWNERS
Apparently this makes my email address easier to find.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262951 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 19:01:15 +00:00
Saleem Abdulrasool
c31c2a434f cmake: include what you use
Add a missing include.  This is important in the case HandleLLVMOptions is
included prior to the missing CheckCXXSourceCompiles or CheckCXXCompilerFlag
which includes CheckCXXSourceCompiles.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262949 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 18:56:00 +00:00
Chris Bieneman
7c1ba5c1c1 [CMake] Refactor add_llvm_implicit_projects to be reusable
This adds llvm_add_implicit_projects which takes a project name and is wrapped by add_llvm_implicit_projects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262948 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 18:43:28 +00:00
Chad Rosier
9524e85d1d [AArch64] Disable the MI scheduler to turn bots green after r262942.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262944 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 17:33:34 +00:00
Quentin Colombet
491d1356a7 Revert r262759 and r262760.
The fix consisting in using the library call for atomic compare and swap when
the instruction is not safe to use may be incorrect. Indeed the library call may
not exist on all platform. In other words, we need a better fix! 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262943 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 17:29:11 +00:00
Chad Rosier
3d1145193c [AArch64] Add MMOs to unscaled pairs.
Test to be committed in follow up commit, per discussion in D17097.
http://reviews.llvm.org/D17097

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262942 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 17:16:38 +00:00
Sanjay Patel
94c032fe90 rangify, fix function names; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262940 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 17:12:32 +00:00
Krzysztof Parzyszek
05a0bf3589 Invoke DAG postprocessing in the post-RA scheduler
This was inadvertently omitted from r262774, which added the mutation
interface.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262939 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 16:54:20 +00:00
Sanjay Patel
593168882c don't repeat function names in documentation comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262937 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 16:26:39 +00:00
Artyom Skrobov
c6b7905144 [ARM] Simplify ARMInstr*.td by getting rid of identity PatFrags (NFC)
Reviewers: t.p.northover, grosbach, resistor

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: http://reviews.llvm.org/D17636

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262936 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 16:23:54 +00:00
Hans Wennborg
56c1fb24e4 Revert r262599 "[X86][SSE] Improve vector ZERO_EXTEND by combining to ZERO_EXTEND_VECTOR_INREG"
This caused PR26870.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262935 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 16:21:41 +00:00
Manuel Klimek
8b37c12900 Fix problem with uninitilialized bool found by asan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262934 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 16:17:48 +00:00
Krzysztof Parzyszek
965326494a Add DAG mutation interface to the DFA packetizer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262930 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 15:33:51 +00:00
Igor Breger
0fb75e4e92 AVX512: Add extract_subvector patterns v8i1->v4i1 , v4i1->v2i1.
Differential Revision: http://reviews.llvm.org/D17953

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262929 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 15:21:25 +00:00
Benjamin Kramer
b644c0ae0a [gold] Avoid assertion failures when taking a pointer to an empty vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262926 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 14:02:46 +00:00
Filipe Cabecinhas
8a96b704a3 [llvm-config] Get rid of code related to the Makefile builds
Summary: I left --build-system for backwards compat, in case there are scripts using it. Feel free to ask for its removal too.

Reviewers: chapuni, tstellarAMD

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17886

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262924 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 11:49:24 +00:00
Simon Pilgrim
4aaa0e7c6a [X86] Regenerated vector float extension tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262919 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 09:17:12 +00:00
Junmo Park
35d44767f6 Remove pr25342 test-case.
This commit removes pr25342 for reverting r262670 clearly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262918 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 07:42:12 +00:00
Junmo Park
23c40a726f Revert "[InstCombine] Combine A->B->A BitCast"
This reverts commit r262670 due to compile failure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262916 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 07:09:46 +00:00
Justin Bogner
a36efde3c8 SelectionDAG: Appease the bots that don't like my union
Should fix the breakage in r262902.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262908 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 03:51:58 +00:00
Peter Collingbourne
fb8bf30df5 Fix evaluation order. Spotted by Alexander Riccio!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262907 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 03:50:36 +00:00
Kit Barton
7cca145db8 [Power9] Implement new vsx instructions: load, store instructions for vector and scalar
We follow the comments mentioned in http://reviews.llvm.org/D16842#344378 to
implement this new patch.

This patch implements the following vsx instructions:

Vector load/store:
lxv lxvx lxvb16x lxvl lxvll lxvh8x lxvwsx
stxv stxvb16x stxvh8x stxvl stxvll stxvx
Scalar load/store:
lxsd lxssp lxsibzx lxsihzx
stxsd stxssp stxsibx stxsihx
21 instructions

Phabricator: http://reviews.llvm.org/D16919

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262906 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 03:49:13 +00:00
Dan Gohman
2d88e345fe [WebAssembly] Update for spec change from tableswitch to br_table.
Also note that the operand order changed; the default label is now listed
after the regular labels.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262903 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 03:18:12 +00:00
Justin Bogner
6fc18536b7 Re-apply "SelectionDAG: Store SDNode operands in an ArrayRecycler"
This re-applies r262886 with a fix for 32 bit platforms that have 8 byte
pointer alignment, effectively reverting r262892.

Original Message:

  Currently some SDNode operands are malloc'd, some are stored inline in
  subclasses of SDNode, and some are thrown into a BumpPtrAllocator.
  This scheme is complex, inconsistent, and makes refactoring SDNodes
  fairly difficult.

  Instead, we can allocate all of the operands using an ArrayRecycler
  that wraps a BumpPtrAllocator. This keeps the cache locality when
  iterating operands, improves locality when iterating SDNodes without
  looking at operands, and vastly simplifies the ownership semantics.

  It also means we stop overallocating SDNodes by 2-3x and will make it
  simpler to fix the rampant undefined behaviour we have in how we
  mutate SDNodes from one kind to another (See llvm.org/pr26808).

  This is NFC other than the changes in memory behaviour, and I ran some
  LNT tests to make sure this didn't hurt compile time. Not many tests
  changed: there were a couple of 1-2% regressions reported, but there
  were more improvements (of up to 4%) than regressions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262902 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 03:14:29 +00:00
Quentin Colombet
252dec6972 [MIR] Change the token name for '<' and '>' to be consitent with the LLVM IR parser.
Thanks to Ahmed Bougacha for noticing!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262899 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 02:00:43 +00:00
Quentin Colombet
520819d997 [AArch64][GlobalISel] Add a test case for the IRTranslator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262898 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 01:48:08 +00:00
Quentin Colombet
76cdab6f0a [AArch64] Initialize GlobalISel as part of the target initialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262897 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 01:45:36 +00:00
Quentin Colombet
1f00e2d8f3 [GlobalISel] Introduce initializer method to support start/stop-after features.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262896 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 01:38:55 +00:00
Quentin Colombet
13129166eb [MIR] Teach the parser/printer that generic virtual registers do not need a register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262893 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 01:17:03 +00:00
Justin Bogner
2a7cc3e509 Revert "SelectionDAG: Store SDNode operands in an ArrayRecycler"
Looks like the largest SDNode is different between 32 and 64 bit now,
so this is breaking 32 bit bots. Reverting while I figure out a fix.

This reverts r262886.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262892 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 01:07:03 +00:00
Richard Smith
17a583f29c A couple more UB fixes for C++14 sized deallocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262891 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:59:44 +00:00
Quentin Colombet
03a69ba83b [MIR] Teach the parser how to parse complex types of generic machine instructions.
By complex types, I mean aggregate or vector types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262890 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:57:31 +00:00
Justin Bogner
54124b63dc SelectionDAG: Store SDNode operands in an ArrayRecycler
Currently some SDNode operands are malloc'd, some are stored inline in
subclasses of SDNode, and some are thrown into a BumpPtrAllocator.
This scheme is complex, inconsistent, and makes refactoring SDNodes
fairly difficult.

Instead, we can allocate all of the operands using an ArrayRecycler
that wraps a BumpPtrAllocator. This keeps the cache locality when
iterating operands, improves locality when iterating SDNodes without
looking at operands, and vastly simplifies the ownership semantics.

It also means we stop overallocating SDNodes by 2-3x and will make it
simpler to fix the rampant undefined behaviour we have in how we
mutate SDNodes from one kind to another (See llvm.org/pr26808).

This is NFC other than the changes in memory behaviour, and I ran some
LNT tests to make sure this didn't hurt compile time. Not many tests
changed: there were a couple of 1-2% regressions reported, but there
were more improvements (of up to 4%) than regressions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262886 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:39:51 +00:00
Quentin Colombet
4ae6fddb70 [MIR] Teach the printer how to print complex types for generic machine instructions.
Before this change, we would get the type definition in the middle
of the instruction.
E.g., %0(48) = G_ADD %struct_alias = type { i32, i16 } %edi, %edi

Now, we have just the expected type name:
%0(48) = G_ADD %struct_alias %edi, %edi


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262885 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:38:01 +00:00
Quentin Colombet
cbd4dbb999 [AsmParser] Expose an API to parse a string starting with a type.
Without actually parsing a type it is difficult to perdict where
the type definition ends. In other words, instead of expecting
the user of the parser API to hand over only the relevant bits
of the string being parsed, take the whole string, parse the type,
and get back the number of characters that have been read.

This will be used by the MIR testing infrastructure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262884 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:37:07 +00:00
Easwaran Raman
8a53057ba3 Revert revisions 262636, 262643, 262679, and 262682.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262883 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:36:35 +00:00
Quentin Colombet
5809e74255 [MIR] Print the type of generic machine instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262880 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:29:15 +00:00
Quentin Colombet
7ed6f84652 [MIR] Teach the mir parser about types on generic machine instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262879 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:20:48 +00:00
Quentin Colombet
392312ed5a [lit] Teach lit about global-isel requirement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262878 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:03:40 +00:00
Quentin Colombet
a7b1d455cc [llvm-config] Teach llvm-config about global-isel.
llvm-config can know tell whether or not a build has been configured to support
global-isel.
Use '--has-global-isel' for that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262877 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:02:50 +00:00
Anna Zaks
8f023303dc [tsan] Add support for pointer typed atomic stores, loads, and cmpxchg
TSan instrumentation functions for atomic stores, loads, and cmpxchg work on
integer value types. This patch adds casts before calling TSan instrumentation
functions in cases where the value is a pointer.

Differential Revision: http://reviews.llvm.org/D17833

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262876 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 23:16:23 +00:00
Sanjay Patel
60ef971c25 [x86] add test to show missing optimization
This should make it clearer how this proposed patch:
http://reviews.llvm.org/D11393
...will change codegen.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262875 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 23:13:06 +00:00
Sanjay Patel
9169de74b0 [x86] simplify test and tighten checks
I noticed this test as part of:
http://reviews.llvm.org/D11393
...which is confusing enough as-is. 
Let's show the exact codegen, so the changes will be more obvious.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262874 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 22:53:23 +00:00
Quentin Colombet
c101677635 [MachineInstr] Get rid of some GlobalISel ifdefs.
Now the type API is always available, but when global-isel is not
built the implementation does nothing.

Note: The implementation free of ifdefs is WIP and tracked here in PR26576.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262873 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 22:47:23 +00:00
Amaury Sechet
0439f740b2 Remove unused import in Orc C API
Summary: It is not used.

Reviewers: lhames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17251

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262870 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 22:40:07 +00:00
Quentin Colombet
dbefd77861 [IR] Provide an API to skip the details of a structured type when printed.
The mir infrastructure will need this for generic instructions and currently
this feature was only available through the anonymous TypePrinter class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262869 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 22:32:42 +00:00
Quentin Colombet
2ba0323edd [AsmParser] Add a function to parse a standalone type.
This is useful for MIR serialization. Indeed generic machine instructions
must have a type and we don't want to duplicate the logic in the MIParser.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262868 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 22:09:05 +00:00