This fixes some problems when building ClangDiagnostics.cpp on Visual Studio 2017 RC. As far as I understand, there was a change in the implementation of the constructor for std::vector with two iterator parameters, which in our case causes an attempt to dereference const Iterator objects. Since there was no overload for a const Iterator, the compile would fail.
Patch by Hugo Puhlmann!
Differential Revision: https://reviews.llvm.org/D28726
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292034 91177308-0d34-0410-b5e6-96231b3b80d8
VPMACSDQH/VPMACSDQL act as VPADDQ( VPMULDQ( x, y ), z ) - multiply+extending either the odd/even 4i32 input elements and adding to v2i64 accumulator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292020 91177308-0d34-0410-b5e6-96231b3b80d8
VPMACSWW/VPMACSDD act as add( mul( x, y ), z ) - ignoring any upper bits from both the multiply and add stages
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292019 91177308-0d34-0410-b5e6-96231b3b80d8
Tests showing missed opportunities to use XOP's integer fma instructions
Some of these are pretty awkward to match as they often have implicit sext/trunc stages but many just ignore overflow bits which makes things pretty straightforward.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292017 91177308-0d34-0410-b5e6-96231b3b80d8
Correct handling of the following FileCheck options is implemented in
update_llc_test_checks.py and update_test_checks.py scripts:
1) -check-prefix (with a single dash)
2) -check-prefixes (with multiple prefixes)
Differential Revision: https://reviews.llvm.org/D28572
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292008 91177308-0d34-0410-b5e6-96231b3b80d8
Isel now selects masked move instructions for vselect instead of blendm. But sometimes it beneficial to register allocation to remove the tied register constraint by using blendm instructions.
This also picks up cases where the masked move was created due to a masked load intrinsic.
Differential Revision: https://reviews.llvm.org/D28454
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292005 91177308-0d34-0410-b5e6-96231b3b80d8
We'll now expand AVX512_128_SET0 to an EVEX VXORD if VLX available. Or if its not, but register allocation has selected a non-extended register we will use VEX VXORPS. And if its an extended register without VLX we'll use a 512-bit XOR. Do the same for AVX512_FsFLD0SS/SD.
This makes it possible for the register allocator to have all 32 registers available to work with.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292004 91177308-0d34-0410-b5e6-96231b3b80d8
This fallthrough if other cases are added between fabs and default
could cause fabs to fall to the next case resulting in a bug.
Better getting rid of it immediately just to be sure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292003 91177308-0d34-0410-b5e6-96231b3b80d8
extractProfTotalWeight checks if the profile type is sample profile, but
before that we have to ensure that summary is available. Also expanded
the unittest to test the case where there is no summar
Differential Revision: https://reviews.llvm.org/D28708
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291982 91177308-0d34-0410-b5e6-96231b3b80d8
When GlobalISel is configured to abort rather than fallback the only
thing that resetting the machine function does is make things harder
to debug. If we ever get to this point in the abort configuration it
indicates that we've already hit a bug, so this changes the behaviour
to abort instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291977 91177308-0d34-0410-b5e6-96231b3b80d8
Allows LLVM to optimize sequences like the following:
%add = add nuw i32 %x, 1
%cmp = icmp ugt i32 %add, %y
Into:
%cmp = icmp uge i32 %x, %y
Previously, only signed comparisons were being handled.
Decrements could also be handled, but 'sub nuw %x, 1' is currently canonicalized to
'add %x, -1' in InstCombineAddSub, losing the nuw flag. Removing that canonicalization
seems like it might have far-reaching ramifications so I kept this simple for now.
Patch by Matti Niemenmaa!
Differential Revision: https://reviews.llvm.org/D24700
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291975 91177308-0d34-0410-b5e6-96231b3b80d8
Correctly populating Machine PHIs relies on knowing exactly how the IR level
CFG was lowered to MachineIR. This needs to be tracked by any translation
phases that meddle (currently only SwitchInst handling).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291973 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
This is a testcase where phi node cycling happens, and because we do
not order the leaders by domination or anything similar, the leader
keeps changing.
Using std::set for the members is too expensive, and we actually don't
need them sorted all the time, only at leader changes.
We could keep both a set and a vector, and keep them mostly sorted and
resort as necessary, or use a set and a fibheap, but all of this seems
premature.
After running some statistics, we are able to avoid the vast majority
of sorting by keeping a "next leader" field. Most congruence classes only have
leader changes once or twice during GVN.
Reviewers: davide
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D28594
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291968 91177308-0d34-0410-b5e6-96231b3b80d8
Removed all DWARFDie::getAttributeValueAs*() calls.
Renamed:
Optional<DWARFFormValue> DWARFDie::getAttributeValue(dwarf::Attribute);
To:
Optional<DWARFFormValue> DWARFDie::find(dwarf::Attribute);
Added:
Optional<DWARFFormValue> DWARFDie::findRecursively(dwarf::Attribute);
All decoding of Optional<DWARFFormValue> values are now done using the dwarf::to*() functions from DWARFFormValue.h:
Old code:
auto DeclLine = DWARFDie.getAttributeValueAsSignedConstant(DW_AT_decl_line).getValueOr(0);
New code:
auto DeclLine = toUnsigned(DWARFDie.find(DW_AT_decl_line), 0);
This composition helps us since we can now easily do:
auto DeclLine = toUnsigned(DWARFDie.findRecursively(DW_AT_decl_line), 0);
This allows us to easily find attribute values in the current DIE only (the first new code above) or in any DW_AT_abstract_origin or DW_AT_specification Dies using the line above. Note that the code line length is shorter and more concise.
Differential Revision: https://reviews.llvm.org/D28581
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291959 91177308-0d34-0410-b5e6-96231b3b80d8
Only scalar half-precision operations are supported at the moment.
- Adds general support for 'half' type in NVPTX.
- fp16 math operations are supported on sm_53+ GPUs only
(can be disabled with --nvptx-no-f16-math).
- Type conversions to/from fp16 are supported on all GPU variants.
- On GPU variants that do not have full fp16 support (or if it's disabled),
fp16 operations are promoted to fp32 and results are converted back
to fp16 for storage.
Differential Revision: https://reviews.llvm.org/D28540
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291956 91177308-0d34-0410-b5e6-96231b3b80d8
Previously we'd always lower @llvm.{sin,cos}.f32 to {sin.cos}.approx.f32
instruction even when unsafe FP math was not allowed.
Clang-generated IR is not affected by this as it uses precise sin/cos
from CUDA's libdevice when unsafe math is disabled.
Differential Revision: https://reviews.llvm.org/D28619
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291936 91177308-0d34-0410-b5e6-96231b3b80d8
This lowers to SHUFPD if the input is zeroinitializer but not with a demanded elts optimized build vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291924 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
libstdc++ has some undefined behavior in bits/stl_tree.h that
has recently became excercised by some of the LLVM code.
Given that fixing libstdc++ will take years, adding the file
into a blacklist to fix bots seems like a necessity.
Reviewers: vitalybuka
Subscribers: llvm-commits, mgorny
Differential Revision: https://reviews.llvm.org/D28686
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291918 91177308-0d34-0410-b5e6-96231b3b80d8