1
0
mirror of https://github.com/RPCSX/llvm.git synced 2025-01-09 05:31:19 +00:00
Commit Graph

143377 Commits

Author SHA1 Message Date
Sanjay Patel
2061aabd6a [InstCombine] clean up visitAshr(); NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292036 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 23:13:50 +00:00
Sanjay Patel
1849414f3e [InstCombine] add test to show missed vector fold; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292035 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 23:12:29 +00:00
David Majnemer
fe78796b30 Adding const overloads of operator* and operator-> for DenseSet iterators
This fixes some problems when building ClangDiagnostics.cpp on Visual Studio 2017 RC. As far as I understand, there was a change in the implementation of the constructor for std::vector with two iterator parameters, which in our case causes an attempt to dereference const Iterator objects. Since there was no overload for a const Iterator, the compile would fail.

Patch by Hugo Puhlmann!

Differential Revision: https://reviews.llvm.org/D28726

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292034 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 21:54:58 +00:00
Davide Italiano
6fc369afea [NewGVN] Fix a warning from GCC.
Patch by Gonsolo.
Differential Revision:  https://reviews.llvm.org/D28731

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292031 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 20:44:08 +00:00
Davide Italiano
ef1d09ade3 [NewGVN] clang-format this file after recent changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292026 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 20:15:04 +00:00
Davide Italiano
a8cc948667 [NewGVN] Try to be consistent wit the style used in this file. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292025 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 20:13:18 +00:00
Davide Italiano
3bd353386a [TargetLowering] Simplfiy a bit. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292024 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 20:09:29 +00:00
Simon Pilgrim
75f614f4c2 [CostModel][X86] Updated vXi64 ASHR costs on AVX512 targets now that D28604 has landed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292023 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 19:24:23 +00:00
Simon Pilgrim
97658211eb [X86][XOP] Added support for VPMADCSWD 'extend+hadd' IFMA patterns
VPMADCSWD act as VPADDD( VPMADDWD( x, y ), z ) - multiply+extend+hadd and add to v4i32 accumulator

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292021 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 18:52:13 +00:00
Simon Pilgrim
261f559da3 [X86][XOP] Added support for VPMACSDQH/VPMACSDQL 'extension' IFMA patterns
VPMACSDQH/VPMACSDQL act as VPADDQ( VPMULDQ( x, y ), z ) - multiply+extending either the odd/even 4i32 input elements and adding to v2i64 accumulator

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292020 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 18:08:54 +00:00
Simon Pilgrim
08c5cbd394 [X86][XOP] Added support for VPMACSWW/VPMACSDD 'lossy' IFMA patterns
VPMACSWW/VPMACSDD act as add( mul( x, y ), z ) - ignoring any upper bits from both the multiply and add stages

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292019 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 17:13:52 +00:00
Simon Pilgrim
6dbd68e62b [X86][XOP] Add tests for integer fused multiply add
Tests showing missed opportunities to use XOP's integer fma instructions

Some of these are pretty awkward to match as they often have implicit sext/trunc stages but many just ignore overflow bits which makes things pretty straightforward.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292017 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 13:07:22 +00:00
Sylvestre Ledru
1d6becb423 fix some typos in the doc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292014 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 11:37:01 +00:00
Nikolai Bozhenov
d4a4367ac0 [utils] Improve extraction of check prefixes from RUN lines
Correct handling of the following FileCheck options is implemented in
update_llc_test_checks.py and update_test_checks.py scripts:

1) -check-prefix (with a single dash)
2) -check-prefixes (with multiple prefixes)

Differential Revision: https://reviews.llvm.org/D28572


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292008 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 09:39:35 +00:00
Craig Topper
7b47370e8e [AVX-512] Teach two address instruction pass to replace masked move instructions with blendm instructions when its beneficial.
Isel now selects masked move instructions for vselect instead of blendm. But sometimes it beneficial to register allocation to remove the tied register constraint by using blendm instructions.

This also picks up cases where the masked move was created due to a masked load intrinsic.

Differential Revision: https://reviews.llvm.org/D28454

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292005 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 07:50:52 +00:00
Craig Topper
49a15c1e8e [AVX-512] Replace V_SET0 in AVX-512 patterns with AVX512_128_SET0. Enhance AVX512_128_SET0 expansion to make this possible.
We'll now expand AVX512_128_SET0 to an EVEX VXORD if VLX available. Or if its not, but register allocation has selected a non-extended register we will use VEX VXORPS. And if its an extended register without VLX we'll use a 512-bit XOR. Do the same for AVX512_FsFLD0SS/SD.

This makes it possible for the register allocator to have all 32 registers available to work with.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292004 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 07:29:24 +00:00
Marcello Maggioni
99dc11c166 Removing potentially error-prone fallthrough. NFC
This fallthrough if other cases are added between fabs and default
could cause fabs to fall to the next case resulting in a bug.
Better getting rid of it immediately just to be sure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292003 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 07:28:47 +00:00
Xin Tong
2472433b47 Delete duplicate word. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291999 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 05:51:36 +00:00
Craig Topper
1e76954dbb [X86] Simplify the code that calculates a scaled blend mask. We don't need a second loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291996 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 04:29:15 +00:00
Craig Topper
7c24b913f8 [AVX-512] Change blend mask in lowerVectorShuffleAsBlend to a 64-bit value. Also add 32-bit mode command lines to the test case that exercises this just to make sure we sanely handle the 64-bit immediate there.
This fixes a undefined sanitizer failure from r291888.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291994 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 04:19:35 +00:00
Eugene Zelenko
15ffebc95b Fix modules buildbots broken in r291983.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291985 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 01:07:05 +00:00
Eugene Zelenko
034cc87d1e [Transforms/Utils] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291983 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 00:32:38 +00:00
Easwaran Raman
65d7a8cd1c Compute summary before calling extractProfTotalWeight
extractProfTotalWeight checks if the profile type is sample profile, but
before that we have to ensure that summary is available. Also expanded
the unittest to test the case where there is no summar

Differential Revision: https://reviews.llvm.org/D28708

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291982 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 00:32:37 +00:00
Daniel Berlin
23bf3fe69d NewGVN: Kill unneeded DFSDomMap, cleanup a few comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291981 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 00:24:23 +00:00
Daniel Berlin
9567625d9c Fix update_test_checks not to accidentally believe type names are variable names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291980 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 23:54:15 +00:00
Daniel Berlin
ea4e23e5be NewGVN: Fix PR31613 test regex naming
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291979 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 23:54:10 +00:00
Justin Bogner
669e297a93 GlobalISel: Abort in ResetMachineFunctionPass if fallback isn't enabled
When GlobalISel is configured to abort rather than fallback the only
thing that resetting the machine function does is make things harder
to debug. If we ever get to this point in the abort configuration it
indicates that we've already hit a bug, so this changes the behaviour
to abort instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291977 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 23:46:11 +00:00
Sanjay Patel
3d039197d7 [InstCombine] optimize unsigned icmp of increment
Allows LLVM to optimize sequences like the following:

%add = add nuw i32 %x, 1
%cmp = icmp ugt i32 %add, %y

Into:

%cmp = icmp uge i32 %x, %y

Previously, only signed comparisons were being handled.

Decrements could also be handled, but 'sub nuw %x, 1' is currently canonicalized to
'add %x, -1' in InstCombineAddSub, losing the nuw flag. Removing that canonicalization
seems like it might have far-reaching ramifications so I kept this simple for now.

Patch by Matti Niemenmaa!

Differential Revision: https://reviews.llvm.org/D24700



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291975 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 23:25:46 +00:00
Tim Northover
b5ead7c450 [GlobalISel] track predecessor mapping during switch lowering.
Correctly populating Machine PHIs relies on knowing exactly how the IR level
CFG was lowered to MachineIR. This needs to be tracked by any translation
phases that meddle (currently only SwitchInst handling).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291973 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 23:11:37 +00:00
Sanjay Patel
534e635d1b [InstCombine] use m_APInt to allow lshr folds for vectors with splat constants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291972 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 23:04:10 +00:00
Sanjay Patel
e71a092ac9 [InstCombine / InstSimplify] add and move tests for lshr transforms; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291970 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 22:54:12 +00:00
Daniel Berlin
e782760da1 NewGVN: Move leaders around properly to ensure we have a canonical dominating leader. Fixes PR 31613.
Summary:
This is a testcase where phi node cycling happens, and because we do
not order the leaders by domination or anything similar, the leader
keeps changing.

Using std::set for the members is too expensive, and we actually don't
need them sorted all the time, only at leader changes.

We could keep both a set and a vector, and keep them mostly sorted and
resort as necessary, or use a set and a fibheap, but all of this seems
premature.

After running some statistics, we are able to avoid the vast majority
of sorting by keeping a "next leader" field.  Most congruence classes only have
leader changes once or twice during GVN.

Reviewers: davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D28594

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291968 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 22:40:01 +00:00
Greg Clayton
b24afca5be Add a variant of DWARFDie::find() and DWARFDie::findRecursively() that takes a llvm::ArrayRef<dwarf::Attribute>.
This allows us efficiently look for more than one attribute, something that is quite common in DWARF consumption.

Differential Revision: https://reviews.llvm.org/D28704



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291967 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 22:32:12 +00:00
David Majnemer
22eeda1bb9 [LoopStrengthReduce] Don't bother rewriting PHIs in catchswitch blocks
The catchswitch instruction cannot be split, don't bother trying to
rewrite it.

This fixes PR31627.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291966 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 22:24:27 +00:00
David Majnemer
3615e56501 [CodeGen] Simplify getRecipEstimateForFunc
It used two attribute lookups when only one was needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291965 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 22:24:25 +00:00
Greg Clayton
beabb639c5 Cleanup how DWARFDie attributes are accessed and decoded.
Removed all DWARFDie::getAttributeValueAs*() calls.
Renamed:
  Optional<DWARFFormValue> DWARFDie::getAttributeValue(dwarf::Attribute);
To:
  Optional<DWARFFormValue> DWARFDie::find(dwarf::Attribute);
Added:
  Optional<DWARFFormValue> DWARFDie::findRecursively(dwarf::Attribute);
  
All decoding of Optional<DWARFFormValue> values are now done using the dwarf::to*() functions from DWARFFormValue.h:

Old code:
  
  auto DeclLine = DWARFDie.getAttributeValueAsSignedConstant(DW_AT_decl_line).getValueOr(0);
  
New code:

  auto DeclLine = toUnsigned(DWARFDie.find(DW_AT_decl_line), 0);
  
This composition helps us since we can now easily do:

  auto DeclLine = toUnsigned(DWARFDie.findRecursively(DW_AT_decl_line), 0);
  
This allows us to easily find attribute values in the current DIE only (the first new code above) or in any DW_AT_abstract_origin or DW_AT_specification Dies using the line above. Note that the code line length is shorter and more concise.

Differential Revision: https://reviews.llvm.org/D28581



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291959 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 21:08:18 +00:00
David L. Jones
b9565c5ed6 "Use" lambda captures which are otherwise only used in asserts. NFC
Summary:
The LLVM coding standards recommend "using" values that are only
needed by asserts:
http://llvm.org/docs/CodingStandards.html#assert-liberally

Without this change, LLVM cannot bootstrap with -Werror as the second
stage fails with this new warning:
https://reviews.llvm.org/rL291905

See also the previous fixes:
https://reviews.llvm.org/rL291916
https://reviews.llvm.org/rL291939
https://reviews.llvm.org/rL291940
https://reviews.llvm.org/rL291941

Reviewers: rsmith

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D28695

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291957 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 21:02:41 +00:00
Artem Belevich
f53524b4f6 [NVPTX] Added support for half-precision floating point.
Only scalar half-precision operations are supported at the moment.

- Adds general support for 'half' type in NVPTX.
- fp16 math operations are supported on sm_53+ GPUs only
  (can be disabled with --nvptx-no-f16-math).
- Type conversions to/from fp16 are supported on all GPU variants.
- On GPU variants that do not have full fp16 support (or if it's disabled),
  fp16 operations are promoted to fp32 and results are converted back
  to fp16 for storage.

Differential Revision: https://reviews.llvm.org/D28540

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291956 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 20:56:17 +00:00
Konstantin Zhuravlyov
999a6572f3 [AMDGPU] Implement f16 fcopysign and fcopysign(f32, f64)
Differential Revision: https://reviews.llvm.org/D28496


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291954 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 19:49:25 +00:00
Rui Ueyama
47a876a72c Add a description how to checkout the LLD repository.
Differential Revision: https://reviews.llvm.org/D28687

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291948 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 19:27:18 +00:00
James Y Knight
f1ad5e7c9b Check for register clobbers when merging a vreg live range with a
reserved physreg in RegisterCoalescer.

Previously, we only checked for clobbers when merging into a READ of
the physreg, but not when merging from a WRITE to the physreg.

Differential Revision: https://reviews.llvm.org/D28527

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291942 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 19:08:36 +00:00
Sanjay Patel
955ddfa4df [InstCombine] use 'match' and other clean-up; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291937 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 18:52:10 +00:00
Artem Belevich
e41bb16926 [NVPTX] Only lower sin/cos to approximate instructions if unsafe math is allowed.
Previously we'd always lower @llvm.{sin,cos}.f32 to {sin.cos}.approx.f32
instruction even when unsafe FP math was not allowed.

Clang-generated IR is not affected by this as it uses precise sin/cos
from CUDA's libdevice when unsafe math is disabled.

Differential Revision: https://reviews.llvm.org/D28619

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291936 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 18:48:13 +00:00
Sanjay Patel
093d956dc6 [InstCombine] use m_APInt to allow shl folds for vectors with splat constants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291934 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 18:39:09 +00:00
Michael Liao
6def8b49e5 [SCEV] Limit recursion depth of constant evolving.
- For a loop body with VERY complicated exit condition evaluation, constant
  evolving may run out of stack on platforms such as Windows. Need to limit the
  recursion depth.

Differential Revision: https://reviews.llvm.org/D28629



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291927 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 18:28:30 +00:00
Sanjay Patel
19e50b839a [InstCombine] add tests to show missing transforms for vector shl; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291926 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 18:27:23 +00:00
Simon Pilgrim
8559375964 [X86][AVX] Bad v4f64/v4i64 '1z3z' shuffle test case
This lowers to SHUFPD if the input is zeroinitializer but not with a demanded elts optimized build vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291924 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 18:23:47 +00:00
Sanjay Patel
e7e4713429 [InstCombine] use Op0/Op1 local variables more consistently with shifts; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291923 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 18:08:25 +00:00
Simon Pilgrim
4170935630 Regenerate test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291920 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 17:44:28 +00:00
Ivan Krasin
eccbfd44dd Fix UBSan bots by blacklisting bits/stl_tree.h.
Summary:
libstdc++ has some undefined behavior in bits/stl_tree.h that
has recently became excercised by some of the LLVM code.
Given that fixing libstdc++ will take years, adding the file
into a blacklist to fix bots seems like a necessity.

Reviewers: vitalybuka

Subscribers: llvm-commits, mgorny

Differential Revision: https://reviews.llvm.org/D28686

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291918 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13 17:30:10 +00:00