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39946 Commits

Author SHA1 Message Date
Dan Gohman
2dd50e656f Delete fast-isel's trivial load optimization; it breaks debugging because 
it can look past points where a debugger might modify user variables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108336 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 17:25:37 +00:00
Bob Wilson
fed76ffa56 Add missing address register update to t2LDM_RET instruction. 
Patch by Brian Lucas. PR7636.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108332 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 16:02:13 +00:00
Duncan Sands
3dc7224379 Rather than using an ifdef on the target to zero out fields, 
just use memset to zero the entire struct.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108330 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 14:32:33 +00:00
Eli Friedman
54cc0e12da A couple potential optimizations inspired by comment 4 in PR6773. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108328 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 06:58:26 +00:00
Evan Cheng
dedd974e7e Fix for PR7193 was overly conservative. The only case where sibcall callee 
address cannot be allocated a register is in 32-bit mode where the first
three arguments are marked inreg. In that case EAX, EDX, and ECX will be
used for argument passing.

This fixes PR7610.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108327 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 06:44:01 +00:00
Bob Wilson
7e3f0d2690 Add support for NEON VMVN immediate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108324 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 06:31:50 +00:00
Bob Wilson
046afdb50b The bits in the cmode field of 32-bit VMOV immediate instructions all depend 
of the value of the immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108323 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 06:30:44 +00:00
Chris Lattner
07c9b64719 revert r108320, I see the failures now... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108322 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 06:16:35 +00:00
Chris Lattner
7e185af930 reapply benjamin's instcombine patch, I don't see anything wrong with it and can't repro any problems with a manual self-host. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108320 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 05:59:13 +00:00
Chris Lattner
b09a97e565 fix a bug found by a warning I added to clang this morning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108309 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 01:57:17 +00:00
Evan Cheng
db89809037 Teach ProcessImplicitDefs to transform more COPY instructions into IMPLICIT_DEF (and subsequently eliminate them). This allows machine LICM to hoist IMPLICIT_DEF's. PR7620. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108304 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 01:22:19 +00:00
Bob Wilson
9e82bf12a0 Add an ARM-specific DAG combining to avoid redundant VDUPLANE nodes. 
Radar 7373643.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108303 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 01:22:12 +00:00
Dan Gohman
a10b8494a5 Don't propagate debug locations to instructions for materializing 
constants, since they may not be emited near the other instructions
which get the same line, and this confuses debug info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108302 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 01:07:44 +00:00
Bruno Cardoso Lopes
7dbf7d8b1c Add AVX 256-bit compare instructions and a bunch of testcases 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108286 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 22:06:38 +00:00
Jakob Stoklund Olesen
d9f6ec977a Print VNInfo flags. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108277 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 21:19:05 +00:00
Bob Wilson
cba270d042 Use a target-specific VMOVIMM DAG node instead of BUILD_VECTOR to represent 
NEON VMOV-immediate instructions.  This simplifies some things.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108275 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 21:16:48 +00:00
Bruno Cardoso Lopes
87a85c7ef0 AVX 256-bit conversion instructions 
Add the x86 VEX_L form to handle special cases where VEX_L must be set.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108274 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 21:07:28 +00:00
Dale Johannesen
b5611a6230 In inline asm treat indirect 'X' constraint as 'm'. 
This may not be right in all cases, but it's better
than asserting which it was doing before.  PR 7528.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108268 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 20:17:05 +00:00
Kevin Enderby
52a18aedae Added a check that pusha cannot be encoded in 64-bit mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108265 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 20:05:41 +00:00
Jakob Stoklund Olesen
6382d2cadd Add an assertion to make PR7542 fail consistently. 
LiveInterval::overlapsFrom dereferences end() if it is called on an empty
interval.

It would be reasonable to just return false - an empty interval doesn't overlap
anything, but I want to know who is doing it first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108264 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 19:56:28 +00:00
Dan Gohman
9dc8ae110f Add support for empty named metadata too. This isn't particularly 
useful, but it is nice for consistency.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108262 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 19:42:44 +00:00
Jakob Stoklund Olesen
186eb73845 Fix LiveInterval::overlaps so it doesn't claim touching intervals overlap. 
Also, one binary search is enough.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108261 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 19:42:20 +00:00
Dan Gohman
ac80975ea4 Add support for empty metadata nodes: !{}. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108259 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 19:33:27 +00:00
Evan Cheng
218977b53e Extend the r107852 optimization which turns some fp compare to code sequence using only i32 operations. It now optimize some f64 compares when fp compare is exceptionally slow (e.g. cortex-a8). It also catches comparison against 0.0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108258 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 19:27:42 +00:00
Evan Cheng
7a41599962 Add an ARM "feature". Cortex-a8 fp comparison is very slow (> 20 cycles). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108256 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 19:21:50 +00:00
Evan Cheng
ea4cdb7ead -enable-unsafe-fp-math should not imply -enable-finite-only-fp-math. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108254 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 18:46:14 +00:00
Eric Christopher
f0193ed8de Grammar. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108252 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 18:27:13 +00:00
Duncan Sands
d0d3ccc827 Handle the case of a tail recursion in which the tail call is followed 
by a return that returns a constant, while elsewhere in the function
another return instruction returns a different constant.  This is a
special case of accumulator recursion, so just generalize the existing
logic a bit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108241 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 15:41:41 +00:00
Gabor Greif
63d024fc9a rotate CallInst operands 
with this commit the callee moves to the end of
the operand array (from the start) and the call
arguments now start at index 0 (formerly 1)

this ordering is now consistent with InvokeInst

this commit only flips the switch,
functionally it is equivalent to
r101465

I intend to commit several cleanups after a few
days of soak period



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108240 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 15:31:36 +00:00
Bob Wilson
6dce00ced4 Move NEON "modified immediate" encode/decode into ARMAddressingModes.h to 
avoid replicated code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108227 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 04:44:34 +00:00
Chris Lattner
37a746bc85 my work on adding segment registers to LEA missed the 
disassembler.  Remove some code from the disassembler to
compensate, unbreaking disassembly of lea's.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108226 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 04:23:55 +00:00
Bruno Cardoso Lopes
fd920fa59a Add AVX 256-bit packed logical forms 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108224 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 02:38:35 +00:00
Bruno Cardoso Lopes
6991623dd7 Add AVX 256-bit unop arithmetic instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108223 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 01:53:31 +00:00
Bruno Cardoso Lopes
4344d85769 Since AVX is a superset of all SSE versions, only use HasAVX for AVX instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108222 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 00:38:47 +00:00
Jakob Stoklund Olesen
9fac4159dd Don't add memory operands to storeRegToStackSlot / loadRegFromStackSlot results, 
they already have one.

This fixes the himenobmtxpa miscompilation on ARM.

The PostRA scheduler got confused by the double memoperand and hoisted a stack
slot load above a store to the same slot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108219 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 00:23:30 +00:00
David Greene
8f17bc4fbd Move some SIMD fragment code into X86InstrFragmentsSIMD so that the 
utility classes can be used from multiple files.  This will aid
transitioning to a new refactored x86 SIMD specification.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108213 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 23:41:28 +00:00
Bruno Cardoso Lopes
a0d09a85e2 Add AVX 256 binary arithmetic instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108207 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 23:04:15 +00:00
Bruno Cardoso Lopes
f428fee70d More refactoring of basic SSE arith instructions. Open room for 256-bit instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108204 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 22:41:32 +00:00
Daniel Dunbar
5146a0970d MC/AsmParser: Move ELF specific parser to ELFAsmParser.cpp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108196 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 21:23:32 +00:00
Daniel Dunbar
9c23d7f25e MC/AsmParser: Move Darwin specific parse to DarwinAsmParser.cpp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108193 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 20:51:51 +00:00
Dan Gohman
cfbf0ed8b0 Apply the SSE dependence idiom for SSE unary operations to 
SD instructions too, in addition to SS instructions. And
add a comment about it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108191 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 20:46:04 +00:00
Daniel Dunbar
4d5fe97c47 MC/AsmParser: Move .section parsing to Darwin specific parser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108190 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 20:42:34 +00:00
Daniel Dunbar
47f5608029 MC/AsmParser: Move special section directive parsing to Darwin specific parser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108187 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 20:23:36 +00:00
Bob Wilson
c7a797b82b Remove some code that doesn't appear to do anything. All the ARM call 
instructions already have implicit defs of LR.  The comment suggests that
this is intended to fix something like pr6111, but it doesn't really do
that either.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108186 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 20:22:45 +00:00
Daniel Dunbar
7a56fc224c MC/AsmParser: Add a basic ELFAsmParser extension. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108185 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 20:08:04 +00:00
Bruno Cardoso Lopes
aa099be71f Add AVX 256-bit MOVMSK forms 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108184 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 20:06:32 +00:00
Daniel Dunbar
4c7c08bfbf MC/AsmParser: Inline AsmParser::CreateSymbol into callers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108183 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 19:52:10 +00:00
Daniel Dunbar
b6c3a607ac MC/AsmParser: Move .tbss and .zerofill parsing to Darwin specific parser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108180 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 19:37:35 +00:00
Daniel Dunbar
492b7a21cb MC/AsmParser: Move .desc parsing to Darwin specific parser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108179 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 19:22:53 +00:00
Daniel Dunbar
38a4e2acb7 MC/AsmParser: Move .lsym parsing to Darwin specific parser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108176 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 19:08:25 +00:00