150622 Commits

Author SHA1 Message Date
Hiroshi Inoue
3ee2a16f0f [PowerPC] fix trivial typos in comment, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305813 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 17:53:33 +00:00
Simon Pilgrim
1313d75cd2 [CostModel][X86] Add scalar arithmetic cost tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305810 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 17:10:27 +00:00
Simon Pilgrim
7359f171d7 [CostModel][X86] Declare costs variables based on type
The alphabetical progression isn't that useful

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305808 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 17:04:46 +00:00
Craig Topper
b1618d24d3 [TableGen] Take a parameter by reference instead of pointer so we don't have to add & on both callers. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305807 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 16:34:37 +00:00
Craig Topper
c4a82c8d4b [TableGen] Use range based for loop. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305806 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 16:34:35 +00:00
Yuka Takahashi
bc5df29fed [GSoC] Flag value completion for clang
This is patch for GSoC project, bash-completion for clang.

To use this on bash, please run `source clang/utils/bash-autocomplete.sh`.
bash-autocomplete.sh is code for bash-completion.

In this patch, Options.td was mainly changed in order to add value class
in Options.inc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305805 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 16:31:31 +00:00
Sanjay Patel
aab686b3f7 [x86] enable CGP memcmp() expansion for 2/4/8 byte sizes
There are a couple of potential improvements as seen in the IR and asm:
1. We're unnecessarily extending to a larger type to compare values.
2. The codegen for (select cond, 1, -1) could avoid a cmov.
(or we could change the order of the compares, so we have a select with 0 operand)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305802 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 15:58:30 +00:00
Simon Pilgrim
85838270a5 [X86][SSE] Relax 0/-1 vector element insertion to work for any vector with >=16bit elements
Shuffle lowering/combining now does a good job for 256/512-bit vectors - we don't need to prevent this

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305801 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 15:19:02 +00:00
Tim Northover
f37b0dbf16 DAG: correctly legalize UMULO.
We were incorrectly sign extending into the high word (as you would for
SMULO) when legalizing UMULO in terms of a wider full multiplication.

Patch by James Duley.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305800 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 15:01:38 +00:00
Vassil Vassilev
46f62d55fa D33466: Make file non-executable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305795 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 14:20:48 +00:00
Sanjay Patel
031043b243 [InstCombine] fix code/test comments for r305792; NFC
These diffs were in the last version of the patch in D33342,
but I accidentally committed the previous rev. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305793 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 12:45:46 +00:00
Sanjay Patel
3e4188dc6c [InstCombine] try to canonicalize xor-of-icmps to and-of-icmps
We have a large portfolio of folds for and-of-icmps and or-of-icmps in InstSimplify and InstCombine, 
but hardly anything for xor-of-icmps. Rather than trying to rethink and translate all of those folds, 
we can use the truth table definition of xor:

X ^ Y --> (X | Y) & !(X & Y)

...to see if we can convert the xor to and/or and then use the existing folds.

http://rise4fun.com/Alive/J9v

Differential Revision: https://reviews.llvm.org/D33342


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305792 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 12:40:55 +00:00
Daniel Sanders
a4b49d696a [globalisel][tablegen] Add support for COPY_TO_REGCLASS.
Summary:
As part of this
* Emitted instructions now have named MachineInstr variables associated
  with them. This isn't particularly important yet but it's a small step
  towards multiple-insn emission.
* constrainSelectedInstRegOperands() is no longer hardcoded. It's now added
  as the ConstrainOperandsToDefinitionAction() action. COPY_TO_REGCLASS uses
  an alternate constraint mechanism ConstrainOperandToRegClassAction() which
  supports arbitrary constraints such as that defined by COPY_TO_REGCLASS.

Reviewers: ab, qcolombet, t.p.northover, rovka, kristof.beyls, aditya_nandakumar

Reviewed By: ab

Subscribers: javed.absar, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D33590



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305791 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 12:36:34 +00:00
Simon Pilgrim
35b14a7d5d Fix Wdocumentation warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305790 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 12:28:33 +00:00
Simon Pilgrim
9210abe4ea [X86][SSE] Dropped old INSERT_VECTOR_ELT lowering TODO
Target shuffle combining now supports the matching of INSERT_VECTOR_ELT/PINSRW/PINSRB for merging multiple insertions into shuffles/bitmasks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305788 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 10:33:34 +00:00
Simon Pilgrim
2bba203993 Fixed test name. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305787 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 10:24:06 +00:00
Igor Breger
bf052b5a08 [GlobalISel][X86] fix compilation error ( -Werror=unused-function )
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305786 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 09:40:57 +00:00
Haojian Wu
921867e7f1 [SelectionDAG] Fix an use-after-free issue introduced in r305775.
vector.back() will be invalidated when memory reallocation happens.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305785 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 09:29:43 +00:00
Igor Breger
515e735353 [GlobalISel][X86] Get correct RegClass for given RegBank.
Summary:
In some cases RegClass depends on target feature. Hight (16-31) vector registers exist only if AVX512f available.
Split from https://reviews.llvm.org/D33665

Reviewers: qcolombet, t.p.northover, zvi, guyblank

Reviewed By: t.p.northover, guyblank

Subscribers: guyblank, rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D33952

Conflicts:
	test/CodeGen/X86/GlobalISel/select-memop-scalar.mir

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305784 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 09:15:10 +00:00
Igor Breger
e193a7694c [GlobalISel] combine not symmetric merge/unmerge nodes.
Summary:
In some cases legalization ends up with not symmetric merge/unmerge nodes.
Transform it to merge/unmerge nodes.

Reviewers: t.p.northover, qcolombet, zvi

Reviewed By: t.p.northover

Subscribers: rovka, kristof.beyls, guyblank, llvm-commits

Differential Revision: https://reviews.llvm.org/D33626

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305783 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 08:54:17 +00:00
Max Kazantsev
e1bef1bc31 [SCEV][NFC] Fix a misleading description of AddOpsInlineThreshold
The description of this option was copy-pasted from another one and does not
correspond to reality.

Differential Revision: https://reviews.llvm.org/D34390


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305782 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 08:37:31 +00:00
Igor Breger
88c4c546d4 [GlobalISel][X86] add legalizer mir tests. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305781 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 08:30:48 +00:00
NAKAMURA Takumi
4e72ee424c WasmObjectWriter.cpp: Tweak a comment line. [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305777 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 07:21:19 +00:00
Alexandros Lamprineas
46e03a371d [ARM] Support constant pools in data when generating execute-only code.
Resubmission of r305387, which was reverted at r305390. The Address
Sanitizer caught a stack-use-after-scope of a Twine variable. This
is now fixed by passing the Twine directly as a function parameter.

The ARM backend asserts against constant pool lowering when it generates
execute-only code in order to prevent the generation of constant pools in
the text section. It appears that target independent optimizations might
generate DAG nodes that represent constant pools. By lowering such nodes
as global addresses we don't violate the semantics of execute-only code
and also it is guaranteed that execute-only behaves correct with the
position-independent addressing modes that support execute-only code.

Differential Revision: https://reviews.llvm.org/D33773

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305776 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 07:20:52 +00:00
Max Kazantsev
73b64dd42f [SelectionDAG] Get rid of recursion in CalcNodeSethiUllmanNumber
The recursive implementation of CalcNodeSethiUllmanNumber may
overflow stack on extremely long pred chains. This patch replaces it
with an equivalent iterative implementation.

Differential Revision: https://reviews.llvm.org/D33769


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305775 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 07:07:09 +00:00
Sam Clegg
5fc12bfe02 Fix unused function build error in lld
The lld-x86_64-darwin13 is failing with:
 error: unused function 'operator<<'

Wrap the declation in ifndef NDEBUG, which matches
what is done in MipsELFObjectWriter.cpp.

Differential Revision: https://reviews.llvm.org/D34384

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305771 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 05:05:10 +00:00
Sam Clegg
ad60de3233 [WebAssembly] Fix build failures introduced in r305769
This fixes two build failures that only occur in certain
configurations:
- error: unused function 'operator<<'
- error: control reaches end of non-void function

Differential Revision: https://reviews.llvm.org/D34382

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305770 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 04:47:58 +00:00
Sam Clegg
1e975c1249 [WebAssembly] Add support for weak symbols in the binary format
This also introduces the updated format for the
"linking" section which can represent extra
symbol information.  See:
https://github.com/WebAssembly/tool-conventions/pull/10

Differential Revision: https://reviews.llvm.org/D34019

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305769 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 04:04:59 +00:00
Nirav Dave
9c490091f2 [DAG] Simplify BaseIndexOffset. NFCI.
Remove tail calls and cleanup codeflow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305768 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 02:48:39 +00:00
Vedant Kumar
9f0d281d87 [Coverage] PR33517: Check for failure to load func records
With PR33517, it became apparent that symbol table creation can fail
when presented with malformed inputs. This patch makes that sort of
error detectable, so llvm-cov etc. can fail more gracefully.

Specifically, we now check that function records loaded from corrupted coverage
mapping data are rejected, e.g when the recorded function name is garbage.

Testing: check-{llvm,clang,profile}, some unit test updates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305767 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 02:05:35 +00:00
Vedant Kumar
b9454635c0 [ProfileData] PR33517: Check for failure of symtab creation
With PR33517, it became apparent that symbol table creation can fail
when presented with malformed inputs. This patch makes that sort of
error detectable, so llvm-cov etc. can fail more gracefully.

Specifically, we now check that function names within the symbol table
aren't empty.

Testing: check-{llvm,clang,profile}, some unit test updates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305765 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 01:38:56 +00:00
Pengxuan Zheng
a4bbfa963d [test-release.sh] Enable Polly by default
Reviewers: grosser, hans, zinob, bollu

Reviewed By: grosser, hans

Subscribers: tstellar, llvm-commits

Differential Revision: https://reviews.llvm.org/D34306

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305763 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 01:04:25 +00:00
Kevin Enderby
eaf57f3d1d The change to llvm-nm in r305733 added fields to the struct NMSymbol
that are not set on the main path.  This diff does a memset to 0 the structs
so this change is to hopefully fix the sanitizer-x86_64-linux-fast bot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305762 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 00:41:04 +00:00
Matt Arsenault
5a7b3305c5 AMDGPU: Fix scratch wave offset relative FI expansion
The offset may not be an inline immediate, so this needs
to be materialized into a register. The post-RA run of
SIShrinkInstructions is able to fold it later if it can.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305761 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-19 23:47:21 +00:00
Eugene Zelenko
b96297306a [ExecutionEngine] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305760 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-19 23:37:52 +00:00
Stanislav Mekhanoshin
7c44c2a308 [AMDGPU] Add infer address spaces pass before SROA
It adds it for the target after inlining but before SROA where
we can get most out of it.

Differential Revision: https://reviews.llvm.org/D34366

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305759 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-19 23:17:36 +00:00
Eugene Zelenko
810d1a08bd [Target] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305757 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-19 22:43:19 +00:00
Sanjoy Das
7ef9a64157 Fix machine instruction in test case
The AMD64rm instruction used in the test case was incorrect.  Since
the first input register to AND64rm is tied to output register, they
must be the same.

Thanks for Jesper Antonsson for pointing this out!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305756 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-19 22:35:48 +00:00
Eugene Zelenko
f1934002e0 [IR] Fix some Clang-tidy modernize-use-using warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305755 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-19 22:05:08 +00:00
Zachary Turner
4b199ee307 Mark LLVMTestingSupport as not installed in LLVMBuild.
This is causing downstream issues with llvm-config.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305754 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-19 22:01:50 +00:00
Zachary Turner
8d9cfad6aa Try to fix uninitialized read in unit test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305753 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-19 21:59:09 +00:00
Geoff Berry
c46faf029e [AArch64][Falkor] Fix MOVZ sched predicate to not assert on non-imm operands (e.g. blockaddress).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305752 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-19 21:57:44 +00:00
Geoff Berry
039e17bd76 [AArch64][Kryo] Add missing write latency for LDAXP, LDXP second destination.
Fixes PR33491 and PR33512.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305751 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-19 21:57:42 +00:00
Geoff Berry
26324dba40 [AArch64][Falkor] Refine load/store increment latencies.
Also fix LDXP & LDAXP write latency to avoid similar assert as PR33491 and PR33512.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305750 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-19 21:56:21 +00:00
Matt Arsenault
faad4a3755 Fix typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305749 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-19 21:54:25 +00:00
Matt Arsenault
b9cdbc013b AMDGPU: Cleanup CreateLiveInRegister
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305748 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-19 21:52:45 +00:00
Kevin Enderby
60eaf2356c Fix a FIXME in llvm-objdump for the -exports-trie option that was not adding
in the base address.

Without this Mach-O files, like 64-bit executables, don’t have the correct
addresses printed for their exports.  As the default is to link at address
0x100000000 not zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305744 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-19 21:23:07 +00:00
Peter Collingbourne
9a9e3b8289 Revert r305598, "utils: Add a git-r utility for mapping svn revisions to git revisions in the monorepo."
$ git revert `git r 305598`

We need to decide whether we want development tools to be written in
Go first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305741 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-19 20:43:09 +00:00
Xin Tong
b06e406fa7 [BDCE] Add comments. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305739 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-19 20:10:41 +00:00
Ana Pazos
264bdd8966 [PATCH] [PGO] Fixed cast operation in emIntrinsicVisitor::instrumentOneMemIntrinsic.
Reviewers: xur, efriedma, davidxl

Reviewed By: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34293

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305737 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-19 20:04:33 +00:00