139328 Commits

Author SHA1 Message Date
Mehdi Amini
7fe28f81db ThinLTO: handles modules with empty summaries
We need to add an entry in the combined-index for modules that have
a hash but otherwise empty summary, this is needed so that we can
get the hash for the module.

Also, if no entry is present in the combined index for a module, we
need to skip it when trying to compute a cache entry.

Differential Revision: https://reviews.llvm.org/D25300

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283654 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 04:44:18 +00:00
Mehdi Amini
7c9eed7e83 Requires the AVR backend for running test/CodeGen/AVR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283653 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 04:39:34 +00:00
Kyle Butt
473ebca2dd Revert "Codegen: Tail-duplicate during placement."
This reverts commit 71c312652c10f1855b28d06697c08d47e7a243e4.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283647 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 01:47:05 +00:00
Dylan McKay
97c245f629 [AVR] Add backend dependencies to MCTargetDesc/LLVMBuild.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283642 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 01:14:23 +00:00
Zachary Turner
2ce5ded6d2 [pdb] Dump Module Symbols to Yaml.
This is the first step towards round-tripping symbol information,
and thusly being able to write symbol information to a PDB.

This patch writes the symbol information for each compiland to
the Yaml when running in pdb2yaml mode.  There's still some loose
ends, such as what to do about relocations (necessary in order to
print linkage names), how to print enums with friendly names, and
how to give the dumper access to the StringTable, but this is a
good first start.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283641 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 01:12:01 +00:00
Dylan McKay
b57fbc72a0 Fix incorrect assertion in AVRFrameLowering.cpp
This wasn't looking at the right instruction, and would always fail.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283640 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 01:10:36 +00:00
Dylan McKay
8af8e34e66 [AVR] Don't worry about call frame size when initializing frame pointer
We previously only used the frame pointer if the frame pointer was too
big. This was to work around a bug (described in this old commit)

https://sourceforge.net/p/avr-llvm/code/204/tree//llvm/trunk/AVR/AVRFrameLowering.cpp?diff=50d64d912718465cb887d17a:203

I mistakenly invered the condition assuming it was a typo. I am now
removing it because it doesn't seem to be a problem anymore (plus it's a
dirty hack).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283639 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 01:10:31 +00:00
Dylan McKay
ca1844d7ca [AVR] Don't shadow container while iterating in range-based loop
This works on clang, but fails on GCC 4.6

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283638 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 01:09:06 +00:00
Dylan McKay
056a448d96 [AVR] Use references rather than pointers in AVRISelLowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283636 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 01:06:21 +00:00
Dylan McKay
942ffca25d Allow a maximum of 64 bits to be returned in registers
The rest spills to the stack

Authored by Jake Goulding

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283635 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 01:05:09 +00:00
Dylan McKay
2884d8d5ee [AVR] Expand MULHS for all types
Once MULHS was expanded, this exposed an issue where the condition
register was thought to be 16-bit. This caused an attempt to copy a
16-bit register to an 8-bit register.

Authored by Jake Goulding

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283634 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 01:01:49 +00:00
Dylan McKay
dc87e8eb52 [AVR] Add the 'SoftFail' field to all instruction formats
This will be used in the future for disassembly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283630 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 00:55:46 +00:00
Dylan McKay
db1d168abb [AVR] Set up the instruction printer and the assembly backend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283629 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 00:50:11 +00:00
Dylan McKay
713cee592e [AVR] Add dependencies to AVR libraries in AVRCodeGen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283628 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 00:45:24 +00:00
Dylan McKay
8d09276103 [AVR] Add missing subdirectories to LLVMBuild
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283627 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 00:42:58 +00:00
Hal Finkel
7b70b8ae64 [llvm-opt-report] Don't leave space for opts that never happen
Because screen space is precious, if an optimization (vectorization, for
example) never happens, don't leave empty space for the associated markers on
every line of the output. This makes the output much more compact, and allows
for the later inclusion of markers for more (although perhaps rare)
optimizations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283626 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 00:26:54 +00:00
Gor Nishanov
a1184492ba [coroutines] Store an address of destroy OR cleanup part in the coroutine frame.
Summary:
If heap allocation of a coroutine is elided, we need to make sure that we will update an address stored in the coroutine frame from f.destroy to f.cleanup.
Before this change, CoroSplit synthesized these stores after coro.begin:

```
    store void (%f.Frame*)* @f.resume, void (%f.Frame*)** %resume.addr
    store void (%f.Frame*)* @f.destroy, void (%f.Frame*)** %destroy.addr

```

In those cases where we did heap elision, but were not able to devirtualize all indirect calls, destroy call will attempt to "free" the coroutine frame stored on the stack. Oops.

Now we use select to put an appropriate coroutine subfunction in the destroy slot. As bellow:

```
    store void (%f.Frame*)* @f.resume, void (%f.Frame*)** %resume.addr
    %0 = select i1 %need.alloc, void (%f.Frame*)* @f.destroy, void (%f.Frame*)* @f.cleanup
    store void (%f.Frame*)* %0, void (%f.Frame*)** %destroy.addr
```

Reviewers: majnemer

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D25377

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283625 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 00:22:50 +00:00
Lang Hames
f267cd71cb [docs] Fix indentation bug in LangRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283624 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 00:20:42 +00:00
Dylan McKay
a663737f9d [AVR] Add the assembly printer
Summary: This adds the AVRAsmPrinter class.

Reviewers: arsenm, kparzysz

Subscribers: llvm-commits, wdng, beanz, japaric, mgorny

Differential Revision: https://reviews.llvm.org/D25271

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283623 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 00:02:36 +00:00
Tom Stellard
4e0ea1b72b AMDGPU/SI: Handle div_fmas hazard in GCNHazardRecognizer
Reviewers: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D25250

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283622 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 23:42:48 +00:00
Kyle Butt
71c312652c Codegen: Tail-duplicate during placement.
The tail duplication pass uses an assumed layout when making duplication
decisions. This is fine, but passes up duplication opportunities that
may arise when blocks are outlined. Because we want the updated CFG to
affect subsequent placement decisions, this change must occur during
placement.

In order to achieve this goal, TailDuplicationPass is split into a
utility class, TailDuplicator, and the pass itself. The pass delegates
nearly everything to the TailDuplicator object, except for looping over
the blocks in a function. This allows the same code to be used for tail
duplication in both places.

This change, in concert with outlining optional branches, allows
triangle shaped code to perform much better, esepecially when the
taken/untaken branches are correlated, as it creates a second spine when
the tests are small enough.

Issue from previous rollback fixed, and a new test was added for that
case as well. Issue was worklist/scheduling/taildup issue in layout.

Issue from 2nd rollback fixed, with 2 additional tests. Issue was
tail merging/loop info/tail-duplication causing issue with loops that share
a header block.

Differential revision: https://reviews.llvm.org/D18226

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283619 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 22:33:20 +00:00
Arnold Schwaighofer
c4f04d9726 swifterror: Don't compute swifterror vregs during instruction selection
The code used llvm basic block predecessors to decided where to insert phi
nodes. Instruction selection can and will liberally insert new machine basic
block predecessors. There is not a guaranteed one-to-one mapping from pred.
llvm basic blocks and machine basic blocks.

Therefore the current approach does not work as it assumes we can mark
predecessor machine basic block as needing a copy, and needs to know the set of
all predecessor machine basic blocks to decide when to insert phis.

Instead of computing the swifterror vregs as we select instructions, propagate
them at the end of instruction selection when the MBB CFG is complete.

When an instruction needs a swifterror vreg and we don't know the value yet,
generate a new vreg and remember this "upward exposed" use, and reconcile this
at the end of instruction selection.

This will only happen if the target supports promoting swifterror parameters to
registers and the swifterror attribute is used.

rdar://28300923

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283617 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 22:06:55 +00:00
Sanjay Patel
72ac867a92 [DAG] clean up foldSelectOfConstants(); NFCI
Rename variables, simplify logic. 
Not clear yet why we don't handle a target with ZeroOrNegativeOneBooleanContent too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283613 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 21:55:42 +00:00
Davide Italiano
6d57e1cce1 [InstCombine] Don't unpack arrays that are too large (part 2).
This is similar to r283599, but for store instructions.
Thanks to David for pointing out!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283612 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 21:53:09 +00:00
Zachary Turner
4be86fdee6 Add missing include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283610 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 21:40:06 +00:00
Zachary Turner
254b4d2617 Refactor Symbol visitor code.
Type visitor code had already been refactored previously to
decouple the visitor and the visitor callback interface.  This
was necessary for having the flexibility to visit in different
ways (for example, dumping to yaml, reading from yaml, dumping
to ScopedPrinter, etc).

This patch merely implements the same visitation pattern for
symbol records that has already been implemented for type records.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283609 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 21:34:46 +00:00
Hongbin Zheng
65f9ae178e [cmake] Treat polly as "in tree" if LLVM_EXTERNAL_POLLY_SOURCE_DIR is provided
Differential Revision: https://reviews.llvm.org/D25354

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283608 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 21:32:47 +00:00
Davide Italiano
b6ae30c083 [InstCombine] Don't unpack arrays that are too large
Differential Revision:  https://reviews.llvm.org/D25376

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283599 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 20:57:42 +00:00
Sanjay Patel
7e1f5027b3 [DAG] move fold (select C, 0, 1 -> xor C, 1) to a helper function; NFC
We're missing at least 3 other similar folds based on what we have in InstCombine. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283596 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 20:47:51 +00:00
Tom Stellard
b44dba3340 AMDGPU/SI: Add support for 8-byte relocations
Reviewers: arsenm, kzhuravl

Subscribers: wdng, nhaehnle, yaxunl, llvm-commits, tony-tye

Differential Revision: https://reviews.llvm.org/D25375

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283593 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 20:36:58 +00:00
Anna Thomas
e25a48dd36 [RS4GC] Strengthen coverage: add more tests
Summary: Add tests for cases where we have zero coverage in RS4GC.

Reviewers: sanjoy, reames

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25341

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283591 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 20:34:00 +00:00
Colin LeMahieu
3d9f32058b [Hexagon][NFC] Using documented instruction type name V4LDST instead of MEMOP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283582 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 19:11:28 +00:00
Mehdi Amini
c16b74e39e Recommit "Use StringRef in LTOModule implementation (NFC)""
This reverts commit r283456 and reapply r282997, with explicitly
zeroing the struct member to workaround a bug in MSVC2013 with
zero-initialization: https://connect.microsoft.com/VisualStudio/feedback/details/802160

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283581 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 19:05:14 +00:00
Davide Italiano
db0b3fa3a9 [LoopIdiomRecognize] Merge two if conditions into one. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283579 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 18:39:43 +00:00
Sanjay Patel
7a0dadb15b [InstCombine] fold select X, (ext X), C
If we're going to canonicalize IR towards select of constants, try harder to create those.
Also, don't lose the metadata.

This is actually 4 related transforms in one patch:
      // select X, (sext X), C --> select X, -1, C
      // select X, (zext X), C --> select X,  1, C
      // select X, C, (sext X) --> select X, C, 0
      // select X, C, (zext X) --> select X, C, 0

Differential Revision: https://reviews.llvm.org/D25126


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283575 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 17:53:07 +00:00
Adam Nemet
db695f404d New utility to visualize optimization records
This is a new tool built on top of the new YAML ouput generated from
optimization remarks.  It produces HTML for easy navigation and
visualization.

The tool assumes that hotness information for the remarks is available
(the YAML file was produced with PGO).  It uses hotness to list the
remarks prioritized by the hotness on the index page.  Clicking the
source location of the remark in the list takes you the source where the
remarks are rendedered inline in the source.

For now, the tool is meant as prototype.

It's written in Python.  It uses PyYAML to parse the input.

Differential Revision: https://reviews.llvm.org/D25348

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283571 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 17:06:34 +00:00
Tom Stellard
9aa8644318 AMDGPU/SI: Emit fixups for long branches
Reviewers: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, llvm-commits, tony-tye

Differential Revision: https://reviews.llvm.org/D25366

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283570 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 16:01:18 +00:00
Simon Pilgrim
8a6c2f92ba [X86][SSE] Reapplied: Add vector fcopysign combine tests
Now with better lowering and fix for PR30443

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283569 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 16:00:59 +00:00
Artem Tamazov
97a1f765a3 [AMDGPU][mc] Add support for buffer_load_dwordx3, buffer_store_dwordx3.
Partially fixes Bug 28232.
Lit tests added.

Differential Revision: https://reviews.llvm.org/D25367

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283567 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 15:53:16 +00:00
Dehao Chen
588a79510c Invoke add-discriminator at -g0 -fsample-profile
Summary: -fsample-profile needs discriminator, which will not be added if built with -g0. This patch makes sure the discriminator is added for sample-profile at -g0. A followup patch will be send out to update clang tests.

Reviewers: davidxl, dblaikie, echristo, dnovillo

Subscribers: mehdi_amini, probinson, llvm-commits

Differential Revision: https://reviews.llvm.org/D25132

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283565 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 15:21:31 +00:00
Matthew Simpson
cf5c0d7439 [LV] Don't mark multi-use branch conditions uniform
Previously, we marked the branch conditions of latch blocks uniform after
vectorization if they were instructions contained in the loop. However, if a
condition instruction has users other than the branch, it may not remain
uniform. This patch ensures the conditions we mark uniform are only used by the
branch. This should fix PR30627.

Reference: https://llvm.org/bugs/show_bug.cgi?id=30627

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283563 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 15:20:13 +00:00
Krzysztof Parzyszek
5cbeeedeaa Only track physical registers in LivePhysRegs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283561 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 14:50:49 +00:00
Sam Kolton
a7de0c7962 [AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
Reviewers: artem.tamazov, tstellarAMD

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D25084

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283560 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 14:46:06 +00:00
Simon Pilgrim
64cb9919ee [X86][SSE] Tidied up tests - use standard check prefixes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283559 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 14:42:22 +00:00
Konstantin Zhuravlyov
fbd12bbb90 [AMDGPU] AMDGPUCodeGenPrepare: remove extra ';'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283558 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 14:39:53 +00:00
Tom Stellard
8b2bb5de9a [ValueTracking] Fix crash in GetPointerBaseWithConstantOffset()
Summary:
While walking defs of pointer operands we were assuming that the pointer
size would remain constant.  This is not true, because addresspacecast
instructions may cast the pointer to an address space with a different
pointer width.

This partial reverts r282612, which was a more conservative solution
to this problem.

Reviewers: reames, sanjoy, apilipenko

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D24772

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283557 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 14:23:29 +00:00
Konstantin Zhuravlyov
2d50d3f3c9 [AMDGPU] Promote uniform (i1, i16] operations to i32
Differential Revision: https://reviews.llvm.org/D25302


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283555 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 14:22:58 +00:00
Benjamin Kramer
674bd2c304 Remove spurious non-printable character from source file.
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283552 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 13:46:38 +00:00
Javed Absar
e3eba57f7a [ARM]: add missing switch case for cortex-r52
Adds a missing switch case for handling cortex-r52
in init-subtarget-features.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283551 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 13:41:55 +00:00
Martin Storsjo
c3339a54ac [ARM] Reapply: Use __rt_div functions for divrem on Windows
Reapplying r283383 after revert in r283442. The additional fix
is a getting rid of a stray space in a function name, in the
refactoring part of the commit.

This avoids falling back to calling out to the GCC rem functions
(__moddi3, __umoddi3) when targeting Windows.

The __rt_div functions have flipped the two arguments compared
to the __aeabi_divmod functions. To match MSVC, we emit a
check for division by zero before actually calling the library
function (even if the library function itself also might do
the same check).

Not all calls to __rt_div functions for division are currently
merged with calls to the same function with the same parameters
for the remainder. This is more wasteful than a div + mls as before,
but avoids calls to __moddi3.

Differential Revision: https://reviews.llvm.org/D25332

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283550 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 13:28:53 +00:00