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Author SHA1 Message Date
Craig Topper
87efa54747 [AVX-512] Teach X86InstrInfo::getLargestLegalSuperClass to inflate to FR32X/FR64X if AVX512 is supported and VR128X/VR256X if VLX is supported. 
Had to update a stack folding test to clobber the other 16 registers since this now made them get used instead of spilling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277321 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-08-01 05:31:50 +00:00
Craig Topper
b9a7f22c90 [AVX512] Replace scalar fp arithmetic intrinsics with native IR in an AVX512 test. The intrinsics aren't lowered to AVX512 instructions. 
The intrinsics really should be removed and autoupgraded.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277320 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-08-01 04:29:16 +00:00
Craig Topper
e0f68ac00d [AVX-512] Use FR32X/FR64X/VR128X/VR256X register classes in addRegisterClass if AVX512(for FR32X/FR64) or VLX(for VR128X/VR256) is supported. This is a minimal requirement to be able to allocate all 32 registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277319 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-08-01 04:29:13 +00:00
Craig Topper
8b3212e29f [X86] Move mask register handling into the main switch of getLoadStoreRegOpcode. No functional change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277318 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-08-01 04:29:11 +00:00
Sean Silva
04c0c682a2 Revert r277313 and r277314. 
They seem to trigger an LSan failure:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/15140/steps/check-llvm%20asan/logs/stdio

Revert "Add the tests for r277313"

This reverts commit r277314.

Revert "CodeExtractor : Add ability to preserve profile data."

This reverts commit r277313.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277317 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-08-01 04:16:09 +00:00
Sean Silva
fa714f9672 Move this test to x86-specific directory. 
No bots have yelled yet, but this test references an x86 intrinsic.
Also, it invokes llc on x86 IR.

Fixup to r277315.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277316 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-08-01 03:22:05 +00:00
Sean Silva
980a4b4d40 Fix - CodeExtractor : Inherit Target Dependent Attributes from the parent function. 
When extracting a set of blocks make sure to inherit all of the target
dependent attributes to make sure that the function will be valid for
lowering. One example is the "target-features" attribute for x86, if the
extracted region has functionality that relies on a specific feature it
will fail to be lowered.
This also allows for extracted functions to be valid for inlining, at
least back into the parent function, as the target attributes are tested
when inlining for compatibility.

Patch by River Riddle!

Differential Revision: https://reviews.llvm.org/D22713

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277315 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-08-01 03:15:32 +00:00
Sean Silva
837f6c046b Add the tests for r277313 
Forgot to `git add` them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277314 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-08-01 03:04:34 +00:00
Sean Silva
0f7cbe185c CodeExtractor : Add ability to preserve profile data. 
Added ability to estimate the entry count of the extracted function and
the branch probabilities of the exit branches.

Patch by River Riddle!

Differential Revision: https://reviews.llvm.org/D22744

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277313 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-08-01 02:59:26 +00:00
Simon Pilgrim
91f112fcf1 [X86][SSE] Regenerate frem tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277311 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 21:59:23 +00:00
Simon Pilgrim
7059fcae65 [X86][SSE] Regenerate fpext tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277310 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 21:55:33 +00:00
Daniel Berlin
cdbca76b08 Fix the MemorySSA updating API to enable people to create memory accesses before removing old ones 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277309 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 21:08:20 +00:00
Daniel Berlin
9ee47fcd55 Comment fixes to MemorySSA.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277308 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 21:08:10 +00:00
Craig Topper
d29f9a0db2 [X86] Simplify code for determing GR or FR reg classes by querying for super classes instead of manually listing individual classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277306 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 20:20:08 +00:00
Craig Topper
4022678c7f [AVX512] Always use EVEX encodings for 128/256-bit move instructions in getLoadStoreRegOpcode if VLX is supported. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277305 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 20:20:05 +00:00
Craig Topper
f015e11376 [AVX512] Add VLX packed move instructions to the execution dependency fix pass and update tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277304 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 20:20:01 +00:00
Craig Topper
64e28736d1 [AVX512] Move FR32X/FR64X handling in getLoadStoreRegOpcode into the main switch. No functional change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277303 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 20:19:55 +00:00
Craig Topper
b08f1f36a7 [AVX512] Stop treating VR512 specially in getLoadStoreRegOpcode and use the regular switch which already tried to handle it, but was unreachable. This has the added benefit of enabling aligned loads/stores if the stack is aligned. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277302 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 20:19:53 +00:00
Craig Topper
7882ecba2d [AVX512] Add X86::VR512RegClassID to X86RegisterInfo::getLargestLegalSuperClass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277301 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 20:19:50 +00:00
Simon Pilgrim
bc139df3fe [X86] Improve 64-bit shifts on 32-bit targets (PR14593) 
As discussed on PR14593, this patch adds support for lowering to SHLD/SHRD from the patterns generated by DAGTypeLegalizer::ExpandShiftWithKnownAmountBit.

Differential Revision: https://reviews.llvm.org/D23000

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277299 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 19:50:45 +00:00
David Majnemer
081d3f18a8 [COFF] Expose iterators for ImportAddressTableRVA 
Patch by Bandzi Michal!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277298 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 19:40:02 +00:00
David Majnemer
e2fac43a5a [COFF] Remove a duplicate import_directory_table_entry definition 
We had import_directory_table_entry and
coff_import_directory_table_entry, remove one.  Also, factor out the
logic which determins if a descriptor is a terminator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277296 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 19:25:21 +00:00
David Majnemer
5494cee7ac [bugpoint] Add a -Os option 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277295 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 19:25:16 +00:00
Simon Pilgrim
ba6e43dfc0 [X86] Add tests for the lowering SHLD/SHRD from manual pattern similar to those generated by ExpandShiftWithKnownAmountBit 
Test for add(v,v) as well as shl(v,1)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277293 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 17:51:37 +00:00
Craig Topper
ed98854bb4 [AVX-512] Don't let ExeDependencyFix pass convert VPANDD/Q to VPANDPS/PD unless DQI instructions are supported. Same for ANDN, OR, and XOR. 
Thanks to Igor Breger for pointing out my mistake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277292 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 17:15:07 +00:00
Simon Pilgrim
0ffabf15e1 [X86] Add tests for the lowering SHLD/SHRD from manual patterns 
As discussed on D23000



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277291 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 17:11:49 +00:00
Amjad Aboud
67b0099873 Fixed "copy-paste" mistake from revision 255245. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277290 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 14:41:50 +00:00
Elena Demikhovsky
d71fdd1359 AVX-512: Removed AssertZext node before TRUNCATE 
Removed AssertZext node, which was inserted between X86ISD::SETCC and "truncate to i1".

Differential Revision: https://reviews.llvm.org/D22850



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277289 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 06:48:01 +00:00
Chandler Carruth
d9a7752daf [ADT] Add 'consume_front' and 'consume_back' methods to StringRef which 
are very handy when parsing text.

They are essentially a combination of startswith and a self-modifying
drop_front, or endswith and drop_back respectively.

Differential Revision: https://reviews.llvm.org/D22723

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277288 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-31 02:19:13 +00:00
Davide Italiano
48f202f23f [HexagonConstPropagation] Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277285 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 22:07:21 +00:00
Davide Italiano
b9766783ad [HexagonBitSimplify] Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277284 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 22:07:18 +00:00
Davide Italiano
f796352534 [ARMConstantIslandPass] Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277283 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 22:07:15 +00:00
Lang Hames
ab4a20c283 [Support] Add doxygen @code tags to example code in Error comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277282 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 21:34:04 +00:00
Simon Pilgrim
8a08e7b471 [SLPVectorizer][X86] Added vXi8/vXi16 sitofp/uitofp tests 
Dropped useless 2i32-2f32 test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277281 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 21:01:34 +00:00
Simon Pilgrim
3575d762d7 Strip trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277280 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 20:53:21 +00:00
Simon Pilgrim
ffbeb40500 [X86] Use peekThroughOneUseBitcasts helper function 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277279 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 20:51:26 +00:00
Simon Pilgrim
cf26c4f3e0 [X86][SSE] Regenerate vshift tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277278 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 20:28:02 +00:00
Simon Pilgrim
efee4ecd70 [SLPVectorizer][X86] Added SITOFP/UITOFP vectorization tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277275 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 18:43:30 +00:00
Simon Pilgrim
15bce78b4e [X86][AVX] Added signum example test functions from PR13248 
These are good examples of missed combine opportunities with zero/all bit vector compare results
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277274 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 16:29:19 +00:00
Simon Pilgrim
852791a004 [X86][X87] Add vector arithmetic tests for targets with sse disabled 
To make sure the X86_64 target isn't doing anything stupid



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277272 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 16:01:30 +00:00
Simon Pilgrim
7ee24bd8b6 [X86][SSE] Let 64-bit targets use the fast 2i32-2f32 UINT_TO_FP conversion as well as 32-bit 
The 2i32-2i64 legalization means that we can use the slightly quicker double bits + fptrunc approach for the same results



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277271 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 14:06:59 +00:00
Hubert Tong
b80ca8647e TrailingObjects::FixedSizeStorage constexpr fixes + tests 
Summary:
This change fixes issues with `LLVM_CONSTEXPR` functions and
`TrailingObjects::FixedSizeStorage`. In particular, some of the
functions marked `LLVM_CONSTEXPR` used by `FixedSizeStorage` were not
implemented such that they evaluate successfully as part of a constant
expression despite constant arguments.

This change also implements a more traditional template-meta path to
accommodate MSVC, and adds unit tests for `FixedSizeStorage`.

Drive-by fix: the access control for members of `TrailingObjectsImpl` is
tightened.

Reviewers: faisalv, rsmith, aaron.ballman

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D22668


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277270 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 14:01:00 +00:00
Hubert Tong
f84abb4f62 MathExtras.h: add LLVM_CONSTEXPR where simple 
Summary:
This change adds `LLVM_CONSTEXPR` to functions selected as follows:
- the body is already valid under C++11 for a `constexpr` function,
- the evaluation of the function, given constant arguments, will not
  fail during the evaluation of a constant expression, and
- the above properties are easily verifiable at a glance.

Note: the evaluation of the function cannot fail if the instantiation
triggers a static assertion failure.

Reviewers: faisalv, rsmith, aaron.ballman

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D22824


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277269 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 13:38:51 +00:00
Benjamin Kramer
90978a6b8f [Hexagon] Perform bit arithmetic on unsigned to avoid accidentally shifting negative values. 
Found by ubsan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277268 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 13:25:37 +00:00
Benjamin Kramer
4b6011ecbe Update modulemap for Msf -> MSF rename. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277267 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 12:05:17 +00:00
Benjamin Kramer
e4a63cb228 [X86] Fix lifetime of SMRange temporaries. 
Found by asan -fsanitize-address-use-after-scope.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277266 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 11:31:24 +00:00
Benjamin Kramer
7ed559c109 [AMDGPU] Fix lifetime of SmallVector temporaries. 
Found by asan -fsanitize-address-use-after-scope.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277265 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 11:31:16 +00:00
Matt Arsenault
4fd45ebabd AMDGPU: Fix shouldConvertConstantLoadToIntImm behavior 
This should really be true for any immediate, not just
inline ones.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277260 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 01:40:36 +00:00
Matt Arsenault
40d057e621 AMDGPU: Set s_setpc_b64 as a terminator 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277259 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 01:40:34 +00:00
Matt Arsenault
2ce8293945 AMDGPU: Remove unused pattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277258 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-30 01:40:30 +00:00