138207 Commits

Author SHA1 Message Date
Kostya Serebryany
a4826c1b99 [libFuzzer] start using trace-pc-guard as an alternative source of coverage
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281435 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 02:13:06 +00:00
Kostya Serebryany
8ea4234809 [sanitizer-coverage] add yet another flavour of coverage instrumentation: trace-pc-guard. The intent is to eventually replace all of {bool coverage, 8bit-counters, trace-pc} with just this one. LLVM part
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281431 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 01:39:35 +00:00
Akira Hatanaka
3cb3e3cdbc Address Pete's review comment and define OrigArg on its own line.
This is a follow-up to r281419.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281421 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 23:53:43 +00:00
Akira Hatanaka
90a2aecbed [ObjCARC] Traverse chain downwards to replace uses of argument passed to
ObjC library call with call return.

ARC contraction tries to replace uses of an argument passed to an
objective-c library call with the call return value. For example, in the
following IR, it replaces uses of argument %9 and uses of the values
discovered traversing the chain upwards (%7 and %8) with the call return
%10, if they are dominated by the call to @objc_autoreleaseReturnValue.
This transformation enables code-gen to tail-call the call to
@objc_autoreleaseReturnValue, which is necessary to enable auto release
return value optimization.

%7 = tail call i8* @objc_loadWeakRetained(i8** %6)
%8 = bitcast i8* %7 to %0*
%9 = bitcast %0* %8 to i8*
%10 = tail call i8* @objc_autoreleaseReturnValue(i8* %9)
ret %0* %8

Since r276727, llvm started removing redundant bitcasts and as a result
started feeding the following IR to ARC contraction:

%7 = tail call i8* @objc_loadWeakRetained(i8** %6)
%8 = bitcast i8* %7 to %0*
%9 = tail call i8* @objc_autoreleaseReturnValue(i8* %7)
ret %0* %8

ARC contraction no longer does the optimization described above since it
only traverses the chain upwards and fails to recognize that the
function return can be replaced by the call return. This commit changes
ARC contraction to traverse the chain downwards too and replace uses of
bitcasts with the call return.

rdar://problem/28011339

Differential Revision: https://reviews.llvm.org/D24523


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281419 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 23:43:11 +00:00
Vedant Kumar
e7f7e18127 [llvm-cov] Just emit the version number in the index file
Having the version information in every view is distracting, especially
if there are several sub-views.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281414 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 23:00:13 +00:00
Ahmed Bougacha
d78e4210b3 [AArch64] Simplify patchpoint/stackmap size test (r281301). NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281407 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 22:16:40 +00:00
Pawel Bylica
c3d0d3568a [CodeGen] Fix invalid shift in mul expansion
Summary: When expanding mul in type legalization make sure the type for shift amount can actually fit the value. This fixes PR30354 https://llvm.org/bugs/show_bug.cgi?id=30354.

Reviewers: hfinkel, majnemer, RKSimon

Subscribers: RKSimon, llvm-commits

Differential Revision: https://reviews.llvm.org/D24478

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281403 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 21:55:41 +00:00
Michael Kuperstein
3389341950 [DAG] Allow build-to-shuffle combine to combine builds from two wide vectors.
This allows us to, in some cases, create a vector_shuffle out of a build_vector, when
the inputs to the build are extract_elements from two different vectors, at least one
of which is wider than the output. (E.g. a <8 x i16> being constructed out of
elements from a <16 x i16> and a <8 x i16>).

Differential Revision: https://reviews.llvm.org/D24491


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281402 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 21:53:32 +00:00
Kevin Enderby
7402add75d Next set of additional error checks for invalid Mach-O files for bad load commands
that use the Mach::dyld_info_command type for the load commands that are
currently use in the MachOObjectFile constructor.

This contains the missing checks for LC_DYLD_INFO and
LC_DYLD_INFO_ONLY load commands and the fields for the
Mach::dyld_info_command type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281400 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 21:42:28 +00:00
Krzysztof Parzyszek
60fc58a44d [Hexagon] Better handling of HVX vector lowering
- Expand SELECT_CC and BR_CC for vector types.
- Implement TLI::isShuffleMaskLegal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281397 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 21:16:07 +00:00
Sanjay Patel
9f45ab58fc add tests for PR28672
I'm not sure if we actually want to transform all of these in InstCombine yet, 
so I'm not labeling these with FIXME.  


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281386 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 20:36:13 +00:00
Matt Arsenault
9e6badc7e1 Reapply "InstCombine: Reduce trunc (shl x, K) width."
This reapplies r272987 with a fix for infinitely looping
when the truncated value is another shift of a constant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281379 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 19:43:57 +00:00
Matthias Braun
f461e09200 AArch64: Cleanup tailcall CC check, enable swiftcc.
Cleanup/change the code that checks for possible tailcall conventions to
look the same as the one in the X86 target. This makes the distinction
between calling conventions that can guarnatee tailcalls and the ones
that may tailcall more obvious.

- Add Swift to the mayTailCall list
- PreserveMost seemed to be incorrectly part of the guarnteed tail call
  list, move it to the mayTailCall list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281376 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 19:27:38 +00:00
Matt Arsenault
1defb8fb49 AMDGPU: Remove code I think is dead
As far as I can tell, resolveFrameIndex is supposed to be
called with a legal offset, so inserting an add shouldn't be
necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281372 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 19:15:25 +00:00
Mike Aizatsky
a3d7c710d2 .clang-tidy: correct style name is 'camelBack' not 'lowerCase'.
Summary: clang-tidy doesn't like to complain.

Differential Revision: https://reviews.llvm.org/D24413

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281370 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 19:04:26 +00:00
Matt Arsenault
ec4f2a0c81 AMDGPU: Support commuting a FrameIndex operand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281369 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 19:03:12 +00:00
Matthew Simpson
470b8e4d54 [LV] Clean up uniform induction variable analysis (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281368 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 19:01:45 +00:00
Davide Italiano
9330005ad6 [LTO] Don't pass SF_Undefined symbols to the IRmover.
This should fix PR 30363.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281366 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 18:45:13 +00:00
Reid Kleckner
f5f2db2791 Fix MSVC 2013 build by using our <thread> wrapper header
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281365 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 18:40:04 +00:00
Simon Pilgrim
8288ccf5dc [DAGCombiner] Use APInt directly in (shl (zext (srl x, C)), C) combine range test
To avoid assertion, we must ensure that the inner shift constant is within range before calling ConstantSDNode::getZExtValue(). We already know that the outer shift constant is in range.

Followup to D23007

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281362 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 18:33:29 +00:00
Nico Weber
9a0a97cb90 Revert r281336 (and r281337), it caused PR30372.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281361 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 18:17:00 +00:00
Douglas Katzman
e353f57fa4 [Myriad]: set LeonCASA processor feature
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281359 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 17:51:41 +00:00
Simon Pilgrim
76b613fc08 [X86][SSE] Added AVX512F and additional vector truncate test cases
trunc16i16_16i8 is currently commented out due to PR25684

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281356 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 17:34:56 +00:00
Simon Pilgrim
45e3537596 [DAGCombiner] Use APInt directly in (shl (ext (shl x, c1)), c2) combine
Fix failure to detect out of range shift constants leading to assert in ConstantSDNode::getZExtValue()

Followup to D23007

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281354 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 17:15:28 +00:00
Matt Arsenault
21409dbcdc Fix misleading comment for getOrEnforceKnownAlignment
It does not return 0 to indicate failure, and returns the known
alignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281350 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 16:39:43 +00:00
Andrea Di Biagio
d9dffbdd6a [ConstantFold] Improve the bitcast folding logic for constant vectors.
The constant folder didn't know how to always fold bitcasts of constant integer
vectors. In particular, it was unable to handle the case where a constant vector
had some undef elements, and the resulting (i.e. bitcasted) vector type had more
elements than the original vector type.

Example:
  %cast = bitcast <2 x i64><i64 undef, i64 2> to <4 x i32>

On a little endian target, %cast could have been folded to:
  <4 x i32><i32 undef, i32 undef, i32 2, i32 0>

This patch improves the folding logic by teaching how to correctly propagate
undef elements in the folded vector.

Differential Revision: https://reviews.llvm.org/D24301


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281343 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 14:50:47 +00:00
Simon Pilgrim
7724253460 [X86] Regenerated shift combine tests.
Added x86_64 tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281341 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 14:41:39 +00:00
Vassil Vassilev
befcbd18bd [modules] Re-enable some previously excluded files.
Our modules support seems to be able to handle them nowadays.

Patch by Cristina Cristescu!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281340 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 14:41:35 +00:00
Krzysztof Parzyszek
70a4ffa2a1 [Hexagon] Clear the flow queue after visiting a single instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281339 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 14:36:55 +00:00
Nirav Dave
09d676e698 Apply Clang-format to MCAsmParser.cpp NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281337 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 13:57:16 +00:00
Nirav Dave
be08d6e6a3 Defer asm errors to post-statement failure
Recommitting after fixing AsmParser Initialization.

Allow errors to be deferred and emitted as part of clean up to simplify
and shorten Assembly parser code. This will allow error messages to be
emitted in helper functions and be modified by the caller which has
better context.

As part of this many minor cleanups to the Parser:

* Unify parser cleanup on error
* Add Workaround for incorrect return values in ParseDirective instances
* Tighten checks on error-signifying return values for parser functions
  and fix in-tree TargetParsers to be more consistent with the changes.
* Fix AArch64 test cases checking for spurious error messages that are
  now fixed.

These changes should be backwards compatible with current Target Parsers
so long as the error status are correctly returned in appropriate
functions.

Reviewers: rnk, majnemer

Subscribers: aemerson, jyknight, llvm-commits

Differential Revision: https://reviews.llvm.org/D24047

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281336 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 13:55:06 +00:00
Chad Rosier
f565d64c70 [LoopInterchange] Minor refactor. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281334 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 13:30:30 +00:00
Andrea Di Biagio
93627d9415 [InstSimplify] Add tests to show missed bitcast folding opportunities.
InstSimplify doesn't always know how to fold a bitcast of a constant vector.
In particular, the logic in InstSimplify doesn't know how to handle the case
where the constant vector in input contains some undef elements, and the
number of elements is smaller than the number of elements of the bitcast
vector type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281332 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 13:17:42 +00:00
Chad Rosier
c732159461 Don't use else if after return. Tidy comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281331 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 13:08:53 +00:00
Chad Rosier
78490522e3 Typo. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281330 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 13:00:29 +00:00
Chad Rosier
bcfa2b15ee [LoopInterchange] Tidy up and remove unnecessary dyn_casts. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281328 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 12:56:04 +00:00
James Molloy
283b1c0454 Revert "[ARM] Promote small global constants to constant pools"
This reverts commit r281314. Speculatively revert as it's possible this caused linker errors: http://lab.llvm.org:8011/builders/clang-native-arm-lnt/builds/19656

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281327 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 12:45:51 +00:00
Sam Parker
d2d2efe826 Remove InstCombine test file
My previous commit should of removed a test file but I missed it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281326 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 12:33:06 +00:00
Pablo Barrio
c8b398cd6b [ARM] Add ".code 32" to functions in the ARM instruction set
Before, only Thumb functions were marked as ".code 16". These
".code x" directives are effective until the next directive of its
kind is encountered. Therefore, in code with interleaved ARM and
Thumb functions, it was possible to declare a function as ARM and
end up with a Thumb function after assembly. A test has been added.

An existing test has also been fixed to take this change into
account.

Reviewers: aschwaighofer, t.p.northover, jmolloy, rengolin

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: https://reviews.llvm.org/D24337

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281324 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 12:18:15 +00:00
James Molloy
e81b6f3153 [Thumb] Teach ISel how to lower compares of AND bitmasks efficiently
For the common pattern (CMPZ (AND x, #bitmask), #0), we can do some more efficient instruction selection if the bitmask is one consecutive sequence of set bits (32 - clz(bm) - ctz(bm) == popcount(bm)).

1) If the bitmask touches the LSB, then we can remove all the upper bits and set the flags by doing one LSLS.
2) If the bitmask touches the MSB, then we can remove all the lower bits and set the flags with one LSRS.
3) If the bitmask has popcount == 1 (only one set bit), we can shift that bit into the sign bit with one LSLS and change the condition query from NE/EQ to MI/PL (we could also implement this by shifting into the carry bit and branching on BCC/BCS).
4) Otherwise, we can emit a sequence of LSLS+LSRS to remove the upper and lower zero bits of the mask.

1-3 require only one 16-bit instruction and can elide the CMP. 4 requires two 16-bit instructions but can elide the CMP and doesn't require materializing a complex immediate, so is also a win.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281323 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 12:12:32 +00:00
Sam Parker
7d764370b0 Enable simplify libcalls for ARM PCS
Teach SimplifyLibcalls that in can treat functions annotated with
apcs, aapcs or aapcs_vfp like normal C functions if they only take
and return integer or pointer values, and the target is not iOS.

Differential Revision: https://reviews.llvm.org/D24453


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281322 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 12:10:14 +00:00
Ying Yi
503f4620ba [llvm-cov] - Included footer "Generated by llvm-cov -- llvm version <version number>" in the coverage report.
The llvm-cov version information will be useful to the user when comparing the code coverage across different versions of llvm-cov. This patch provides the llvm-cov version information in the generated coverage report.

Differential Revision: https://reviews.llvm.org/D24457

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281321 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 11:28:31 +00:00
Peter Smith
d0c0b622fc [ARM] Support ldr.w in pseudo instruction ldr rd,=immediate
The changes made in r269352, r269353 and r269354 to support the 
transformation of the ldr rd,=immediate to mov introduced a regression
from 3.8 (ldr.w rd, =immediate) not supported.

This change puts support back in for ldr.w by means of a t2InstAlias for
the .w form. The .w is ignored in ARM state and propagated to the ldr in
Thumb2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281319 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 11:15:51 +00:00
James Molloy
2e1f8100c5 [ARM] Promote small global constants to constant pools
If a constant is unamed_addr and is only used within one function, we can save
on the code size and runtime cost of an indirection by changing the global's storage
to inside the constant pool. For example, instead of:

      ldr r0, .CPI0
      bl printf
      bx lr
    .CPI0: &format_string
    format_string: .asciz "hello, world!\n"

We can emit:

      adr r0, .CPI0
      bl printf
      bx lr
    .CPI0: .asciz "hello, world!\n"

This can cause significant code size savings when many small strings are used in one
function (4 bytes per string).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281314 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 10:28:11 +00:00
Eric Liu
ea8e2d383d [WebAssembly] Trying to fix broken tests in CodeGen/WebAssembly caused by r281285.
Reviewers: bkramer, ddcc, dschuff, sunfish

Subscribers: jfb, llvm-commits, dschuff

Differential Revision: https://reviews.llvm.org/D24497

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281312 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 10:05:44 +00:00
Ayman Musa
7dc5b7e72a Remove MVT:i1 xor instruction before SELECT. (Performance improvement).
Differential Revision: https://reviews.llvm.org/D23764


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281308 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 09:12:45 +00:00
Sjoerd Meijer
48f6957bd7 Revert of r281304 as it is causing build bot failures in hexagon
hwloop regression tests. These tests pass locally; will be investigating
where these differences come from.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281306 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 08:51:59 +00:00
Sjoerd Meijer
0298251f19 This adds a new field isAdd to MCInstrDesc. The ARM and Hexagon instruction
descriptions now tag add instructions, and the Hexagon backend is using this to
identify loop induction statements.

Patch by Sam Parker and Sjoerd Meijer.

Differential Revision: https://reviews.llvm.org/D23601


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281304 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 08:08:06 +00:00
Elena Demikhovsky
9cb541b51a AVX-512: Fix for PR28175 - Scalar code optimization.
Optimized (truncate (assertzext x) to i1) and anyext i1 to i8/16/32.
Optimization of this patterns is a one more step towards i1 optimization on AVX-512.

Differential Revision: https://reviews.llvm.org/D24456



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281302 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 07:57:00 +00:00
Diana Picus
8da7897bb9 [AArch64] Support stackmap/patchpoint in getInstSizeInBytes
We currently return 4 for stackmaps and patchpoints, which is very optimistic
and can in rare cases cause the branch relaxation pass to fail to relax certain
branches.

This patch causes getInstSizeInBytes to return a pessimistic estimate of the
size as the number of bytes requested in the stackmap/patchpoint. In the future,
we could provide a more accurate estimate by sharing some of the logic in
AArch64::LowerSTACKMAP/PATCHPOINT.

Fixes part of https://llvm.org/bugs/show_bug.cgi?id=28750

Differential Revision: https://reviews.llvm.org/D24073

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281301 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 07:45:17 +00:00