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Commit Graph

4931 Commits

Author SHA1 Message Date
Chris Lattner
b04c5c8eb2 add support for integer extloads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24840 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 23:18:37 +00:00
Chris Lattner
20ad53ffd7 Add support for undef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24839 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 23:10:57 +00:00
Chris Lattner
311f8c21d0 Add support for calls to external symbols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24838 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 23:07:11 +00:00
Chris Lattner
e90ac3a3e7 we have no memcpy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24837 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 23:00:27 +00:00
Chris Lattner
b4d899e21c Fix a crash on a call with no arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24836 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 22:57:47 +00:00
Chris Lattner
cf198eca97 This is handled by the autogen'd code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24834 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 21:06:11 +00:00
Chris Lattner
dab05f0e19 Change return lowering so that we can autogen the matching code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24832 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 21:03:04 +00:00
Chris Lattner
2db3ff66f1 Implement Calls for V8. This would be completely autogenerated except for
a small bug in tblgen.  When that is fixed, we can remove the ISD::Call case
in Select.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24830 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 15:55:15 +00:00
Chris Lattner
384e5efc0e Implement the full V8 ABI for incoming arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24825 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 13:33:06 +00:00
Chris Lattner
eee99bd459 Push ops list, asm string, and pattern all the way up to InstV8. Move the
InstV8 class to the InstrFormats file where it belongs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24824 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 08:21:00 +00:00
Chris Lattner
3308449afc Give V8 select_cc, in the spirit of the PPC backend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24823 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 08:13:54 +00:00
Chris Lattner
98f853698c remove some unused instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24822 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 07:15:17 +00:00
Chris Lattner
065c896b7a V8 doesn't have FP extload
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24821 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 07:13:32 +00:00
Chris Lattner
d5aae05281 simplifications, fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24820 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 07:09:06 +00:00
Chris Lattner
737f631532 add a node, for completeness
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24819 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 07:05:21 +00:00
Chris Lattner
8fa54dc702 Add frameindex support
Add support for copying (e.g. returning) doubles
Add support for F<->I instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24818 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 06:59:57 +00:00
Chris Lattner
abfc2a7363 Tighten up some checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24817 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 06:40:34 +00:00
Nate Begeman
6aa45292c6 Since extload can also be used by FP, split STDIntExtLoad into two parts,
one for use with extload, one for use with sextload and zextload, which
are integer only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24814 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 02:48:48 +00:00
Chris Lattner
76acc872b3 Add constant pool support, including folding into addresses.
Pretty print addresses a bit, to not print [%r1+%g0]: just print [%r1]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24813 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 02:37:35 +00:00
Chris Lattner
e1389ad43a Teach the addressing mode stuff to fold "%lo" into 'ri' addressing modes,
allowing us to compile this:

to this:

%G1 = external global int
%G2 = external global int
void %test() {
        %X = load int* %G1
        store int %X, int* %G2
        ret void
}

test:
        save -96, %sp, %sp
        sethi %hi(G1), %l0
        ld [%l0+%lo(G1)], %l0
        sethi %hi(G2), %l1
        st %l0, [%l1+%lo(G2)]
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

test:
        save -96, %sp, %sp
        sethi %hi(G1), %l0
        or %g0, %lo(G1), %l1
        ld [%l1+%l0], %l0
        sethi %hi(G2), %l1
        or %g0, %lo(G2), %l2
        st %l0, [%l2+%l1]
        restore %g0, %g0, %g0
        retl
        nop


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24812 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 02:27:00 +00:00
Chris Lattner
e357246c6b Add initial support for global variables, and fix a bug in addr mode selection
where we didn't select the operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24811 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 02:10:39 +00:00
Chris Lattner
04dd673aea Claiming that branch targets are registers is not very wholesome. Change them
to be basic blocks.  Also, add uncond branches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24810 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 01:46:58 +00:00
Chris Lattner
456b9400dc Add unordered comparisons
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24809 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 01:41:39 +00:00
Chris Lattner
5b2dfc7cc1 Add patterns to the rest of the int condbranches and some of the fp branches
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24808 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 01:38:19 +00:00
Chris Lattner
4d55aca87a Add initial conditional branch support. This doesn't actually work yet due
to a bug in the scheduler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24807 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 01:20:35 +00:00
Chris Lattner
38abcb500f Eliminate CMPri, which is a synonym for SUBCCri
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24805 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:52:08 +00:00
Chris Lattner
294974bd57 add fneg,fabs,fsqrt instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24803 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:20:27 +00:00
Chris Lattner
b4d5172af9 Add patterns for fround/fextend and the funny fsmuld instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24802 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:14:30 +00:00
Chris Lattner
10c6aed73c Add FP +,-,*,/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24801 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:10:46 +00:00
Chris Lattner
558bfe0cf5 Give patterns to F3_3 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24800 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:05:35 +00:00
Chris Lattner
d19fc65345 Implement 64-bit add/sub, make sure to receive and return 64-bit args with
the right halves in the right regs


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24799 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 22:55:57 +00:00
Chris Lattner
7087e57872 implement div and rem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24798 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 22:39:19 +00:00
Chris Lattner
ee3d5fba54 implement MULHU/MULHS for 64-bit multiplies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24797 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 22:30:00 +00:00
Chris Lattner
37949f5c2b Add patterns for multiply, simplify Y register handling stuff, add RDY instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24796 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 22:22:53 +00:00
Chris Lattner
9034b883a4 Make the addressing modes smarter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24795 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 21:25:27 +00:00
Chris Lattner
87a63f812c remove some unused instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24794 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 21:13:50 +00:00
Chris Lattner
2cfdbb2716 add andn/orn/xorn patterns. This allows us to compile this:
long %test(ubyte, short, long %X, long %Y) {
  %A = xor long %X, -1
  %B = and long %Y, %A
  ret long %B
}

to this:

test:
        save -96, %sp, %sp
        andn %i4, %i2, %i0
        andn %i5, %i3, %i1
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

test:
        save -96, %sp, %sp
        xor %i2, -1, %l0
        xor %i3, -1, %l1
        and %i4, %l0, %i0
        and %i5, %l1, %i1
        restore %g0, %g0, %g0
        retl
        nop

The simpleisel emits:  :(

test:
        save -96, %sp, %sp
        or %g0, -1, %l0
        or %g0, -1, %l0
        or %g0, -1, %l0
        or %g0, -1, %l1
        xor %i2, %l0, %l0
        xor %i3, %l1, %l1
        and %i4, %l0, %i0
        and %i5, %l1, %i1
        restore %g0, %g0, %g0
        retl
        nop


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24793 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 21:05:49 +00:00
Chris Lattner
217aabf89e Add support for 64-bit arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24792 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:59:06 +00:00
Chris Lattner
9a60ff654a Sparc doesn't have sext_inreg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24791 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:50:42 +00:00
Chris Lattner
53ec2035eb add patterns for FP stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24790 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:47:16 +00:00
Chris Lattner
d55e1ca5ef Add [reg+reg] integer stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24789 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:44:36 +00:00
Chris Lattner
d30a630636 Add store patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24788 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:42:55 +00:00
Chris Lattner
0b218434cc add truncstore
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24787 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:42:29 +00:00
Chris Lattner
b575baf57d add fp load patterns, switch rest of loads and stores to use addrmodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24786 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:32:47 +00:00
Chris Lattner
1963783fab Add integer load[r+r] forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24785 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:26:45 +00:00
Chris Lattner
331355cf7d Rename load/store instructions to include an RI suffix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24784 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:18:49 +00:00
Chris Lattner
84e2abf116 Add patterns for the rest of the loads. Add 'ri' suffixes to the load and store insts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24783 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:18:24 +00:00
Chris Lattner
bc83fd9672 Add basic addressing mode support and one load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24782 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:04:49 +00:00
Chris Lattner
4543251834 eliminate some redundancy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24781 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 19:47:05 +00:00
Chris Lattner
b71f9f8488 Use a combination of sethi and or to build arbitrary immediates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24780 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 19:41:43 +00:00
Chris Lattner
57dd3bc460 Use sethi to build large immediates with zeros at the bottom
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24779 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 19:37:00 +00:00
Chris Lattner
d2cd46676c Add shift and small immediate support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24778 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 19:07:57 +00:00
Chris Lattner
f83cee6ac1 Add some basic reg-reg instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24777 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 18:53:33 +00:00
Chris Lattner
e33a3ff942 Add empty patterns to all F3_1 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24776 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 18:49:14 +00:00
Evan Cheng
bdce7b4090 Darwin API issue: indirect load of external and weak symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24775 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 09:13:43 +00:00
Chris Lattner
7b0902dcf8 Add some simple integer patterns. This allows us to compile this:
int %test(int %A) {
  %B = add int %A, 1
  %C = xor int %B, 123
  ret int %C
}

into this:

test:
        save -96, %sp, %sp
        add %i0, 1, %l0
        xor %l0, 123, %i0
        restore %g0, %g0, %g0
        retl
        nop

for example.  I guess it would make sense to add reg/reg versions too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24774 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 08:26:38 +00:00
Chris Lattner
4b4863188f Implement ret with operand, giving us this:
int %test(int %A) {
  ret int %A
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24773 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 08:15:09 +00:00
Chris Lattner
bc3d362d5b Add a pattern for 'ret'. This now compiles:
void %test() { ret void }

:)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24772 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 08:08:42 +00:00
Chris Lattner
f3bf50d2c8 Add empty patterns for F3_2 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24771 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 08:06:43 +00:00
Chris Lattner
a01b75758c Implement LowerArguments, at least for the first 6 integer args
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24770 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 08:03:24 +00:00
Chris Lattner
6c18b10ad4 Add the framework for a dag-dag isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24769 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 07:47:01 +00:00
Evan Cheng
433dbdaa63 Remove a few lines of dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24768 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 07:18:44 +00:00
Chris Lattner
576e46fc67 asmprinter done, added crucial missing step
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24767 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 07:17:59 +00:00
Chris Lattner
967abf37c5 Use the AsmPrinter for global variable init printing. This eliminates a
bunch of code and causes V8 to start using the fancy .asciz directive that
the sun assembler supports.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24766 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 07:17:08 +00:00
Chris Lattner
b5e9eb6089 Switch constant pool printing over to use the Shared AsmPrinter version
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24765 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 07:11:43 +00:00
Chris Lattner
1dbed16fec Use the shared AsmPrinter code for some basic stuff. No functionality
change except for fewer .section directives emitted


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24764 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 07:04:29 +00:00
Evan Cheng
98abbfb2ef Added an idea about any_extend for performance tuning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24763 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 06:54:43 +00:00
Chris Lattner
0d8fcd3218 Convert the remaining instructions over, branches and calls. Fix a couple
minor bugs


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24762 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 06:54:41 +00:00
Chris Lattner
dc6938ac23 convert FP instructions to use an asmstring and operand list, allowing FP
programs to work on V8 again


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24761 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 06:32:52 +00:00
Evan Cheng
45f37bc527 Added truncate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24760 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 02:02:50 +00:00
Evan Cheng
1aabc4ea15 Added anyext, modelled as zext on X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24759 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:47:57 +00:00
Evan Cheng
8dee8cca3a Added some isel ideas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24757 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:25:19 +00:00
Evan Cheng
aed7c721df Added support for cmp, test, and conditional move instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24756 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:24:02 +00:00
Evan Cheng
56323c761a Only lower SELECT when using DAG based isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24755 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:22:13 +00:00
Evan Cheng
7df96d6672 X86 lowers SELECT to a cmp / test followed by a conditional move.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24754 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:21:05 +00:00
Jim Laskey
f5395cee6a Added source file/line correspondence for dwarf (PowerPC only at this point.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24748 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 22:45:29 +00:00
Chris Lattner
d9e0ba49a4 Weak and linkonce global vars should still have a .globl emitted for them
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24747 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 21:46:14 +00:00
Nate Begeman
f492f9901a Add a second vector type to the VRRC register class, and fix some patterns
so that tablegen can infer all types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24746 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 09:19:13 +00:00
Chris Lattner
0647bf6965 add some notes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24745 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 07:20:53 +00:00
Chris Lattner
13e1501c91 Add a couple more instrs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24744 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 07:18:48 +00:00
Chris Lattner
3c1c514fae remove some dead code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24743 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 07:16:02 +00:00
Chris Lattner
17392e026a asmprint pseudo instrs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24742 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 07:13:26 +00:00
Chris Lattner
d4f2ab5e00 Autogenerate asmprinter for F3_2 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24741 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 07:10:02 +00:00
Chris Lattner
1c4f435603 Switch F3_1 instructions over to use AsmStrings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24740 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 06:52:00 +00:00
Chris Lattner
994b735de8 Plug in basic hooks for an autogenerated asm printer to fill in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24739 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 06:34:17 +00:00
Chris Lattner
96b84beb77 Add operand info for F3_[12] instructions, getting V8 back to basic functionality.
With this, Regression/CodeGen/SparcV8/basictest.ll now passes.  Lets hear it
for regression tests :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24738 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 06:25:42 +00:00
Chris Lattner
03a83c90da Remove JIT support, which doesn't work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24736 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 06:06:07 +00:00
Chris Lattner
3ff5751683 add some simple operand info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24735 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 06:02:58 +00:00
Chris Lattner
a637c32e38 Update the darwin handling of linkonce & weak functions and GV stubs. This
should work in all permutations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24728 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 00:22:14 +00:00
Chris Lattner
272f998f6f Don't globalize internal functions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24727 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16 00:07:30 +00:00
Evan Cheng
cb17bac3a3 * Promote all 1 bit entities to 8 bit.
* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
zextload.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24726 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-15 19:49:23 +00:00
Evan Cheng
502c5bb428 Added frameindex, constpool, globaladdr, and externalsym as root nodes of
leaaddr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24724 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-15 08:31:04 +00:00
Evan Cheng
543b4583d3 Added constpool, frameindex, and externalsym nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24723 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-15 08:29:48 +00:00
Evan Cheng
def941b41f Handling zero extension of 1 bit value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24722 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-15 01:02:48 +00:00
Evan Cheng
f6036a3f1b Use MOV8rm to load 1 bit value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24721 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-15 00:59:17 +00:00
Nate Begeman
b5f8e62d71 Remove a now unused statistic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24720 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:56:16 +00:00
Nate Begeman
a07da92624 Use the new predicate support that Evan Cheng added to remove some code
from the DAGToDAG cpp file.  This adds pattern support for vector and
scalar fma, which passes test/Regression/CodeGen/PowerPC/fma.ll, and
does the right thing in the presence of -disable-excess-fp-precision.

Allows us to match:
void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = mul <4 x float> %tmp1, %tmp1
  %tmp3 = add <4 x float> %tmp2, %tmp1
  store <4 x float> %tmp3, <4 x float> *%a
  ret void
}

As:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vmaddfp v0, v0, v0, v0
        stvx v0, r2, r3
        blr

Or, with llc -disable-excess-fp-precision,

_foo:
        li r2, 0
        lvx v0, r2, r3
        vxor v1, v1, v1
        vmaddfp v1, v0, v0, v1
        vaddfp v0, v1, v0
        stvx v0, r2, r3
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24719 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:54:33 +00:00
Evan Cheng
74164098ff Fixed a typo: line 2323: MOVSX16rm8 -> MOVZX16rm8. This was the cause fo 12/14/2005 hbd failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24717 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:28:18 +00:00
Evan Cheng
8c75ef9228 Added predicate !NoExcessFPPrecision to FMADD, FMADDS, FMSUB, and FMSUBS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24716 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:07:12 +00:00
Evan Cheng
58e84a69f5 Added support to specify predicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24715 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:02:59 +00:00
Evan Cheng
2b52426441 Fixed extload type profile. The 4th operand is a ValueType node with type
OtherVT, it cannot be compare to type of 1st operand which is an integer type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24713 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 19:40:54 +00:00
Evan Cheng
7a7e8375a9 Added sext and zext patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24705 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 02:22:27 +00:00
Evan Cheng
3d2331dba7 Added sextld + zextld DAG nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24703 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 02:21:01 +00:00
Nate Begeman
3fb6877cb4 Add support for fmul node of type v4f32.
void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = mul <4 x float> %tmp1, %tmp1
  store <4 x float> %tmp2, <4 x float> *%a
  ret void
}

Is selected to:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vxor v1, v1, v1
        vmaddfp v0, v0, v0, v1
        stvx v0, r2, r3
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24701 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 00:34:09 +00:00
Nate Begeman
993aeb2ed9 Prepare support for AltiVec multiply, divide, and sqrt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24700 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 22:55:22 +00:00
Evan Cheng
85dd889ed6 Add load + store folding srl and sra patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24696 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 07:24:22 +00:00
Chris Lattner
d1239b7c69 Use the shared asmprinter code for printing special llvm globals
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24695 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 06:32:50 +00:00
Chris Lattner
a046e0d79f Add ELF and darwin support for static ctors and dtors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24693 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 04:53:51 +00:00
Chris Lattner
deea416570 reindent a loop, unswitch a loop. No functionality changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24692 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 04:33:58 +00:00
Evan Cheng
c937ffafba Beautify a few patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24690 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 02:40:18 +00:00
Evan Cheng
763b029b28 Some shl patterns which do load + store folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24689 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 02:34:51 +00:00
Evan Cheng
605c415046 A few helper fragments for loads. e.g. (i8 (load addr:$src)) -> (loadi8 addr:$src). Only to improve readibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24688 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 01:57:51 +00:00
Evan Cheng
0ef3a77bdf Add and, or, and xor patterns which fold load + stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24687 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 01:41:36 +00:00
Evan Cheng
6cad276c90 Add inc + dec patterns which fold load + stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24686 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 01:02:47 +00:00
Evan Cheng
5ce4edb967 Add neg and not patterns which fold load + stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24685 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:54:44 +00:00
Evan Cheng
5a38e0210d Missed a couple redundant explicit type casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24684 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:25:07 +00:00
Evan Cheng
9b6b642647 Fix some bad choice of names: i16SExt8 ->i16immSExt8, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24683 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:14:11 +00:00
Evan Cheng
b3558540b6 * Split immSExt8 to i16SExt8 and i32SExt8 for i16 and i32 immediate operands.
This enables the removal of some explicit type casts.
* Rename immZExt8 to i16ZExt8 as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24682 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:01:09 +00:00
Evan Cheng
f281e02cbd Add some integer mul patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24681 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 23:47:46 +00:00
Evan Cheng
d160d48a2b Add some sub patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24675 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 21:54:05 +00:00
Evan Cheng
e5280536a3 When SelectLEAAddr() fails, it shouldn't cause the side effect of having the
base or index operands being selected.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24674 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 21:49:40 +00:00
Evan Cheng
cbd6ed4d6b For ISD::RET, if # of operands >= 2, try selection the real data dep. operand
first before the chain.
e.g.
int X;

int foo(int x)
{
  x += X + 37;
  return x;
}

If chain operand is selected first, we would generate:
	movl X, %eax
	movl 4(%esp), %ecx
	leal 37(%ecx,%eax), %eax

rather than
	movl $37, %eax
	addl 4(%esp), %eax
	addl X, %eax

which does not require %ecx. (Due to ADD32rm not matching.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24673 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 20:32:18 +00:00
Andrew Lenharth
110f2243fc fix FP selects
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24672 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 20:30:09 +00:00
Chris Lattner
a763969837 remove some never-completed and now-obsolete code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24671 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 20:12:20 +00:00
Evan Cheng
ee93f9db87 Add a few more add / store patterns. e.g. ADD32mi8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24670 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 19:45:23 +00:00
Andrew Lenharth
361f45a557 restore a more restricted select
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24668 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 17:43:52 +00:00
Chris Lattner
d2c339cca7 Fix typo :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24664 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 18:43:13 +00:00
Chris Lattner
3aed79eadb add selectcc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24662 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 08:35:54 +00:00
Chris Lattner
d717b19933 Remove type casts that are no longer needed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24661 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 07:45:47 +00:00
Chris Lattner
84384546e2 Realize the constant pool & global addrs must always be ptr type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24660 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 07:45:04 +00:00
Chris Lattner
e54645a6fb Fix the JIT failures from last night.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24659 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 07:37:41 +00:00
Andrew Lenharth
e41419f51e FP select improvements (and likely breakage), oh and crazy people might want to *return* floating point values. Don't see why myself
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24658 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 03:54:31 +00:00
Nate Begeman
28a6b02626 Add support for TargetConstantPool nodes to the dag isel emitter, and use
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24657 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 02:36:00 +00:00
Evan Cheng
b612ff9569 Use SDTCisPtrTy type property for store address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24656 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 01:59:36 +00:00
Evan Cheng
b51a059b2c * Added X86 store patterns.
* Added X86 dec patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24654 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 00:48:20 +00:00
Nate Begeman
0976122abc Add support patterns to many load and store instructions which will
hopefully use patterns in the near future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24651 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 23:54:18 +00:00
Chris Lattner
d8fe3b3272 Add SDTCisPtrTy and use it for loads, to indicate that the operand of a load
must be a pointer.  This removes a type check out of the code generated by
tblgen for load matching.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24650 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 22:58:42 +00:00
Evan Cheng
ab24ed2a32 Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %al
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24648 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 22:48:48 +00:00
Chris Lattner
646f7afb79 Teach the PPC backend about the ctor and dtor list when not using __main and
linking the entire program into one bc file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24645 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 18:24:29 +00:00
Andrew Lenharth
dd3ccde9ea it helps if your conditionals are not reversed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24641 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 00:45:42 +00:00
Chris Lattner
62c08dd4a1 Add another important case we miss
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24639 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 07:13:28 +00:00
Evan Cheng
f20da7e1a7 Added support for ComplexPattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24638 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 04:28:48 +00:00
Evan Cheng
670fd8f8dd Added explicit type field to ComplexPattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24637 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 02:15:07 +00:00
Evan Cheng
ec693f77c0 * Added intelligence to X86 LEA addressing mode matching routine so it returns
false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added patterns for X86 integer loads and LEA32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24635 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 02:01:35 +00:00
Chris Lattner
e80242a948 X86 doesn't support sextinreg for 8-bit things either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24631 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-07 17:59:14 +00:00
Andrew Lenharth
bbe1225bf4 fix divide and remainder
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24628 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 23:27:39 +00:00
Chris Lattner
85961d5ec1 Silence another annoying GCC warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24627 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 20:56:18 +00:00
Andrew Lenharth
f88471ded7 more decent branches for FP. I might have to make some intermediate nodes to actually be able to use the DAG for FPcmp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24625 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 20:43:30 +00:00
Andrew Lenharth
cfb2815695 OK, this does wonders for broken stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24624 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 20:40:34 +00:00
Chris Lattner
4172b10ca1 Use new PPC-specific nodes to represent shifts which require the 6-bit
amount handling that PPC provides.  These are generated by the lowering code
and prevents the dag combiner from assuming (rightfully) that the shifts
don't only look at 5 bits.  This fixes a miscompilation of crafty with
the new front-end.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24615 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 02:10:38 +00:00
Andrew Lenharth
eda80a0dec added instructions with inverted immediates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24614 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 00:33:53 +00:00
Andrew Lenharth
8a3a5fc9ba yea, it helps to have your path set right when testing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24613 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 23:41:45 +00:00
Andrew Lenharth
5de36f95da These never trigger, but whatever
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24612 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 23:19:44 +00:00
Evan Cheng
8d202230b4 Remove unnecessary let hasCtrlDep=1 now it can be inferred.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24611 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 23:09:43 +00:00
Andrew Lenharth
7962065fdb move this over to the dag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24609 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 20:50:53 +00:00
Andrew Lenharth
b457a93123 fix constant pool loads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24607 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 17:51:02 +00:00
Chris Lattner
3d36a9f6f4 Several things:
1. Remove redundant type casts now that PR673 is implemented.
2. Implement the OUT*ir instructions correctly.  The port number really
   *is* a 16-bit value, but the patterns should only match if the number
   is 0-255.  Update the patterns so they now match.
3. Fix patterns for shifts to reflect that the shift amount is always an
   i8, not an i16 as they were believed to be before.  This previous fib
   stopped working when we started knowing that CL has type i8.
4. Change use of i16i8imm in SH*ri patterns to all be imm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24599 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:40:25 +00:00
Chris Lattner
68bfd9c1e8 On some targets (e.g. X86), shift amounts are not the same as the value
being shifted.  Don't assume they are.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24598 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:37:26 +00:00
Chris Lattner
b5d01436e3 Add some explicit type casts so that tblgen knows the type of the shiftamount, which is not necessarily the same as the type being shifted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24595 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:34:29 +00:00
Chris Lattner
bd05982b48 Add some explicit type casts so that tblgen knows the type of the shift
amount, which is not necessarily the same as the type being shifted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24594 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:34:05 +00:00
Chris Lattner
bead6612a5 The basic fneg cases are already autogen'd
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24592 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 19:04:38 +00:00
Chris Lattner
937a79dbe3 Autogen matching code for ADJCALLSTACK[UP|DOWN], thanks to Evan's tblgen
improvements.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24591 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 19:01:59 +00:00
Chris Lattner
60a4ab2d5c Finish moving uncond br over to .td file, remove from .cpp file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24590 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 18:48:01 +00:00
Chris Lattner
1e48478557 Define BR in the .td file now that Evan made tblgen smarter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24589 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 18:42:54 +00:00
Evan Cheng
d35b8c1adb Added isel patterns for RET, JMP, and WRITEPORT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24588 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 08:19:43 +00:00
Evan Cheng
f8ac814957 * Added instruction property hasCtrlDep for those which r/w control-flow
chains.
* Added DAG node property SDNPHasChain for nodes which r/w control-flow
  chains.
* Renamed SDTVT to SDTOther.
* Added several new SDTypeProfiles for BR, BRCOND, RET, and WRITEPORT.
* Added SDNode definitions for BR, BRCOND, RET, and WRITEPORT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24586 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 08:13:17 +00:00
Chris Lattner
df65de42cf Fix PR672 another way which should be more robust
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24585 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 06:03:50 +00:00
Chris Lattner
a027ba885a Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672.
This also fixes 177.mesa, the only program that fails with --enable-x86-fastcc
turned on.  Given a clean nightly tester run, we should be able to turn it
on by default!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24578 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-03 07:15:55 +00:00
Chris Lattner
865874c88a add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24572 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-02 00:11:20 +00:00
Chris Lattner
18c778f8be IA64 doesn't support the LOCATION node, and for some reason the ISelPattern
stuff isn't using ISelLowering.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24567 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 18:19:53 +00:00
Chris Lattner
05f56a529c Make sure these get added into the codegenmap when appropriate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24566 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 18:09:22 +00:00
Andrew Lenharth
6251b36d88 major think-o
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24564 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 17:48:51 +00:00
Nate Begeman
6510b22cec Support multiple ValueTypes per RegisterClass, needed for upcoming vector
work.  This change has no effect on generated code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 04:51:06 +00:00
Nate Begeman
5dfc55c304 Cosmetic change, better reflects actual values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24562 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 04:48:26 +00:00
Chris Lattner
db1cb2b3a1 Fix a regression caused by a patch earlier today
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24561 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 03:50:19 +00:00
Andrew Lenharth
9352622356 Flags where I think I need them, quick, before the nightly tester starts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24560 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 01:53:10 +00:00
Evan Cheng
640f299b44 Proper support for shifts with register shift value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24559 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 00:43:55 +00:00
Evan Cheng
c121e33e35 Use a getCopyToReg() variant to generate a flaggy CopyToReg node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24558 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 00:41:50 +00:00
Chris Lattner
d5acfb4153 SelectNodeTo now returns its result, we must pay attention to it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24552 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 23:04:38 +00:00
Chris Lattner
b19b899181 Pay attn to the node returned by SelectNodeTo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24551 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 23:02:08 +00:00
Chris Lattner
350d22e14d SelectNodeTo now returns its result, we must pay attention to it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24550 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 22:59:19 +00:00
Chris Lattner
71d3d50b4a SelectNodeTo now returns N. Use it instead of return N directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24549 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 22:53:06 +00:00
Chris Lattner
80720a9219 Fix Regression/CodeGen/PowerPC/2005-11-30-vastart-crash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24547 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 20:40:54 +00:00
Nate Begeman
85a168a734 Fix a typo in my latest change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24542 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 18:57:39 +00:00
Nate Begeman
391c5d231a No longer track value types for asm printer operands, and remove them as
an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24541 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 18:54:35 +00:00
Andrew Lenharth
72d32c222c remove redundant code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24538 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 17:14:11 +00:00
Andrew Lenharth
b2156f91f5 Make typesafe that which isn't: FCMOVxx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24536 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 17:11:20 +00:00
Andrew Lenharth
cd80496ccc FPSelect and more custom lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24535 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 16:10:29 +00:00
Nate Begeman
f43a3ca26d First chunk of actually generating vector code for packed types. These
changes allow us to generate the following code:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vaddfp v0, v0, v0
        stvx v0, r2, r3
        blr

for this llvm:

void %foo(<4 x float>* %a) {
entry:
        %tmp1 = load <4 x float>* %a
        %tmp2 = add <4 x float> %tmp1, %tmp1
        store <4 x float> %tmp2, <4 x float>* %a
        ret void
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24534 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 08:22:07 +00:00
Andrew Lenharth
7f0db91f86 All sorts of stuff.
Getting in on the custom lowering thing, yay
evilness with fp setcc, yuck
trivial int select, hmmm
in memory args for functions, yay
DIV and REM, always handy.  They should be custom lowered though.

Lots more stuff compiles now (go go single source!).  Of course, none of it
probably works, but that is what the nightly tester can find out :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24533 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 07:19:56 +00:00
Chris Lattner
5b9bbc8792 Fix a bug in a recent patch that broke shifts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24526 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 05:11:18 +00:00
Evan Cheng
bd3d25c6b1 Added support to STORE and shifts to DAG to DAG isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24525 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 02:51:20 +00:00
Evan Cheng
345c3f370d Fixed a minor bug: - -offset != offset iff offset == MININT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24522 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 01:59:00 +00:00
Nate Begeman
7ac8e6b6a8 Represent the encoding of the SPR instructions as they actually are, so
that we can use the correct SPR numbers in the InstrInfo.td file.  This is
necessary to support VRsave.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24521 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 22:42:50 +00:00
Evan Cheng
f0701842f7 Add more X86 ISel patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24520 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 19:38:52 +00:00
Nate Begeman
425a96971f Hook up one type, v4f32, to the VR RegisterClass for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24517 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 08:17:20 +00:00
Nate Begeman
9b14f66320 Add the remainder of the AltiVec 4 x float instructions. Further
enhancements will be necessary to teach the code generator that since
there is no fmul, it will have to do vmaddfp, adding +0.0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24516 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 08:04:45 +00:00
Chris Lattner
f73bae1b73 No targets support line number info yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24513 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 06:16:21 +00:00
Nate Begeman
6a648614e8 Add the majority of the vector machien value types we expect to support,
and make a few changes to the legalization machinery to support more than
16 types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24511 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 05:45:29 +00:00
Evan Cheng
5ee16ea417 Fixed a comment bug:
createPPCPatternInstructionSelector -> createPPCISelPattern


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24510 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 04:59:46 +00:00