Commit Graph

128669 Commits

Author SHA1 Message Date
Chandler Carruth
c5266b5293 [PM] Port memdep to the new pass manager.
This is a fairly straightforward port to the new pass manager with one
exception. It removes a very questionable use of releaseMemory() in
the old pass to invalidate its caches between runs on a function.
I don't think this is really guaranteed to be safe. I've just used the
more direct port to the new PM to address this by nuking the results
object each time the pass runs. While this could cause some minor malloc
traffic increase, I don't expect the compile time performance hit to be
noticable, and it makes the correctness and other aspects of the pass
much easier to reason about. In some cases, it may make things faster by
making the sets and maps smaller with better locality. Indeed, the
measurements collected by Bruno (thanks!!!) show mostly compile time
improvements.

There is sadly very limited testing at this point as there are only two
tests of memdep, and both rely on GVN. I'll be porting GVN next and that
will exercise this heavily though.

Differential Revision: http://reviews.llvm.org/D17962

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263082 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-10 00:55:30 +00:00
Philip Reames
d8f0e4d761 [BasicAA/MDA] Sink aliasing rules for malloc and calloc into BasicAA
MemoryDependenceAnalysis had a hard-coded exception to the general aliasing rules for malloc and calloc. The reasoning that applied there is equally valid in BasicAA and clarifies the remaining logic in MDA.

In principal, this can expose slightly more optimization opportunities, but since essentially all of our aliasing aware memory optimization passes go through MDA, this will likely be NFC in practice.

Differential Revision: http://reviews.llvm.org/D15912



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263075 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 23:19:56 +00:00
Philip Reames
3239eb1016 [CGP] Duplicate addressing computation in cold paths if required to sink addressing mode
This patch teaches CGP to duplicate addressing mode computations into cold paths (detected via explicit cold attribute on calls) if required to let addressing mode be safely sunk into the basic block containing each load and store.

In general, duplicating code into cold blocks may result in code growth, but should not effect performance. In this case, it's better to duplicate some code than to put extra pressure on the register allocator by making it keep the address through the entirely of the fast path.

This patch only handles addressing computations, but in principal, we could implement a more general cold cold scheduling heuristic which tries to reduce register pressure in the fast path by duplicating code into the cold path. Getting the profitability of the general case right seemed likely to be challenging, so I stuck to the existing case (addressing computation) we already had.

Differential Revision: http://reviews.llvm.org/D17652



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263074 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 23:13:12 +00:00
Philip Reames
78e37a90ad Fix the build
I screwed up rebasing 263072.  This change fixes the build and passes all make check.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263073 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 23:07:53 +00:00
Philip Reames
34c171d3ad [LICM] Store promotion when memory is thread local
This patch teaches LICM's implementation of store promotion to exploit the fact that the memory location being accessed might be provable thread local. The fact it's thread local weakens the requirements for where we can insert stores since no other thread can observe the write. This allows us perform store promotion even in cases where the store is not guaranteed to execute in the loop.

Two key assumption worth drawing out is that this assumes a) no-capture is strong enough to imply no-escape, and b) standard allocation functions like malloc, calloc, and operator new return values which can be assumed not to have previously escaped.

In future work, it would be nice to generalize this so that it works without directly seeing the allocation site. I believe that the nocapture return attribute should be suitable for this purpose, but haven't investigated carefully. It's also likely that we could support unescaped allocas with similar reasoning, but since SROA and Mem2Reg should destroy those, they're less interesting than they first might seem.

Differential Revision: http://reviews.llvm.org/D16783



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263072 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 22:59:30 +00:00
Sanjay Patel
d05dce8ca6 [x86] fix cost model inaccuracy for vector memory ops
The irony of this patch is that one CPU that is affected is AMD Jaguar, and Jaguar
has a completely double-pumped AVX implementation. But getting the cost model to
reflect that is a much bigger problem. The small goal here is simply to improve on
the lie that !AVX2 == SandyBridge.

Differential Revision: http://reviews.llvm.org/D18000



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263069 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 22:23:33 +00:00
Derek Schuff
70438f5c80 [WebAssembly] Update known gcc test failures
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263068 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 22:14:33 +00:00
Sanjay Patel
40847a4c84 [x86, AVX] optimize masked loads with constant masks
Instead of a variable-blend instruction, form a blend with immediate because those are always cheaper.

Differential Revision: http://reviews.llvm.org/D17899


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263067 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 22:12:08 +00:00
Philip Reames
352b0048ba [ValueTracking] Extract isKnownPositive [NFCI]
Extract out a generic interface from a recently landed patch and document a TODO in case compile time becomes a problem.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263062 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 21:31:47 +00:00
Philip Reames
37f4f50139 [InstCombine] (icmp sgt smin(PosA, B) 0) -> (icmp sgt B 0)
When checking whether an smin is positive, we can move the comparison to one of the inputs if the other is known positive. If the known positive one is the min, then the other can't be negative. If the other is the min, then we compute the min.

Differential Revision: http://reviews.llvm.org/D17873



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263059 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 21:05:07 +00:00
Adam Nemet
cc638e59fd [LLE] Add missing check for unit stride
I somehow missed this.  The case in GCC (global_alloc) was similar to
the new testcase except it had an array of structs rather than a two
dimensional array.

Fixes RP26885.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263058 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 20:47:55 +00:00
Evandro Menezes
1a0cda750f [AArch64] Minor reformatting (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263054 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 19:56:38 +00:00
Hemant Kulkarni
e57aee0af8 [llvm-readobj] Enable GNU style section group print
Differential Revision: http://reviews.llvm.org/D17822

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263050 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 19:16:13 +00:00
Matthias Braun
e152c1527d InstCombine: Restrict computeKnownBits() on all Values to OptLevel > 2
As part of r251146 InstCombine was extended to call computeKnownBits on
every value in the function to determine whether it happens to be
constant. This increases typical compiletime by 1-3% (5% in irgen+opt
time) in my measurements. On the other hand this case did not trigger
once in the whole llvm-testsuite.

This patch introduces the notion of ExpensiveCombines which are only
enabled for OptLevel > 2. I removed the check in InstructionSimplify as
that is called from various places where the OptLevel is not known but
given the rarity of the situation I think a check in InstCombine is
enough.

Differential Revision: http://reviews.llvm.org/D16835

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263047 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 18:47:11 +00:00
Matthias Braun
945faa1355 MachineRegisterInfo: Correct comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263046 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 18:47:05 +00:00
Chris Dewhurst
9343ace500 This change adds co-processor condition branching and conditional traps to the Sparc back-end.
This will allow inline assembler code to utilize these features, but no automatic lowering is provided, except for the previously provided @llvm.trap, which lowers to "ta 5".

The change also separates out the different assembly language syntaxes for V8 and V9 Sparc. Previously, only V9 Sparc assembly syntax was provided.

The change also corrects the selection order of trap disassembly, allowing, e.g. "ta %g0 + 15" to be rendered, more readably, as "ta 15", ignoring the %g0 register. This is per the sparc v8 and v9 manuals.

Check-in includes many extra unit tests to check this works correctly on both V8 and V9 Sparc processors.

Code Reviewed at http://reviews.llvm.org/D17960.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263044 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 18:20:21 +00:00
Sanjay Patel
e8b70722e0 add a test RUN to show unexpected behavior
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263037 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 17:53:28 +00:00
Kit Barton
081c47b628 [PPC] backend changes to generate xvabs[s,d]p and xvnabs[s,d]p instructions
This has to be committed before the FE changes

Phabricator: http://reviews.llvm.org/D17837

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263035 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 17:48:01 +00:00
Adrian Prantl
52f8d91dde Don't crash when compiling inline assembler containing .file directives.
Removing the assertion is  safe to do because any module level inline
assembly is always emitted first via AsmPrinter::doInitialization().

http://reviews.llvm.org/D16101
rdar://22690666

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263033 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 17:32:56 +00:00
Chad Rosier
f8b4bf82a5 [AArch64] Move helper functions into TII, so they can be reused elsewhere. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263032 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 17:29:48 +00:00
Hans Wennborg
86b13ad31e ReleaseNotes: update 'you may prefer' link to 3.8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263030 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 17:25:34 +00:00
Valery Pykhtin
4915c55094 [AMDGPU] add AMDGPU target support to ELFObjectFile.h header
Differential Revision: http://reviews.llvm.org/D17144

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263026 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 17:08:19 +00:00
Chad Rosier
591e1d2c57 [AArch64] Minor cleanup/remove redundant code. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263024 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 16:46:48 +00:00
Tom Stellard
026295317d SelectionDAG: Fix a crash on inline asm when output register supports multiple types
Summary:
The code in SelectionDAG did not handle the case where the
register type and output types were different, but had the same size.

Reviewers: arsenm, echristo

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17940

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263022 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 16:02:52 +00:00
Chad Rosier
cd3a68c781 [TII] Allow getMemOpBaseRegImmOfs() to accept negative offsets. NFC.
http://reviews.llvm.org/D17967

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263021 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 16:00:35 +00:00
Teresa Johnson
9925f81075 Fix build error due to unsigned compare >= 0 in r263008 (NFC)
Fixes error from building with clang:

/usr/local/google/home/tejohnson/llvm/llvm_15/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp:407:12:
error: comparison of unsigned expression >= 0 is always true
[-Werror,-Wtautological-compare]
  if ((Imm >= 0x000) && (Imm <= 0x0ff)) {
         ~~~ ^  ~~~~~

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263014 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 14:58:23 +00:00
Petar Jovanovic
6ed4786900 Reland r262337 "calculate builtin_object_size if arg is a removable pointer"
Original commit message:
 calculate builtin_object_size if argument is a removable pointer

 This patch fixes calculating correct value for builtin_object_size function
 when pointer is used only in builtin_object_size function call and never
 after that.

 Patch by Strahinja Petrovic.

 Differential Revision: http://reviews.llvm.org/D17337

Reland the original change with a small modification (first do a null check
and then do the cast) to satisfy ubsan.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263011 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 14:12:47 +00:00
Silviu Baranga
2438757d1d Update comments following the addition of PredicatedScalarEvolution. NFC.
We changed several functions in LoopAccessAnalysis to use PSE instead of
taking SE and a SCEV predicate as arguments, but didn't update the comments.

This also fixes a comment in ScalarEvolution, where we refered to Preds
when the argument name was A.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263009 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 12:39:06 +00:00
Sam Kolton
6e4c55e686 [AMDGPU] Assembler: Support DPP instructions.
Supprot DPP syntax as used in SP3 (except several operands syntax).
Added dpp-specific operands in td-files.
Added DPP flag to TSFlags to determine if instruction is dpp in InstPrinter.
Support for VOP2 DPP instructions in td-files.
Some tests for DPP instructions.

ToDo:
  - VOP2bInst:
    - vcc is considered as operand
    - AsmMatcher doesn't apply mnemonic aliases when parsing operands
  - v_mac_f32
  - v_nop
  - disable instructions with 64-bit operands
  - change dpp_ctrl assembler representation to conform sp3

Review: http://reviews.llvm.org/D17804

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263008 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 12:29:31 +00:00
Nikolay Haustov
f9cb03f33a [AMDGPU] Assembler: Support abs() syntax.
Support legacy SP3 abs(v1) syntax. InstPrinter still uses |v1|.
Add tests.

Differential Revision: http://reviews.llvm.org/D17887

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263006 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 11:03:21 +00:00
Nikolay Haustov
7b74d3d8a5 [AMDGPU] Assembler: Fix s_setpc_b64
s_setpc_b64 has just one 64-bit source which is the address of instruction to jump to.

Differential Revision: http://reviews.llvm.org/D17888

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263005 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 10:56:19 +00:00
Richard Trieu
a3c641f033 Fix uninitialized member bool. Detected by ASan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262999 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 06:31:25 +00:00
Adam Nemet
713ac2f65a [LoopDataPrefetch] Add stats and debug output
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262998 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 05:33:21 +00:00
Adam Nemet
db96e9895d [LAA] Improve comment for isStridedPtr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262997 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 05:33:19 +00:00
Dan Gohman
0f7f7def70 [WebAssembly] Update comments about irreducible control flow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262995 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 04:17:36 +00:00
Sean Silva
91639a80c3 Use lto_bool_t instead of a raw bool (fixup for r262977).
Hopefully this should bring
llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast back to life.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262994 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 04:05:28 +00:00
Mehdi Amini
1749363297 Fix ThinLTO test: depends on the X86 backend
From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262993 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 04:04:40 +00:00
Mehdi Amini
5e01ef406b void foo() is not a valid C prototype, one has to write void foo(void)
Remove a warning introduced in r262977

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262990 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 02:36:09 +00:00
Sanjoy Das
f3ceb82abb Return StringRef instead of a naked char*; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262989 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 02:34:19 +00:00
Sanjoy Das
4e05e1c0ff [IRCE] Reflow comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262988 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 02:34:15 +00:00
Mehdi Amini
856eaf91e1 Fix library dependency for llvm-lto after r262977
It is a transitive dependency, so static build are OK but not build
with individual DSO for each LLVM library.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262987 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 02:34:13 +00:00
Dan Gohman
09588765a8 [WebAssembly] Implement irreducible control flow.
This implements a very simple conservative transformation that doesn't
require more than linear code size growth. There's room for much more
optimization in this space.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262982 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 02:01:14 +00:00
Mehdi Amini
537911831c Fix GOLD plugin build after r262976
From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262981 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 01:55:15 +00:00
Sanjoy Das
7a015d3d92 Remove trailing newline from test case; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262980 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 01:51:44 +00:00
Sanjoy Das
74ca3d983b [SCEV] Slightly generalize getRangeViaFactoring
Building on the previous change, this generalizes
ScalarEvolution::getRangeViaFactoring to work with
{Ext(C?A:B)+k0,+,Ext(C?A:B)+k1} where Ext can be a zero extend, sign
extend or truncate operation, and k0 and k1 are constants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262979 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 01:51:02 +00:00
Sanjoy Das
59c4644550 [SCEV] Slightly generalize getRangeViaFactoring
This change generalizes ScalarEvolution::getRangeViaFactoring to work
with {Ext(C?A:B),+,Ext(C?A:B)} where Ext can be a zero extend, sign
extend or truncate operation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262978 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 01:50:57 +00:00
Mehdi Amini
73cf01b193 libLTO: add a ThinLTOCodeGenerator on the model of LTOCodeGenerator.
This is intended to provide a parallel (threaded) ThinLTO scheme
for linker plugin use through the libLTO C API.

The intent of this patch is to provide a first implementation as a
proof-of-concept and allows linker to start supporting ThinLTO by
definiing the libLTO C API. Some part of the libLTO API are left
unimplemented yet. Following patches will add support for these.

The current implementation can link all clang/llvm binaries.

Differential Revision: http://reviews.llvm.org/D17066

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262977 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 01:37:22 +00:00
Mehdi Amini
ec57137c98 FunctionIndex is not optional for renameModuleForThinLTO(), make it a reference (NFC)
From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262976 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 01:37:14 +00:00
Zachary Turner
a20f3bcccd [llvm-pdbdump] Dump line table information.
This patch adds the -lines command line option which will dump
source/line information for each compiland and source file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262962 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 21:42:24 +00:00
Sanjay Patel
50c79efd00 fix typo; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262961 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 21:41:13 +00:00