51 Commits

Author SHA1 Message Date
Bradley Smith
0283decdee [ARM] Add ARMv8-M Baseline/Mainline LLVM targeting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257878 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-15 10:24:39 +00:00
Ben Craig
49f241bc5a Reordering fields to reduce padding in LLVM. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255554 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-14 21:57:05 +00:00
Oliver Stannard
27fff2c5ff [ARM] Add ARMv8.2-A to TargetParser
Add ARMv8.2-A to TargetParser, so that it can be used by the clang
command-line options and the .arch directive.

Most testing of this will be done in clang, checking that the
command-line options that this enables work.

Differential Revision: http://reviews.llvm.org/D15037



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254400 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-01 10:33:56 +00:00
Artyom Skrobov
7cbf72b489 Handle ARMv6-J as an alias, instead of fake architecture
Summary:
This follows D14577 to treat ARMv6-J as an alias for ARMv6,
instead of an architecture in its own right.

The functional change is that the default CPU when targeting ARMv6-J
changes from arm1136j-s to arm1136jf-s, which is currently used as
the default CPU for ARMv6; both are, in fact, ARMv6-J CPUs.

The J-bit (Jazelle support) is irrelevant to LLVM, and it doesn't
affect code generation, attributes, optimizations, or anything else,
apart from selecting the default CPU.

Reviewers: rengolin, logan, compnerd

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D14755

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253675 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 16:46:09 +00:00
NAKAMURA Takumi
d19cbfed93 TargetParser.cpp: Fixup -- StringRef::startswith() is better here. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253570 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 15:42:52 +00:00
NAKAMURA Takumi
073829825d llvm/lib/Support/TargetParser.cpp: Rework llvm::ARM::getArchExtFeature() to avoid abuse of Twine in r253470.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253566 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 15:03:11 +00:00
Bradley Smith
fbbc259e37 [ARM] Add +feature names to TargetParser extensions table
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253470 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-18 16:32:12 +00:00
Artyom Skrobov
4c351fd4e8 Handle ARMv6KZ naming
Summary:
* ARMv6KZ is the "canonical" name, given in the ARMARM
* ARMv6Z is an "official abbreviation" for it, mentioned in the ARMARM
* ARMv6ZK is a popular misspelling, which we should support as an alias.

The patch corrects the handling of the names.

Functional changes:
* ARMv6Z no longer treated as an architecture in its own right
* ARMv6ZK renamed to ARMv6KZ, accepting ARMv6ZK as an alias
* arm1176jz-s and arm1176jzf-s recognized as ARMv6ZK, instead of ARMv6K
* default ARMv6K CPU changed to arm1176j-s

Reviewers: rengolin, logan, compnerd

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D14568

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253206 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-16 14:05:32 +00:00
Artyom Skrobov
05400e9493 NFC refactorings in lib/Support/TargetParser.cpp
Summary:
* declare FPUNames, ARCHNames, ARCHExtNames, HWDivNames, CPUNames
  as static const
* implement getDefaultExtensions with a StringSwitch, in the same
  way getDefaultFPU is implemented

Reviewers: rengolin

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14648

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253201 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-16 12:08:05 +00:00
Bradley Smith
870fdb54c3 [ARM] Allow TargetParser to accurately target architectures
Instead of defaulting to an empty string, we want to default to
the CPU 'generic' in the case of no valid default CPU being found,
(as long as the architecture is actually valid).

In order to do this we add a default FPU for each architecture, as
well as falling back to architecture defaults for extensions and FPU
in the case of a generic CPU is specified.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253198 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-16 11:15:22 +00:00
Artyom Skrobov
957ee69c41 Cull non-standard variants of ARM architectures (NFC)
Summary:
This patch changes ARMV5, ARMV5E, ARMV6SM, ARMV6HL, ARMV7, ARMV7L,
ARMV7HL, ARMV7EM to be treated as aliases for the corresponding
standard architectures, instead of as actual architectures.

Reviewers: rengolin

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D14577

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252903 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-12 15:51:41 +00:00
Tim Northover
856a038026 ARM: support .watchos_version_min and .tvos_version_min.
These MachO file directives are used by linkers and other tools to provide
compatibility information, much like the existing .ios_version_min and
.macosx_version_min.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251569 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-28 22:36:05 +00:00
Artyom Skrobov
3685b697a2 [ARM] Renaming +t2dsp feature into +dsp, as discussed on llvm-dev
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251125 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-23 17:19:19 +00:00
Artyom Skrobov
c848236c93 [ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def
Currently, the availability of DSP instructions (ACLE 6.4.7) is handled in a
hand-rolled tricky condition block in tools/clang/lib/Basic/Targets.cpp, with
a FIXME: attached.

This patch changes the handling of +t2dsp to be in line with other
architecture extensions.

Following a revert of r248152 and new review comments, this patch also includes
renaming FeatureDSPThumb2 -> FeatureDSP, hasThumb2DSP() -> hasDSP(), etc.
The spelling of "t2dsp" is preserved, pending a further investigation of its
possible external usage.

Differential Revision: http://reviews.llvm.org/D12937



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248519 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-24 17:31:16 +00:00
James Molloy
7d3733cd0d Revert "[ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def"
This was committed without the code review (http://reviews.llvm.org/D12937) being approved.

This reverts commit r248152.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248174 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-21 16:35:08 +00:00
Artyom Skrobov
7dfb31c329 [ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def
Currently, the availability of DSP instructions (ACLE 6.4.7) is handled in a
hand-rolled tricky condition block in tools/clang/lib/Basic/Targets.cpp, with
a FIXME: attached.

This patch changes the handling of +t2dsp to be in line with other
architecture extensions.

Following review comments, also updating the description of FeatureDSPThumb2
in ARM.td.

Differential Revision: http://reviews.llvm.org/D12937



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248152 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-21 12:43:10 +00:00
Alexandros Lamprineas
1955b207be Added arch extensions and default target features in TargetParser.
Differential: http://reviews.llvm.org/D11590

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246930 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-05 17:05:33 +00:00
Chandler Carruth
2ff230d5c9 Remove a linear walk to find the default FPU for a given CPU by directly
expanding the .def file within a StringSwitch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246377 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-30 09:01:38 +00:00
Chandler Carruth
599ae7ee1c Teach the target parsing framework to directly compute the length of all
of its strings when expanding the string literals from the macros, and
push all of the APIs to be StringRef instead of C-string APIs.

This (remarkably) removes a very non-trivial number of strlen calls. It
even deletes code and complexity from one of the primary users -- Clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246374 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-30 07:51:04 +00:00
Chandler Carruth
19f4e17b6d Refactor the ARM target parsing to use a def file with macros to expand
the necessary tables.

This will allow me to restructure the code and structures using this to
be significantly more efficient. It also removes the duplication of the
list of several enumerators. It also enshrines that the order of
enumerators match the order of the entries in the tables, something the
implementation code actually uses.

No functionality changed (yet).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246370 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-30 05:27:31 +00:00
Chandler Carruth
79888dbdef [Triple] Use clang-format to normalize the formatting of the ARM target
parsing logic prior to making substantial changes to it.

This parsing logic is incredibly wasteful, so I'm planning to rewrite
it. Just unittesting the triple parsing logic spends well over 80% of
its time in the ARM parsing logic, and others have measured significant
time spent here in real production compiles.

Stay tuned...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246369 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-30 02:17:15 +00:00
Chandler Carruth
869394014e [Triple] Stop abusing a class to have only static methods and just use
the namespace that we are already using for the enums that are produced
by the parsing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246367 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-30 02:09:48 +00:00
Vedant Kumar
6636b6292b [ARM] Fix MachO CPU Subtype selection
Differential Revision: http://reviews.llvm.org/D12040

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245744 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-21 21:52:48 +00:00
Renato Golin
5562df708a Revert "[ARM] Fix MachO CPU Subtype selection"
This reverts commit r245081, as it breaks many builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245086 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-14 19:35:47 +00:00
Vedant Kumar
7f3292c85e [ARM] Fix MachO CPU Subtype selection
This patch makes the Darwin ARM backend take advantage of TargetParser.  It
also teaches TargetParser about ARMV7K for the first time. This makes target
triple parsing more consistent across llvm.

Differential Revision: http://reviews.llvm.org/D11996


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245081 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-14 18:36:47 +00:00
Alexandros Lamprineas
10da90aaf3 - Added support for parsing HWDiv features using Target Parser.
- Architecture extensions are represented as a bitmap.

Phabricator: http://reviews.llvm.org/D11457

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243335 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 22:26:59 +00:00
Alexandros Lamprineas
96ac935e6d Edited the CPUNames table of TargetParser
- Changed the default FPU of cortex-m4.
- Removed "cortex-m4f" entry. Currently not supported.

Change-Id: I73121e358aa9e7ba68eb001c2143df390ff2352a
Phabricator: http://reviews.llvm.org/D11100

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242528 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-17 15:49:32 +00:00
Alexandros Lamprineas
e0117a90cf - TargetParser does not handle armv7l in parseArchProfile().
- ARM V7L matches the 'A' profile of ARM architecture.

Change-Id: I80c8b973f5c93fb040c177a227644d56b1b83ea8
Phabricator: http://reviews.llvm.org/D11261

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242406 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-16 14:54:41 +00:00
Alexandros Lamprineas
4aa2f4514c -Added API for retrieving the default FPU of a CPU from TargetParser.
-Implemented as a table lookup.

Change-Id: Iaad0eaf4b29b06827e6700269496dc1ba20e9018
Phabricator: http://reviews.llvm.org/D11100

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242284 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-15 10:46:21 +00:00
Alexandros Lamprineas
b83440104d Caused regressions: compile Release+Asserts failed on clang-native-arm-cortex-a9
Revert "-Added API for retrieving the default FPU of a CPU from TargetParser."

This reverts commit 01199ab0c6ff2d5c4f6b2c05a95ec011e41c4669.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242147 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 14:34:06 +00:00
Alexandros Lamprineas
01199ab0c6 -Added API for retrieving the default FPU of a CPU from TargetParser.
-Implemented as a table lookup.

Change-Id: Ibf7217f6bd2769e9c06835a5aede3d072dee6757
Phabricator: http://reviews.llvm.org/D11100

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242141 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 13:20:48 +00:00
Javed Absar
23fd3d6afc [ARM]: Extend -mfpu options for half-precision and vfpv3xd
removing default label in switch as it results.
This is part of earlier commit http://reviews.llvm.org/D1064

Subscribers: llvm-commits



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240932 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-29 09:53:33 +00:00
Javed Absar
263dd533ee [ARM]: Extend -mfpu options for half-precision and vfpv3xd
Some of the the permissible ARM -mfpu options, which are supported in GCC,
are currently not present in llvm/clang.This patch adds the options:
'neon-fp16', 'vfpv3-fp16', 'vfpv3-d16-fp16', 'vfpv3xd' and 'vfpv3xd-fp16.
These are related to half-precision floating-point and single precision.

Reviewers: rengolin, ranjeet.singh

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10645



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240930 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-29 09:32:29 +00:00
John Brawn
14d0411acb [ARM] Disabling vfp4 should disable fp16
ARMTargetParser::getFPUFeatures should disable fp16 whenever it
disables vfp4, as otherwise something like -mcpu=cortex-a7 -mfpu=none
leaves us with fp16 enabled (though the only effect that will have is
a wrong build attribute).

Differential Revision: http://reviews.llvm.org/D10397


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239599 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-12 09:38:51 +00:00
NAKAMURA Takumi
4fb638b527 TargetParser: Fix comments in enum(s) introduced in r239150. [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239211 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-06 01:41:35 +00:00
Benjamin Kramer
cdb8c729f2 [TargetParser] Properly attach functions of ARMTargetParser to the class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239158 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-05 14:33:02 +00:00
John Brawn
272d7fdf42 [ARM] Add support for -sp- FPUs and FPU none to TargetParser
These are added mainly for the benefit of clang, but this also means that they
are now allowed in .fpu directives and we emit the correct .fpu directive when
single-precision-only is used.

Differential Revision: http://reviews.llvm.org/D10238


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239151 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-05 13:31:19 +00:00
John Brawn
c1c9bc1df7 [ARM] Add knowledge of FPU subtarget features to TargetParser
Add getFPUFeatures to TargetParser, which gets the list of subtarget features
that are enabled/disabled for each FPU, and use it when handling the .fpu
directive.

No functional change in this commit, though clang will start behaving
differently once it starts using this.

Differential Revision: http://reviews.llvm.org/D10237


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239150 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-05 13:29:24 +00:00
Artyom Skrobov
b4435accd5 [ARMTargetParser] Follow-up for r239099: one case was missed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239147 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-05 12:39:28 +00:00
Artyom Skrobov
6782fc61ca Simplify ARMTargetParser::getArchSynonym
Summary:
1) The only caller, ARMTargetParser::parseArch, uses the results for an "endswith" test; so, including the "arm" prefix into the result is unnecessary.
2) Most ARMTargetParser::parseArch callers pass it the output from ARMTargetParser::getCanonicalArchName; so, make this behaviour the default. Then, including the "arm" prefix into the cases is unnecessary.

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10249


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239099 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 21:26:58 +00:00
Renato Golin
215bfbf9ea [ARMTargetParser] Move IAS arch ext parser. NFC
The plan was to move the whole table into the already existing ArchExtNames
but some fields depend on a table-generated file, and we don't yet have this
feature in the generic lib/Support side.

Once the minimum target-specific table-generated files are available in a
generic fashion to these libraries, we'll have to keep it in the ASM parser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238651 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-30 10:30:02 +00:00
Renato Golin
6952e75aa5 [ARMTargetParser] Adding sub-arch information for Clang. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238429 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-28 15:05:18 +00:00
Renato Golin
1af0c40934 [ARMTargetParser] Adding a few more CPUs for Clang CPU detection. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238415 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-28 12:10:37 +00:00
Renato Golin
ae2de5d12b Fix comments in ARMTargetParser. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238404 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-28 08:59:03 +00:00
Renato Golin
a052a77187 ARMTargetParser: Normalising build attributes
Now that most of the methods in Clang and LLVM that were parsing arch/cpu/fpu
strings are using ARMTargetParser, it's time to make it a bit more conforming
with what the ABI says.

This commit adds some clarification on what build attributes are accepted and
which are "non-standard". It also makes clear that the "defaultCPU" and
"defaultArch" methods were really just build attribute getters.

It also diverges from GCC's behaviour to say that armv2/armv3 are really an
ARMv4 in the build attributes, when the ABI has a clear state for that: Pre-v4.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238344 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-27 18:15:37 +00:00
Renato Golin
0ceb20d6f4 Reinforce ARMTargetParser::getCanonicalArchName validation
Before, getCanonicalArchName was relying on parseArch() to validate the arch
name, which was a problem when other methods, that also needed to call it,
were duplicating the steps.

But to dissociate getCanonicalArchName from parseArch, we needed to make
getCanonicalArchName more robust in detecting valid arch names. It's still
not perfect, but will do for the time being, until we merge Triple with
TargetParser into a TargetDescription mega class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238047 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 20:43:30 +00:00
Renato Golin
84b1a805bb Adding profile and version parsers to ARMTargetParser
This allows us to match armv6m to default to thumb, but will also be used by
Clang's driver and remove the current incomplete copy in it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238036 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 18:17:55 +00:00
Renato Golin
b6ea67e027 Make Triple::parseARMArch use ARMTargetParser
Simplifying Triple::parseARMArch, leaving all the parsing to ARMTargetParser.

This commit also adds AArch64 detection to ARMTargetParser canonicalization,
and a two RedHat arch names (v{6,7}hl, meaning hard-float / little-endian).

Adding enough unit tests to cover the basics. Clang checks fine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237902 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 13:52:20 +00:00
Renato Golin
8ca7ac2a38 Get Triple::getARMCPUForArch() to use TargetParser
First ARMTargetParser FIXME, conservatively changing the way we parse CPUs
in the back-end. Still not perfect, with a lot of special cases, but moving
towards a more generic solution.

Moving all logic to the target parser made some unwritten assumptions
about architectures in Clang to break. I've added a lot of architectures
required by Clang, and default to CPUs that Clang believes it should
(and I agree).

I've also added a lot of unit tests, with the correct CPU for each
architecture, and Clang seems to be working correctly, too.

It also became clear that using "unsigned ID" as the argument for the get
methods makes it hard to know what ID, so I also changed the argument names
to match the enum type names.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237797 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 15:05:07 +00:00
Renato Golin
ed73167673 Change TargetParser enum names to avoid macro conflicts (llvm)
sys/time.h on Solaris (and possibly other systems) defines "SEC" as "1"
using a cpp macro.  The result is that this fails to compile.

Fixes https://llvm.org/PR23482

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237112 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 10:33:58 +00:00