Commit Graph

127170 Commits

Author SHA1 Message Date
Dylan McKay
f4afd08249 [TableGen] Add 'register alternative name matching' support
Summary:
This adds a new attribute which targets can set in TableGen which causes a function to be generated which matches register alternative names. This is very similar to `ShouldEmitMatchRegisterName`, except it works on alt names.

This patch is currently used by the out of tree part of the AVR backend. It reduces code duplication greatly, and has the effect that you do not need to hardcode altname to register mappings in C++.

It will not work on targets which have registers which share the same aliases.

Reviewers: stoklund, arsenm, dsanders, hfinkel, vkalintiris

Subscribers: hfinkel, dylanmckay, llvm-commits

Differential Revision: http://reviews.llvm.org/D16312

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259636 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-03 10:30:16 +00:00
Simon Pilgrim
2eb4c2ae70 [X86][AVX] Add support for 64-bit VZEXT_LOAD of 256/512-bit vectors to EltsFromConsecutiveLoads
Follow up to D16217 and D16729

This change uncovered an odd pattern where VZEXT_LOAD v4i64 was being lowered to a load of the lower v2i64 (so the 2nd i64 destination element wasn't being zeroed), I can't find any use/reason for this and have removed the pattern and replaced it so only the 1st i64 element is loaded and the upper bits all zeroed. This matches the description for X86ISD::VZEXT_LOAD

Differential Revision: http://reviews.llvm.org/D16768

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259635 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-03 09:41:59 +00:00
Xinliang David Li
78fb7d3772 Add a compatibility test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259632 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-03 06:27:38 +00:00
Xinliang David Li
916e1f1bd4 Fix a typo in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259631 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-03 06:24:11 +00:00
Xinliang David Li
42800d1361 Fix uninitiazed variable use problem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259630 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-03 06:23:16 +00:00
Xinliang David Li
8fd9cfb481 [PGO] Profile summary reader/writer support
With this patch, the profile summary data will be available in indexed
profile data file so that profiler reader/compiler optimizer can start
to make use of.

Differential Revision: http://reviews.llvm.org/D16258



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259626 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-03 04:08:18 +00:00
Peter Collingbourne
a6d2c28101 LowerBitSets: Don't bother to do any work if the llvm.bitset.test intrinsic is unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259625 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-03 03:48:46 +00:00
Peter Collingbourne
065d01f100 Add #include "llvm/Support/raw_ostream.h" to fix Windows build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259623 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-03 03:16:37 +00:00
Peter Collingbourne
6f984cbfab Transforms: Move GlobalOpt's Evaluator to Utils where it can be reused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259621 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-03 02:51:00 +00:00
Nick Lewycky
b9d2127857 Fix typo in comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259620 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-03 02:15:49 +00:00
Peter Collingbourne
863bc58917 docs: Document how bitsets may be used to encode type information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259619 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-03 02:01:08 +00:00
Kyle Butt
ee53ec02b6 Codegen: [PPC] Fix PPCVSXFMAMutate to handle duplicates.
The purpose of PPCVSXFMAMutate is to elide copies by changing FMA forms
on PPC.

    %vreg6<def> = COPY %vreg96
    %vreg6<def,tied1> = XSMADDASP %vreg6<tied0>, %vreg5<kill>, %vreg7
    ;v6 = v6 + v5 * v7

is replaced by

    %vreg5<def,tied1> = XSMADDMSP %vreg5<tied0>, %vreg7, %vreg96
    ;v5 = v5 * v7 + v96

This was broken in the case where the target register was also used as a
multiplicand. Fix this case by checking for it and replacing both uses
with the copied register.

    %vreg6<def> = COPY %vreg96
    %vreg6<def,tied1> = XSMADDASP %vreg6<tied0>, %vreg5<kill>, %vreg6
    ;v6 = v6 + v5 * v6

is replaced by

    %vreg5<def,tied1> = XSMADDMSP %vreg5<tied0>, %vreg96, %vreg96
    ;v5 = v5 * v96 + v96

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259617 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-03 01:41:09 +00:00
Yunzhong Gao
6a4c1bd3e6 Revert r259576: Disable the vzeroupper insertion pass on PS4.
Will re-implement based on review feedback.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259615 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-03 01:25:12 +00:00
Marcello Maggioni
ecdde6284c RegCoalescer: Making sure re-materialization defines all subranges
The register coalescer can rematerialize constants that define
more of a register than the copy it is going to replace was going
to do.
This is valid in the case the register was undef before the
copy happened.
This patch makes sure that all the subranges defined by the new
rematerialization instructions have at least a dead def.

Review: http://reviews.llvm.org/D16693

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259614 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-03 00:22:32 +00:00
NAKAMURA Takumi
ed25e06529 DiagnosticInfoWithDebugLocBase: Appease Twine for now.
FIXME: We should get rid of Twine in the record.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259612 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-03 00:09:22 +00:00
Adam Nemet
5ff09a66da [LoopVersioning] Expose loop versioning as a pass too
Summary:
LoopVersioning is a transform utility that transform passes can use to
run-time disambiguate may-aliasing accesses. I'd like to also expose as
pass to allow it to be unit-tested.

I am planning to add support for non-aliasing annotation in
LoopVersioning and I'd like to be able to write tests directly using
this pass.

(After that feature is done, the pass could also be used to look for
optimization opportunities that are hidden behind incomplete alias
information at compile time.)

The pass drives LoopVersioning in its default way which is to fully
disambiguate may-aliasing accesses no matter how many checks are
required.

Reviewers: hfinkel, ashutosh.nema, sbaranga

Subscribers: zzheng, mssimpso, llvm-commits, sanjoy

Differential Revision: http://reviews.llvm.org/D16612

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259610 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-03 00:06:10 +00:00
George Burgess IV
6264f293fd Attempt #2 to unbreak r259595.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259602 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 23:26:01 +00:00
David Majnemer
76ee76499a [codeview] Improve readability of codeview assembly output
Strictly speaking, this is not an improvement in functionality per se
but a usability improvement to those debugging codeview.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259601 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 23:18:23 +00:00
Kostya Serebryany
7cec6c634b [libFuzzer] don't create too many trace-based mutations as it may be too slow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259600 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 23:17:45 +00:00
George Burgess IV
e1e04cba57 Attempt to fix builds broken by r259595.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259599 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 23:15:26 +00:00
George Burgess IV
02e0bb6dc6 This patch adds MemorySSA to LLVM.
Please see include/llvm/Transforms/Utils/MemorySSA.h for a description
of MemorySSA, and what it does.

Differential Revision: http://reviews.llvm.org/D7864


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259595 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 22:46:49 +00:00
Philip Reames
7373ed1ff6 [LVI] Fix debug output
Due to staleness in a patch I committed yesterday, the debug output was reporting overdefined cases as being undefined.  Confusing to say the least.  The mistake appears to have only effected the debug output thankfully.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259594 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 22:43:08 +00:00
Anna Zaks
04df7c1989 [asan] Add iOS support to AddressSanitzier
Differential Revision: http://reviews.llvm.org/D15625

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259586 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 22:05:07 +00:00
Philip Reames
524fa2e517 [LVI] Code motion only [NFC]
I introduced a declaration in 259583 to keep the diff readable.  This change just moves the definition up to remove the declaration again.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259585 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 22:03:19 +00:00
Philip Reames
dc27a09784 [LVI] Refactor to use newly introduced intersect utility
This patch uses the newly introduced 'intersect' utility (from 259461: [LVI] Introduce an intersect operation on lattice values) to simplify existing code in LVI.

While not introducing any new concepts, this change is probably not NFC.  The common 'intersect' function is more powerful that the ad-hoc implementations we'd had in a couple of places.  Given that, we may see optimizations triggering a bit more often.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259583 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 21:57:37 +00:00
Justin Bogner
4b23ca53a3 Remove utils/buildit
The autoconf build system was removed - this doesn't even work and
doesn't need to be here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259582 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 21:56:16 +00:00
Hemant Kulkarni
b99b60dd85 Correct size calculations for ELF files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259578 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 21:41:49 +00:00
Yunzhong Gao
16ee000624 Disable the vzeroupper insertion pass on PS4.
See comments in test/CodeGen/X86/avx-vzeroupper.ll for more explanation.

Original patch by: Sean Silva



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259576 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 21:39:23 +00:00
Lang Hames
f823e149af [Orc] Stub addresses should be based on stub size, not pointer size.
This didn't affect X86_64, which is the only client of this code at the moment,
as stubs and pointers are both 8-bytes there. It will affect other platforms
though.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259575 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 21:38:30 +00:00
Matt Arsenault
f1f2dd4ca2 AMDGPU: Do not promote allocas with non-inbounds GEPs
If we can't assume the pointer value isn't within the bounds
of the object, it seems risky to try to replace the pointer
calculations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259573 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 21:16:12 +00:00
Matt Arsenault
551787639e AMDGPU: Handle promoting memmove
Also add missing tests for the others.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259558 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 20:28:10 +00:00
Quentin Colombet
bcbd53a9e8 [X86] Fix the merging of SP updates in prologue/epilogue insertions.
When the merging was involving LEAs, we were taking the wrong immediate
from the list of operands.

rdar://problem/24446069


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259553 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 20:11:17 +00:00
Matthias Braun
34a1c16a99 MachineVerifier: Check that defs/uses are live in subregisters as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259552 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 20:04:51 +00:00
Matt Arsenault
ec856e4504 AMDGPU: Skip promote alloca with no optimizations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259551 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 19:32:42 +00:00
Matt Arsenault
ed9c1ce27a AMDGPU: Minor cleanups for AMDGPUPromoteAlloca
Mostly convert to use range loops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259550 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 19:32:35 +00:00
Lang Hames
9c1744ae4d [Orc] Turn OrcX86_64::IndirectStubsInfo into a template helper class:
GenericIndirectStubsInfo.

This will allow architecture support classes for other architectures to re-use
this code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259549 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 19:31:15 +00:00
David Majnemer
b20745dd5e [codeview] Correctly handle inlining functions post-dominated by unreachable
CodeView requires us to accurately describe the extent of the inlined
code.  We did this by grabbing the next debug location in source order
and using *that* to denote where we stopped inlining.  However, this is
not sufficient or correct in instances where there is no next debug
location or the next debug location belongs to the start of another
function.

To get this correct, use the end symbol of the function to denote the
last possible place the inlining could have stopped at.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259548 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 19:22:34 +00:00
Matt Arsenault
d01172110e AMDGPU: Report AMDGPUPromoteAlloca changed the function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259547 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 19:18:57 +00:00
Matt Arsenault
53b80ebb13 AMDGPU: Whitelist handled intrinsics
We shouldn't crash on unhandled intrinsics.
Also simplify failure handling in loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259546 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 19:18:53 +00:00
Matt Arsenault
374613d697 AMDGPU: Use inbounds when calculating workitem offset
When promoting allocas to LDS, we know we are indexing
into a specific area just created, and the calculation
will also never overflow.

Also emit some of the muls as nsw nuw, because instcombine
infers this already from the range metadata. I think
putting this on the other adds and muls might be OK too,
but I'm not 100% sure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259545 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 19:18:48 +00:00
Eugene Zelenko
380d47d651 Fix Clang-tidy readability-redundant-control-flow warnings; other minor fixes.
Differential revision: http://reviews.llvm.org/D16793


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259539 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 18:20:45 +00:00
Reid Kleckner
617bba8af8 [codeview] Wire up the .cv_inline_linetable directive
This directive emits the binary annotations that describe line and code
deltas in inlined call sites. Single-stepping through inlined frames in
windbg now works.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259535 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 17:41:18 +00:00
Derek Schuff
27751b5287 [MC] Enable eip-relative addressing on x86-64 for X32 ABI
Summary:
Enables eip-based addressing, e.g.,

lea    constant(%eip), %rax
lea    constant(%eip), %eax

in MC, (used for the x32 ABI). EIP-base addressing is also valid in x86_64,
it is left enabled for that architecture as well.

Patch by João Porto

Differential Revision: http://reviews.llvm.org/D16581

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259528 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 17:20:04 +00:00
Chad Rosier
808a3d2826 [AArch64] Add a FIXME comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259515 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 15:22:55 +00:00
Chad Rosier
bba05d1386 [AArch64] Allocate the modified and used regs only once per function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259510 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 15:02:30 +00:00
JF Bastien
38cce322fb WebAssembly: update expected GCC torture test failures
The 3 programs used __attribute__((mode(?))) on enum, which clang r259497 fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259508 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 14:27:34 +00:00
Oliver Stannard
9ed9eb72f4 Refactor backend diagnostics for unsupported features
Re-commit of r258951 after fixing layering violation.

The BPF and WebAssembly backends had identical code for emitting errors
for unsupported features, and AMDGPU had very similar code. This merges
them all into one DiagnosticInfo subclass, that can be used by any
backend.

There should be minimal functional changes here, but some AMDGPU tests
have been updated for the new format of errors (it used a slightly
different format to BPF and WebAssembly). The AMDGPU error messages will
now benefit from having precise source locations when debug info is
available.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259498 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 13:52:43 +00:00
Simon Pilgrim
b5a988525a [X86][AVX512] Add support for AVX512 VMOVQ (load) shuffle decoding
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259496 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 13:32:56 +00:00
JF Bastien
7f5fe827a0 WebAssembly: add option to disable register coloring
Having this hidden option makes it easier to debug other issues.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259482 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 09:30:01 +00:00
Sjoerd Meijer
fc1e90c277 Removed FeatureVFPOnlySP from the Cortex-R7 processor model
description and changed the regression test accordingly.
The default configuration of a Cortex-R7 is to implement the
VFPv3-D16 architecture and the feature line as it was is too
restrictive.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259480 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-02 09:28:20 +00:00