llvm/test/CodeGen
Artem Tamazov ea912da38b [AMDGPU][llvm-mc] Add support for sendmsg(...) syntax.
Added support for sendmsg(MSG[, OP[, STREAM_ID]]) syntax
in s_sendmsg and s_sendmsghalt instructions.
The syntax matches the SP3 assembler/disassembler rules.
That is why implicit inputs (like M0 and EXEC) are not printed
to disassembly output anymore.

sendmsg(...) allows only known message types and attributes,
even if literals are used instead of symbolic names.
However, raw literal (without "sendmsg") still can be used,
and that allows for any 16-bit value.

Tests updated/added.

Differential Revision: http://reviews.llvm.org/D19596

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268762 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 17:48:48 +00:00
..
AArch64 [AArch64] Fix test to specify triple and disable post-RA scheduling. 2016-05-06 17:12:38 +00:00
AMDGPU [AMDGPU][llvm-mc] Add support for sendmsg(...) syntax. 2016-05-06 17:48:48 +00:00
ARM [CodeGen] Round [SU]INT_TO_FP result when promoting from f16. 2016-05-06 00:58:00 +00:00
BPF BPF: emit an error message for unsupported signed division operation 2016-03-18 22:02:47 +00:00
Generic Introduce llvm.load.relative intrinsic. 2016-04-22 21:18:02 +00:00
Hexagon [Hexagon] Optimize addressing modes for load/store 2016-04-29 15:49:13 +00:00
Inputs [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
Lanai [lanai] Add subword scheduling itineraries. 2016-04-20 18:28:55 +00:00
Mips [mips][mips16] Use isUnconditionalBranch() in AnalyzeBranch() and constant island pass. 2016-05-06 13:23:51 +00:00
MIR ARM: fix handling of SUB immediates in peephole opt. 2016-05-02 18:30:08 +00:00
MSP430 MSP430InstrInfo::loadRegFromStackSlot forgets to set register def. 2016-02-24 15:15:02 +00:00
NVPTX [NVPTX] Fix sign/zero-extending ldg/ldu instruction selection 2016-05-02 18:12:02 +00:00
PowerPC [PowerPC] Generate VSX version of splat word 2016-05-04 16:04:02 +00:00
SPARC [Sparc] Allow taking of function address into a register. 2016-05-04 12:11:05 +00:00
SystemZ [SystemZ] Implement backchain attribute (recommit with fix). 2016-05-05 00:37:30 +00:00
Thumb [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
Thumb2 ARM: use r7 as the frame-pointer on all MachO targets. 2016-04-11 22:27:40 +00:00
WebAssembly [WebAssembly] Don't emit epilogue code in the middle of stackified code. 2016-05-05 20:41:15 +00:00
WinEH [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
X86 [X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr. 2016-05-06 17:42:57 +00:00
XCore [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00