Re-comitting with a change that avoids undefined uses getting put into
the VRegUses list.
The new algorithm remembers the uses encountered while walking backwards
until a matching def is found. Contrary to the previous version this:
- Works without LiveIntervals being available
- Allows to increase the precision to subregisters/lanemasks
(not used for now)
The changes in the AMDGPU tests are necessary because the R600 scheduler
is not stable with respect to the order of nodes in the ready queues.
Differential Revision: http://reviews.llvm.org/D9068
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254683 91177308-0d34-0410-b5e6-96231b3b80d8
+==============================================================================+
| How to organize the lit tests |
+==============================================================================+
- If you write a test for matching a single DAG opcode or intrinsic, it should
go in a file called {opcode_name,intrinsic_name}.ll (e.g. fadd.ll)
- If you write a test that matches several DAG opcodes and checks for a single
ISA instruction, then that test should go in a file called {ISA_name}.ll (e.g.
bfi_int.ll
- For all other tests, use your best judgement for organizing tests and naming
the files.
+==============================================================================+
| Naming conventions |
+==============================================================================+
- Use dash '-' and not underscore '_' to separate words in file names, unless
the file is named after a DAG opcode or ISA instruction that has an
underscore '_' in its name.
7adbf112c7