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llvm/lib/Target/AMDGPU
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Matthias Braun 6a6190de10 CodeGen: Move TargetPassConfig from Passes.h to an own header; NFC 
Many files include Passes.h but only a fraction needs to know about the
TargetPassConfig class. Move it into an own header. Also rename
Passes.cpp to TargetPassConfig.cpp while we are at it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269011 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 03:21:59 +00:00
..
AsmParser
[AMDGPU][llvm-mc] Add support for sendmsg(...) syntax.
2016-05-06 17:48:48 +00:00
Disassembler
Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD."
2016-04-29 17:04:50 +00:00
InstPrinter
[AMDGPU][llvm-mc] Add support for sendmsg(...) syntax.
2016-05-06 17:48:48 +00:00
MCTargetDesc
AMDGPU/SI: Add support for AMD code object version 2.
2016-05-05 17:03:33 +00:00
TargetInfo
…
Utils
AMDGPU: allow specifying a workgroup size that needs to fit in a compute unit
2016-04-14 16:27:07 +00:00
AMDGPU.h
AMDGPU: Remove SIFixSGPRLiveRanges pass
2016-04-14 17:42:29 +00:00
AMDGPU.td
[AMDGPU] Reserve VGPRs for trap handler usage if instructed
2016-04-26 15:43:14 +00:00
AMDGPUAlwaysInlinePass.cpp
…
AMDGPUAnnotateKernelFeatures.cpp
AMDGPU: Implement addrspacecast
2016-04-25 19:27:24 +00:00
AMDGPUAnnotateUniformValues.cpp
Add optimization bisect opt-in calls for AMDGPU passes
2016-04-25 22:23:44 +00:00
AMDGPUAsmPrinter.cpp
AMDGPU/SI: Add support for AMD code object version 2.
2016-05-05 17:03:33 +00:00
AMDGPUAsmPrinter.h
[AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunctionInfo + minor commenting changes
2016-04-26 17:24:40 +00:00
AMDGPUCallingConv.td
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
AMDGPUCallLowering.cpp
AMDGPU: Add skeleton GlobalIsel implementation
2016-04-14 19:09:28 +00:00
AMDGPUCallLowering.h
AMDGPU: Add skeleton GlobalIsel implementation
2016-04-14 19:09:28 +00:00
AMDGPUFrameLowering.cpp
…
AMDGPUFrameLowering.h
…
AMDGPUInstrInfo.cpp
…
AMDGPUInstrInfo.h
AMDGPU: Add SIWholeQuadMode pass
2016-03-21 20:28:33 +00:00
AMDGPUInstrInfo.td
AMDGPU: Implement {BUFFER,FLAT}_ATOMIC_CMPSWAP{,_X2}
2016-04-01 18:27:37 +00:00
AMDGPUInstructions.td
AMDGPU: Implement canonicalize
2016-04-14 01:42:16 +00:00
AMDGPUIntrinsicInfo.cpp
…
AMDGPUIntrinsicInfo.h
…
AMDGPUIntrinsics.td
…
AMDGPUISelDAGToDAG.cpp
Fixed unused but set variable warning
2016-05-09 16:42:23 +00:00
AMDGPUISelLowering.cpp
AMDGPU: Move R600 specific code out of AMDGPUISelLowering.cpp
2016-05-02 18:05:17 +00:00
AMDGPUISelLowering.h
AMDGPU: Remove custom load/store scalarization
2016-04-14 23:31:26 +00:00
AMDGPUMachineFunction.cpp
Revert "AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2."
2016-05-06 14:59:04 +00:00
AMDGPUMachineFunction.h
Revert "AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2."
2016-05-06 14:59:04 +00:00
AMDGPUMCInstLower.cpp
AMDGPU: Verify instructions in non-debug builds as well
2016-03-16 09:10:42 +00:00
AMDGPUMCInstLower.h
…
AMDGPUOpenCLImageTypeLoweringPass.cpp
[NFC] Header cleanup
2016-04-18 09:17:29 +00:00
AMDGPUPromoteAlloca.cpp
AMDGPU: Fix mishandling array allocations when promoting alloca
2016-04-28 18:38:48 +00:00
AMDGPURegisterInfo.cpp
…
AMDGPURegisterInfo.h
…
AMDGPURegisterInfo.td
…
AMDGPUSubtarget.cpp
[AMDGPU] Reserve VGPRs for trap handler usage if instructed
2016-04-26 15:43:14 +00:00
AMDGPUSubtarget.h
[AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunctionInfo + minor commenting changes
2016-04-26 17:24:40 +00:00
AMDGPUTargetMachine.cpp
CodeGen: Move TargetPassConfig from Passes.h to an own header; NFC
2016-05-10 03:21:59 +00:00
AMDGPUTargetMachine.h
…
AMDGPUTargetObjectFile.cpp
AMDGPU/SI: Add support for AMD code object version 2.
2016-05-05 17:03:33 +00:00
AMDGPUTargetObjectFile.h
AMDGPU/SI: Add support for AMD code object version 2.
2016-05-05 17:03:33 +00:00
AMDGPUTargetTransformInfo.cpp
AMDGPU: llvm.SI.fs.constant is a source of divergence
2016-05-02 17:37:01 +00:00
AMDGPUTargetTransformInfo.h
AMDGPU: Partially implement getArithmeticInstrCost for FP ops
2016-03-25 01:00:32 +00:00
AMDILCFGStructurizer.cpp
…
AMDKernelCodeT.h
…
CaymanInstructions.td
…
CIInstructions.td
AMDGPU: Implement i64 global atomics
2016-04-12 14:05:11 +00:00
CMakeLists.txt
AMDGPU/SI: Enable the post-ra scheduler
2016-04-30 00:23:06 +00:00
EvergreenInstructions.td
…
GCNHazardRecognizer.cpp
Silence unused variable warning; NFC.
2016-05-03 15:17:25 +00:00
GCNHazardRecognizer.h
AMDGPU/SI: Use the hazard recognizer to break SMEM soft clauses
2016-05-02 17:39:06 +00:00
LLVMBuild.txt
…
Processors.td
AMDGPU/SI: Add Polaris support
2016-03-24 15:31:05 +00:00
R600ClauseMergePass.cpp
Add optimization bisect opt-in calls for AMDGPU passes
2016-04-25 22:23:44 +00:00
R600ControlFlowFinalizer.cpp
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
R600Defines.h
…
R600EmitClauseMarkers.cpp
…
R600ExpandSpecialInstrs.cpp
…
R600InstrFormats.td
…
R600InstrInfo.cpp
AMDGPU/R600: Minor cleanup in InstrInfo
2016-05-04 14:55:45 +00:00
R600InstrInfo.h
[NFC] Header cleanup
2016-04-18 09:17:29 +00:00
R600Instructions.td
…
R600Intrinsics.td
…
R600ISelLowering.cpp
AMDGPU: Move R600 specific code out of AMDGPUISelLowering.cpp
2016-05-02 18:05:17 +00:00
R600ISelLowering.h
Fix instance of -Winconsistent-missing-override in AMDGPU code
2016-05-02 19:45:10 +00:00
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
[NFC] Header cleanup
2016-04-18 09:17:29 +00:00
R600MachineScheduler.cpp
…
R600MachineScheduler.h
…
R600OptimizeVectorRegisters.cpp
Add optimization bisect opt-in calls for AMDGPU passes
2016-04-25 22:23:44 +00:00
R600Packetizer.cpp
…
R600RegisterInfo.cpp
…
R600RegisterInfo.h
…
R600RegisterInfo.td
…
R600Schedule.td
…
R600TextureIntrinsicsReplacer.cpp
…
R700Instructions.td
…
SIAnnotateControlFlow.cpp
[StructurizeCFG] Annotate branches that were treated as uniform
2016-04-14 17:42:35 +00:00
SIDefines.h
[AMDGPU][llvm-mc] Add support for sendmsg(...) syntax.
2016-05-06 17:48:48 +00:00
SIFixControlFlowLiveIntervals.cpp
…
SIFixSGPRCopies.cpp
AMDGPU: Fix debug name of pass to better match
2016-04-21 18:21:54 +00:00
SIFoldOperands.cpp
Add optimization bisect opt-in calls for AMDGPU passes
2016-04-25 22:23:44 +00:00
SIFrameLowering.cpp
…
SIFrameLowering.h
…
SIInsertNopsPass.cpp
[AMDGPU] Insert nop pass: take care of outstanding feedback
2016-04-22 17:04:51 +00:00
SIInsertWaits.cpp
AMDGPU/SI: Use the hazard recognizer to break SMEM soft clauses
2016-05-02 17:39:06 +00:00
SIInstrFormats.td
[TableGen] AsmMatcher: support for default values for optional operands
2016-05-06 11:31:17 +00:00
SIInstrInfo.cpp
AMDGPU/SI: Fix bug in SIInstrInfo::insertWaitStates() uncovered by r268260
2016-05-02 18:02:24 +00:00
SIInstrInfo.h
Add missing override.
2016-04-30 15:18:21 +00:00
SIInstrInfo.td
[AMDGPU][llvm-mc] Some refactoring of .td files
2016-05-06 19:32:38 +00:00
SIInstructions.td
[AMDGPU][llvm-mc] Some refactoring of .td files
2016-05-06 19:32:38 +00:00
SIIntrinsics.td
Split IntrReadArgMem into IntrReadMem and IntrArgMemOnly
2016-04-21 17:48:02 +00:00
SIISelLowering.cpp
AMDGPU: Fold shift into cvt_f32_ubyteN
2016-05-09 16:29:50 +00:00
SIISelLowering.h
AMDGPU: Implement addrspacecast
2016-04-25 19:27:24 +00:00
SILoadStoreOptimizer.cpp
Add optimization bisect opt-in calls for AMDGPU passes
2016-04-25 22:23:44 +00:00
SILowerControlFlow.cpp
AMDGPU: Fix crash with unreachable terminators.
2016-04-29 21:52:13 +00:00
SILowerI1Copies.cpp
…
SIMachineFunctionInfo.cpp
[AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunctionInfo + minor commenting changes
2016-04-26 17:24:40 +00:00
SIMachineFunctionInfo.h
[AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunctionInfo + minor commenting changes
2016-04-26 17:24:40 +00:00
SIMachineScheduler.cpp
AMDGPU/SI: Use range loops to simplify some code in the SI Scheduler
2016-05-03 16:30:56 +00:00
SIMachineScheduler.h
…
SIRegisterInfo.cpp
AMDGPU/SI: Use v_readfirstlane_b32 when restoring SGPRs spilled to scratch
2016-05-02 20:11:44 +00:00
SIRegisterInfo.h
AMDGPU/SI: Enable the post-ra scheduler
2016-04-30 00:23:06 +00:00
SIRegisterInfo.td
Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD."
2016-04-29 17:04:50 +00:00
SISchedule.td
AMDGPU/SI: Enable the post-ra scheduler
2016-04-30 00:23:06 +00:00
SIShrinkInstructions.cpp
Add optimization bisect opt-in calls for AMDGPU passes
2016-04-25 22:23:44 +00:00
SITypeRewriter.cpp
AMDGPU: Add a shader calling convention
2016-04-06 19:40:20 +00:00
SIWholeQuadMode.cpp
AMDGPU/SI: add llvm.amdgcn.ps.live intrinsic
2016-04-22 04:04:08 +00:00
VIInstrFormats.td
[TableGen] AsmMatcher: support for default values for optional operands
2016-05-06 11:31:17 +00:00
VIInstructions.td
…