Andrew Cagney bc6df23d14 For "trap", IBT and RIE exceptions, mask all PSW.SM. NB: Stepping ... through an exception may not work correctly. For GDB reads/writes to the control registers, ensure the cpu state is updated correctly.		1997-12-08 03:22:58 +00:00
..
common	Add file alu-n-tst.h	1997-11-25 21:59:39 +00:00
d10v-elf	For "trap", IBT and RIE exceptions, mask all PSW.SM. NB: Stepping	1997-12-08 03:22:58 +00:00
d30v-elf	add missing files.	1997-09-18 04:56:22 +00:00
mips64r5900-elf	mips64vr5900el-elf -> mips64r5900-elf.	1997-09-23 21:45:43 +00:00
tic80-coff	Sanity check for tic80 simulator.	1997-09-08 17:19:21 +00:00
v850eq-elf	Fix typo, WITH_TARGET_WORD_BITSIZE not WITH_TARGET_BITSIZE.	1997-10-02 23:37:30 +00:00
.Sanitize	Do not sanitize out sim/testsuite/common directory.	1997-09-29 00:24:08 +00:00
ChangeLog	More v850 simulator tests.	1997-09-17 03:31:09 +00:00
configure.in	Test/fix pabsh, pabsw, psrlvw.	1997-09-01 09:47:03 +00:00