Commit Graph
5751 Commits
Author SHA1 Message Date
Claude f80f7223f4 Z80: the delay-loop shortcut counts the DEC cycles of each skipped iteration
The TIME_LOOP_HACKS shortcut skips the iterations of a
DEC rr / LD A,r / OR r / JR NZ (or JP NZ) delay loop by burning their
cycles in one go. Each skipped iteration runs four opcodes (R is
advanced by 4), but only LD, OR and the jump were counted: the DEC was
left out, so every iteration took 6 cycles too few (20 instead of 26
with JR) and such delays ran about 23% short.

Count the DEC as well, for the BC, DE and HL loops with JR and JP.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
Claude-Session: https://claude.ai/code/session_01N3fzdsnzkQVtgYtYzqepjX
2026-10-29 18:16:53 +01:00
ff5f1bd024 mame-memory: leave read-only banks of 1 MiB or more out of the save state (#2178)
register_banks() registers the RAM behind every bank that appears in a
memory map. Banks that only ever show up in read maps are ROM (the ST-V
cartridge bank, 48 MB, or the CAGE sound-board ROM banks, 2 + 16 MB),
but they were still copied into every save state, so states were
20-53 MB for those boards, and netplay, rewind and run-ahead keep many
states at once.

Remember whether each bank appears in a write map and skip a bank of
0x100000 bytes or more that never does. RAM banks and smaller banks are
unchanged, so the state layout of other drivers stays the same. An INFO
log line reports each skipped bank.

Co-authored-by: Squirbie <[email protected]>
Co-authored-by: Claude Opus 5.5 <[email protected]>
2026-10-29 06:08:50 -04:00
dfc61f1689 H6280: register CPU state; battlera/actfancr: save HuC6270 VDC and driver state (#2177)
The H6280 core registered nothing with the save-state system, and the
HuC6270 video chip of the battlera board (VRAM, registers, palette,
scanline/IRQ bookkeeping) and the driver's port select / ADPCM toggle
were not registered either. After a state load the CPU kept running
from its own PC, registers, MMR bank map and timer, and the screen was
drawn from the old VRAM, so netplay guests saw a blank or diverging
screen and rewind / run-ahead diverged.

- h6280.c: register PPC/PC/SP/ZP/EA, A/X/Y/P, the 8 MMR registers, the
  IRQ mask, timer status/ack/value/load, extra cycles and the IRQ lines
  (plus NZ with LAZY_FLAGS) per CPU in h6280_init(), as m6809_init() does.
- battlera_vidhrdw.c: register VRAM, the 20 VDC registers, the VDC
  pointers and flags, last_line (was a function-local static) and the
  palette RAM; a postload handler marks everything dirty and rebuilds
  the palette.
- battlera.c: register control_port_select, msm5205next and the ADPCM
  toggle (was a function-local static) from a new DRIVER_INIT.

Co-authored-by: Squirbie <[email protected]>
Co-authored-by: Claude Opus 5.5 <[email protected]>
2026-10-29 06:06:22 -04:00
zanacandClaude c6a2aa4700 Genie / Y-BOX and Sun Mixing boards in their own drivers (megadriv_ybox.c, megadriv_sunmix.c), as in current MAME (#2179)
Phase 2.4/5 of the Sega VDP / segac2.c clean-up: Puckman Pockimon and the
other Y-BOX games, and Super Bubble Bobble (Sun Mixing), move from
drivers/segac2.c to drivers/megadriv_ybox.c and drivers/megadriv_sunmix.c,
as in current MAME.

- Sets as in current MAME: puckpkmn is the Genie 2000 set of MAME, the old
  puckpkmn set is now its clone puckpkmnb; new jingling and topshoot.
  xmvsfmb (not working in MAME) is not added: no ROMs.
- The Y-BOX games run on the Mega Drive machine, as MAME's md_ntsc (they
  ran on the System C board): 68000, Z80, the YM3438 on the Z80 bus, I/O
  (no pads), the RAM mirrors, and the VDP interrupts and HBLANK status as
  on the real hardware (genesis_enable_iack). Songjiangyanyi Final waits
  on HBLANK to write the scroll of each line: it hung on a grey screen,
  it now works (imperfect graphics, as in MAME).
- Songjiangyanyi / Shuihu Feng Yun Zhuan protection as in MAME: two read
  back latches selected by A2 (it was a list of fixed addresses), the
  0x70001c value per game, the ROM address remapping at 0x600000 of
  Shuihu Feng Yun Zhuan (an address XOR while a value is latched: the
  data reads through a handler, the opcodes through an opbase handler).
- Jingling Jiazu / Puckman Pockimon: the ID at 0x4b2476 and 0x70001c.
- Top Shooter: the shared RAM inputs of the MCU (not emulated, as in MAME).
- Save states: the protection and remapping state.
- Metadata: mame2003-plus.xml, CHANGELOG.md.


Claude-Session: https://claude.ai/code/session_01N3fzdsnzkQVtgYtYzqepjX

Co-authored-by: Claude <[email protected]>
2026-10-29 06:00:09 -04:00
zanacandClaude 6266128ce8 Save states: the missing YM2203/YM2610/YM2612, MultiPCM and 6809 state (RunAhead, netplay) (#2176)
Loading a state, and so every RunAhead or netplay rollback, put back an
incomplete sound chip or CPU, and the game went on differently from the
run that never loaded: the audio of the Mega Drive based boards, Neo Geo
and the YM2203 games diverged, and on the 6809 games the game itself.

OPN chips (sound/fm.c):
- The reset sets the L/R pan of all the channels (0xb4-0xb6) and clears
  0x30-0xb2 without storing them in REGS; the postload rewrites REGS, so
  a channel the game never panned itself was muted after a load (the DAC
  of the Bare Knuckle games). The reset values are now in REGS (YM2203,
  YM2608, YM2610, YM2612), and the YM2612 DAC select too.
- The postloads of the YM2608 and YM2610 skipped 0xb6 (pan, AMS, PMS of
  the 3rd channel of each bank), as the YM2612 one did before.
- The chip recomputes its phase steps and envelope rates only when a
  register asks for it, so they can lag behind the registers (e.g. after
  a 3 slot mode change). They are now saved as they are, with the key
  codes and the LFO step, instead of being remade from the registers. The
  YM2612 and YM2610 extra state is one shared block (OPN_EXT), now also
  used by the YM2203, which had none.
- The YM2612 DAC value is saved as it is: before the first write it is 0,
  which is not what the register gives (aladmdb).
- YM2610: the extra FM and SSG state was opt-in (only zn.c asked for it);
  it is now always saved (Neo Geo). The opt-in FM timers stay as they were.

SSG (sound/ay8910.c): the periods of the SSG of a YM chip are saved as they
were made; the register rewrite of the postload remade them with the
current clock. The YM2203 now saves the SSG extra state too.

MultiPCM (sound/multipcm.c): the sample pointer of a voice was remade from
the registers at load, without the bank and with the sample number of now,
not of the key on; it is saved as its offset in the ROM. The release
counter is saved too (Star Wars Arcade).

6809 family: the M6809 did not save the accumulators (D), the HD6309 D and
W; the M6809, HD6309 and Konami did not save the cycles of an interrupt
taken outside the execute loop.


Claude-Session: https://claude.ai/code/session_01N3fzdsnzkQVtgYtYzqepjX

Co-authored-by: Claude <[email protected]>
2026-10-28 23:13:45 -04:00
zanacandClaude 9649c81834 Sega Mega Drive bootlegs in their own driver (drivers/megadriv_acbl.c), as in current MAME (#2175)
Phase 2.3/5 of the Sega VDP / segac2.c clean-up: the coin-op bootlegs of
Mega Drive games move from drivers/segac2.c to drivers/megadriv_acbl.c,
with the board variants of current MAME, and the nine new sets we have
the ROMs for are added. The Mega Drive part stays shared with the other
Mega Drive based boards (includes/segac2.h).

- Moved: aladmdb, barek2ch, barek3mb, jparkmb, sonic2mb, sonic3mb,
  twinktmb (titles as in current MAME). Same code paths as before: frames
  and audio identical to the previous build.
- New: barekch, barek2mb, barek3mba, biohzdmb, bk3ssrmb, mk3mdb, srmdb,
  srssf2mb, ssf2mdb.
- The board variants of MAME: the version register, 6 button pads (MAME's
  TH counter with the 1.5ms timeout), the 3rd I/O port coins, the DIP
  switches at 0x770070 of the scrambled boards (and the coins at 0x770078
  of biohzdmb), the 6MB linear map of ssf2mdb, the PIC16C57 of barek2mb (emulated, with its latches; the
  68000 byte writes reach both halves of the bus as on the real CPU; T0
  is not connected), the simulated PIC of barek3mba.
- The new sets take V-INT / H-INT through the VDP interrupt enables, as on
  the real hardware (mk3mdb took a V-INT before its RAM vector was set
  and crashed); the moved sets keep the old mode.
- Big-endian hosts: the descrambling of the bootlegs uses BYTE_XOR_LE,
  and the PIC program of barek2mb is put in the host order the PIC core
  fetches its opcodes in.
- Mega Drive VDP: in H32 mode the sprite table base uses bit 0 of
  register 5 (AT9), as on the real VDP and in MAME; it was always masked
  as in H40 (ssf2mdb sets 0x6d in H32: the fighters were missing; the sprites
  of mt_bbros were garbled).
- PIC16C5x core: the PC wraps at the end of the program memory (the 2K
  parts start at 0x7ff and ran past the ROM), and the save states no
  longer register the ports and STATUS through R.picRAM before it is set
  (a NULL pointer: saving a game with a PIC crashed). They are in the data
  RAM, saved with the CPU memory.
- Save states: the pad, frame counter and PIC latch state.
- Metadata: mame2003-plus.xml (the bootleg entries regenerated),
  CHANGELOG.md.


Claude-Session: https://claude.ai/code/session_01N3fzdsnzkQVtgYtYzqepjX

Co-authored-by: Claude <[email protected]>
2026-10-28 23:10:27 -04:00
mahoneyt944 0e919473ca Add files via upload 2026-10-28 19:36:32 -04:00
arcadez2003 fa9eea238c Merge pull request #2173 from grant2258/Makefile
Makefile (Auto-Dependency Generation)
2026-10-28 20:59:25 +00:00
arcadez2003 ad755f06ad Merge pull request #2172 from grant2258/fixit
add Sky Robo and Big Fighter mcu support
2026-10-28 20:36:18 +00:00
Grantonius maximus 5b5d6f8a23 update gitignore 2026-10-28 20:33:19 +00:00
Grantonius maximus faa5ddf4e9 Makefile (Auto-Dependency Generation) 2026-10-28 20:32:18 +00:00
Grantonius maximus 46f354464a i dont want meee gold 2026-10-28 20:22:55 +00:00
Grantonius maximus 3b41adc749 add Sky Robo and Big Fighter mcu support 2026-10-28 20:19:28 +00:00
arcadez2003 bdfdc977c2 Mention Sky Robo / Tatakae! Big Fighter now works + credits 2026-10-28 20:05:19 +00:00
arcadez2003 5e593b6462 Sky Robo / Big Fighter fix MCU commands grant2258 2026-10-28 19:55:37 +00:00
zanacandClaude da7b539232 Sega Mega-Tech in its own driver (drivers/megatech.c), as in current MAME (#2170)
Phase 2.2/5 of the Sega VDP / segac2.c clean-up: the Mega-Tech BIOS,
memory maps, inputs, machine drivers, ROMs and game drivers move from
drivers/segac2.c to drivers/megatech.c. The Mega Drive part stays shared
with the other Mega Drive based boards (includes/segac2.h); genesis_base
now starts from the plain cartridge map, each board sets its own.

- Sets, ROM names and dumps as in current MAME (good dumps of mt_bbros,
  mt_ggolf, mt_gng and mt_tetri), the instruction ROMs in the cart at
  0x300000, titles and years as in current MAME.
- The Master System carts run on the Mega Drive in Mark III mode, as in
  current MAME: the 68000 is off, the sound Z80 runs the cart with the
  Sega mapper, 8KB of RAM, the PSG and the VDP in mode 4 (the 315-5313
  variant of the 315-5124 core of MAME). Astro Warrior, Great Golf,
  Shinobi, After Burner and Parlour Games work; Great Soccer is a bad
  dump (as in MAME).
- The BIOS cart slots as in current MAME (the CXD1095 port E slot select,
  the banked RAM per slot, the 0x6000 bank latch and the 0x8000 window
  into the cart): the menu lists the cart in slot 1 only, not in all 8.
- The BIOS display: the 315-5246 224 line mode the menu uses (the MENU
  title was cut), drawn line by line, its own palette levels.
- The Mega Drive VDP line timing and partial updates count its own lines
  below the BIOS screen (segavdp line_scale; 1 for the other boards).
- The H32 games are centred in the 320 pixel screen.
- Mega Play: the BIOS overlay is transparent on colour 0 of both its
  palettes and covers its borders, as in current MAME (the boot logo
  screen was behind a green background).
- Crash fix: the 68000 writes to 0xa02000-0xa03fff went to the Mega Play
  BIOS RAM pointer, NULL on the other boards (Great Golf crashed). The
  Mega Play handler moves to drivers/megaplay.c.
- Save states: the Mega-Tech BIOS, the slots and the Mark III mode state.
- Metadata: mame2003-plus.xml (Mega-Tech entries regenerated), CHANGELOG.md.


Claude-Session: https://claude.ai/code/session_01N3fzdsnzkQVtgYtYzqepjX

Co-authored-by: Claude <[email protected]>
2026-10-28 15:22:08 -04:00
zanacandClaude eb11c10f08 Sega Mega Play in its own driver (drivers/megaplay.c), as in current MAME (#2168)
Phase 2.1/5 of the Sega VDP / segac2.c clean-up: the Mega Play BIOS, memory
maps, inputs, machine driver, NVRAM, ROMs and game drivers move from
drivers/segac2.c to drivers/megaplay.c. The Mega Drive part (68000, sound
Z80, I/O chip, interrupts, sound interfaces, pads) stays shared with the
other Mega Drive based boards and is declared in includes/segac2.h; the
Mega Play interrupt acknowledge is enabled through genesis_enable_iack().

- Set names as in current MAME: mp_twc is now mp_twcup, the BIOS version 2
  ROM is epr-a15294.ic2; new clone mp_gaxe2a (Golden Axe II, original
  revision), as in MAME.
- The Mega Play save state registrations move with the BIOS; the unused
  BIOS variables (bios_game, bios_6204, bios_6402) are removed.
- Metadata: driver.c, mame2003-plus.xml (Mega Play entries regenerated),
  catver.ini, history.dat, CHANGELOG.md.


Claude-Session: https://claude.ai/code/session_01N3fzdsnzkQVtgYtYzqepjX

Co-authored-by: Claude <[email protected]>
2026-10-28 15:00:00 -04:00
mahoneyt944 b3328713bb segas32 fix priority for dbzvrvs and f1lap (#2169) 2026-10-28 14:43:44 -04:00
arcadez2003 7ec7d077f2 Merge pull request #2167 from zanac/sega-vdp
Phase 1: the Sega Mega Drive VDP (315-5313) as a shared module
2026-10-28 14:13:14 +00:00
arcadez2003 5c6f346782 Come back to it later 2026-10-28 12:49:34 +00:00
arcadez2003 51e87e8a46 FFS Forgot this 2026-10-28 12:41:15 +00:00
arcadez2003 6926b424a6 Attempt to get the main and prot MCU's talking :) 2026-10-28 12:27:07 +00:00
Claude 122405bb79 Sega VDP (315-5313) as a module shared by System C/C2, Mega-Tech, Mega Play and System 18
The Mega Drive VDP was part of the System C/C2 video code and System 18 used
it through file-static state and a few flags, so a change for one board could
reach the others. It is now a module, vidhrdw/segavdp.c:

- all its state is in one struct, cleared at every start;
- each user starts it with its own configuration (struct segavdp_interface):
  where the CRAM writes go (paletteram16, or the 64 System 18 colors set
  directly at 0x1800), the initial palette bases, the scanline base of the
  partial updates, the initial display enable, whether register 12 resizes
  the screen, and the interrupt callback for writes to registers 0/1;
- the boards use accessors (segavdp_get_reg, segavdp_set_palbank, ...);
- vidhrdw/segac2_vidhrdw.c keeps only the C/C2, Mega-Tech, Mega Play and
  bootleg video glue, vidhrdw/segas18.c the System 18 one.

Fixed on the way (state left over from a previous game in the same process):
the display enable and the Mega Play interrupt-acknowledge/HBLANK mode
(now also reset by the C/C2 machine init). The window X
position/width and the VBLANK flag are now in the save states. The dead
ddcrew/aquario VDP kludges of the old System 18 video are removed.

Save states loaded in a new instance (netplay, RunAhead with a second
instance) now continue exactly as the instance that saved them:
- Mega Drive based boards (drivers/segac2.c): the Z80 RAM and bus state
  (running flag, bank latch) and the Mega-Tech / Mega Play BIOS registers
  and RAM were not saved (mp_gunhe and mp_mazin went out of sync);
- sound/sn76496.c: the PSG had no save state at all;
- sound/fm.c: the YM2612 postload read the DAC enable from register 0x2d
  instead of 0x2b (the DAC channel was lost or computed as FM after a load).

Co-Authored-By: Claude Opus 5.5 <[email protected]>
Claude-Session: https://claude.ai/code/session_01N3fzdsnzkQVtgYtYzqepjX
2026-10-28 09:51:57 +01:00
arcadez2003 f51acae279 terraf_io_w 2026-10-28 00:43:49 +00:00
arcadez2003 02beadf6c1 hmmmmm 2026-10-28 00:30:19 +00:00
arcadez2003 c542bf7d24 Forgot cant share via port io's in this core 2026-10-28 00:11:52 +00:00
arcadez2003 4d19fd28b8 Adjust the MCU mem and port loading 2026-10-28 00:05:49 +00:00
arcadez2003 34bf3c28c6 Merge pull request #2165 from zanac/cotton
Sega System 18 and Cotton from current MAME
2026-10-27 23:41:19 +00:00
arcadez2003 ca185b19ad skyrobo and bigfghtr 2026-10-27 19:55:15 +00:00
arcadez2003 a2960b3fca Support Sky Robo / Tatakae! Big Fighter hook up I8071 MCU
With thanks to AdvanceMAME

MAME WIP

0.182: Dumped i8751 MCU for Sky Robo / Tatakae! Big Fighter and added basic hookup to make it work - Game now playable. Fixed screen refresh rate in Tatakae! Big Fighter [Team CAPS0ff, Angelo Salese]. Fixed service switch and updated DIPS/inputs with locations and content to match those showing on screen and observation [Tafoid]. Added debug code for initial area and promoted game to working [Angelo Salese]. Clocks verified for Sky Robo / Tatakae! Big Fighter [Guru]. Documented DACs for clone Tatakae! Big Fighter (Japan) [AJR]. Added I8751 (8MHz) CPU3. Changed VSync to 59.314620 Hz.

0.142u2: Angelo Salese merged Tatakae! Big Fighter driver into ArmedF driver.

0.141u1: Changed Z80 CPU2 clock speed to 4MHz.

0.140u3: Angelo Salese fixed service mode and removed ROM patches in clone 'Tatakae! Big Fighter'. Changed description of clone 'Tatakae! Big Fighter' to 'Tatakae! Big Fighter (Japan)'.

0.113u2: Stefan Lindberg added 'Sky Robo' (Nichibutsu 1989).

0.86: Tomasz Slanina added 'Tatakae! Big Fighter' (Nichibutsu 1989). TODO: Scroll, controls and dips.

15th August 2004: Tomasz Slanina - Tatatake! Big Fighter preliminary driver (based on my old one). Game doesn't work due to protection (RAM shared with 8751 MCU).

1st September 2003: Tomasz Slanina - VERY preliminary Tatake! Big Fighter driver. Unemulated protection (MCU). Only attract mode is working. Partially...
2026-10-27 19:51:44 +00:00
Claude 7d3a3547e3 Sega System 18 and Cotton from current MAME (FD1094 sets, mapper, VDP, save states)
Cotton (System 16B): the FD1094 sets cotton, cottonu, cottonj and cottonja
now run, with the decryption of machine/fd1094.c (from Moonwalker), and the
missing bootlegs cottonud, cottonjd and cottonjad are added. The dummy
cotton/cottona of system16.c are removed.

System 18: the games run on the 315-5195 mapper layout each of them sets
(read from MAME), the segaic16 video and the VDP layer, as in MAME's
segas18.cpp:
- Alien Storm (astorm, astorm3, astormu, astormj and bootlegs), Bloxeed
  (bloxeed, bloxeeda, bloxeedd), Clutch Hitter (cltchitr, cltchitrj and
  bootlegs), D. D. Crew (the six FD1094 sets and their bootlegs, 4 players
  through the 8255), Desert Breaker (desertbr, desertbrj and bootlegs),
  Laser Ghost (lghost, lghostu, lghostj and bootlegs, light guns through
  the MSM6253, MAME's gun offset correction), Wally wo Sagase! (wwallyj,
  wwallyja, wwallyja3p and bootlegs, uPD4701 trackballs), Shadow Dancer
  (shdancer, shdancerj, shdancer1, were shdancer, shdancrj, shdancrb).
- 171-5987 ROM board: ROM 1 at 200000, tile and sprite banking, 1MB and
  2MB program ROMs; fd1094.c decrypts several address windows.
- The VDP layer shows one frame after the other layers, as in MAME, and the
  VDP sees the VBLANK (VIDEO_EOF of segac2) for its partial updates.
- astormbl, shdancbl, moonwlkb, aquario, hamaway and mwalk are unchanged.

Save states (RunAhead, netplay):
- System 16B: uPD7759, sound ROM bank, segaic16 tilemap and sprite banks,
  flip, scroll latches, display enable.
- System 18: RF5C68 (registers and wave RAM), YM2612/YM3438 (envelope and
  LFO counters, key, frequencies, algorithm memory, FM timer overflow time;
  the postload also rewrites the b6/1b6 registers), sound ROM bank, VDP
  layer, mapper and I/O registers.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
Claude-Session: https://claude.ai/code/session_01N3fzdsnzkQVtgYtYzqepjX
2026-10-27 11:53:07 +01:00
markwkidd 993403d033 Merge pull request #2159 from markwkidd/cpu-clock-core-options
Add a CPU Clock Scale core option for each CPU
2026-10-26 16:20:17 -04:00
zanacandClaude Opus 5.5 64b3c38ac6 Sound: 0-100 volume standard for the mixer and samples, fix filter.c float build (#2164)
- sample_set_volume()/sample_set_stereo_volume() take 0-100 like the
  mixer. The 0-255 callers are converted with identical results; Sea Wolf
  II and Thief get the full volume they meant, and the Sea Wolf II dive
  channels (always silent) work as in MAME 0.264.
- The mixer clamps volumes, mixing levels and default levels to 0-100.
  The old 0-255 default level conversion is removed; the drivers that
  used it get its result (25) explicitly. Buggy Boy's doubled YM2149 gain
  is kept with a doubled mixing level.
- filter.c: the non-integer build did not compile and scaled the
  coefficients twice; both builds now divide by the gain.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
Claude-Session: https://claude.ai/code/session_013Vje3pEtpLHubqCGwCgoQX
2026-10-26 13:31:46 -04:00
markwkidd 42176a69d1 Fix discrete adjuster ports and defaults (#2161) 2026-10-26 03:51:14 -04:00
bbb49d84d7 PSX GPU: 11-bit signed coordinates for rectangles, sprites, lines and dots (#2162)
Soul Calibur draws the attract transitions (the windows that open from
the title screen onto the next scene, and the wipes before each demo)
with rectangles whose coordinates only make sense as 11-bit signed
values. The core took them as 16-bit values, so the rectangles were
drawn in the wrong place or not at all, and the new scene showed
through white or washed out instead of in full colour.

As in current MAME (S11_COORD_X / S11_COORD_Y), rectangles, 8x8 and
16x16 sprites, lines and dots now take 11-bit signed coordinates, like
the polygons already did. The frame buffer fill (GP0 02h) keeps its
unsigned coordinates.


Claude-Session: https://claude.ai/code/session_01MEgow1uRCv8pxMErKhmoHZ

Co-authored-by: Vanni Brutto <[email protected]>
Co-authored-by: Claude Opus 5.5 <[email protected]>
2026-10-26 03:49:56 -04:00
markwkidd 79a4e690a4 Update descriptions for core resolution options (#2155) 2026-10-26 03:48:57 -04:00
Mark W. Kidd 75f4dbb1d9 Name the romset in the CPU Clock Scale core option keys 2026-10-25 22:53:22 -04:00
arcadez2003 fd95cd4b28 Mention Heavy Unit and new code contributors 2026-10-25 23:39:17 +00:00
Mark W. Kidd e0815b5b43 Add a CPU Clock Scale core option for each CPU 2026-10-25 19:26:21 -04:00
arcadez2003 f584d820f6 Merge pull request #2158 from sunlollyking/model1-tgp-names
Model 1: rename the TGP's fadd, fsub, fmul, fdiv and fsqrt
2026-10-25 23:23:45 +00:00
arcadez2003 d373dcb4b1 New ones 2026-10-25 22:35:19 +00:00
Chris 0c777d48e6 Model 1: rename the TGP's fadd, fsub, fmul, fdiv and fsqrt
glibc declares fadd, fsub, fmul, fdiv and fsqrt in math.h for C23, and
GCC 15 builds as C23 by default, so the static TGP functions of the same
names conflict with them and model1_machine.c no longer builds. They are
tgp_fadd and so on now.
2026-10-25 22:33:44 +00:00
arcadez2003 8a0a74c79f Merge pull request #2154 from libretro/arcadez2003-patch-8
Add the two missing games to the Cave CV1000 driver
2026-10-25 22:31:03 +00:00
arcadez2003 4060e4c8e1 Hush Hush On The QT 2026-10-25 22:29:56 +00:00
arcadez2003 1f8b8b71b1 Try again another time 2026-10-25 22:15:46 +00:00
arcadez2003 ae45f94fc9 Revert for now 2026-10-25 22:15:04 +00:00
arcadez2003 e7b2e2706c FFS 2026-10-25 22:08:32 +00:00
arcadez2003 cf8d7da002 Update YGV608 namcond1 video code to MAME 113 part 2 2026-10-25 21:48:53 +00:00
arcadez2003 bbf2784396 Update YGV608 namcond1 video code to MAME 113 2026-10-25 21:47:29 +00:00
arcadez2003 7a361d0dad Merge pull request #2156 from zanac/mariner-sound
Mariner / Triple Punch: AY-8910 clock of current MAME, new clones; Galaxian/Scramble hardware save states
2026-10-25 21:09:21 +00:00