424 Commits

Author SHA1 Message Date
Henrik Rydgard
6702f0c78c Tiny optimization and bugfix 2013-03-07 00:47:48 +01:00
Henrik Rydgard
963a6603fc Fix two armjit bugs the testrunner found. 2013-03-07 00:37:00 +01:00
Henrik Rydgard
a69b09a831 More work on TestRunner, now runs all the CPU tests. 2013-03-07 00:22:39 +01:00
Sacha
94a11ef3c0 Armjit: Implement movn, movz 2013-03-07 04:11:48 +10:00
Sacha
87de6be239 Fix the shift regs in ARM JIT that were causing graphical issues in some games. Set avoidload flag. 2013-03-07 02:39:28 +10:00
Sacha
d77632bfb0 Fix literal pools on games with very large code blocks (eg. Zero no Kieski).
Was flushing after an offset of 4088 which did not take in to account that a single MIPS instruction can turn in to numerous ARM instructions. Chose a safer value of 4020.
Was insta-flushing after reaching this offset value. Some code blocks are over 8K in size. Use a partialFlushOffset to keep track of when the next flush is required.
Was protecting flush branch manually. Can use B_CC(CC_AL) for this instead.
2013-03-07 02:25:27 +10:00
Sacha
8125d96ce1 Small update for shifted load/stores. Still disabled. 2013-03-07 01:04:41 +10:00
Sacha
a8b6fca61b Separate codepaths for shifted load/stores and normal load/stores. Fix dirty regs. 2013-03-07 00:59:07 +10:00
Sacha
ae3b881a7f Use correct args for Operand2(..) through armjit. Fix STR(..). 2013-03-07 00:59:07 +10:00
Sacha
268d16bd24 Use correct args for STR(..) throughout armjit. 2013-03-07 00:59:07 +10:00
Sacha
23fb88c5fe Enable optimisation codepath (left+right combines). 2013-03-07 00:59:07 +10:00
Henrik Rydgard
9f327985fc armjit: disable lwl/lwr/swl/swr 2013-03-05 23:09:26 +01:00
Sacha
5a134243a7 Armjit: Fix lwl, lwr and enable again. Thanks Sonic. 2013-03-06 03:28:28 +10:00
Sacha
7e67de3334 Armjit: Implement lwl, lwr, swl, swr in ARM JIT. lwr is currently disabled as it isn't working. 2013-03-06 02:11:36 +10:00
Sacha
9152d2f2bb Armjit: Optimise swl+swr and lwl+lwr cases that can be combined to a single sw or lw. Add shift flags to STR/LDR. Add EatInstruction to ArmJit. 2013-03-06 02:11:36 +10:00
Sacha
33c6df55db Build fix 2013-03-05 15:20:14 +10:00
Sacha
65a83d70c7 Armjit: Implement clo as well. Fix up the reg usage in div/divu comment. 2013-03-05 15:14:22 +10:00
Sacha
60b84e71d5 Armjit: Re-enable reg shifts. Thanks [Unknown] for finding the issue. 2013-03-05 14:55:33 +10:00
Sacha
4641cf376f Armjit: Implement CLZ instruction. Disable reg shifts for now (breaks Wipeout Pure). 2013-03-05 14:16:35 +10:00
Sacha
4a56ebd0a0 Armjit: Add sllv, srlv, srav instructions (reg shift). 2013-03-05 13:52:03 +10:00
Sacha
10ad797c6d Armjit stubs.
Add a double encoding for VCVT. Implement integer divide (but not working yet). Stubs for msub/msubu. Don't detect vfpv3 on Symbian.
2013-03-05 13:16:08 +10:00
Henrik Rydgard
3714eebbbe Actually register scePspNpDrm_user 2013-03-04 23:54:03 +01:00
Henrik Rydgard
062c975b46 Ignore cache function 24. 2013-03-04 23:51:19 +01:00
Sacha
d5feb4d3ff Quick build fix 2013-03-05 03:13:33 +10:00
Sacha
1089a31a45 Armjit: add reverse bit instruction. 2013-03-05 02:58:51 +10:00
Sacha
bce3295950 Fix graphical issues. DISABLE INS instruction for now. Fix OR (it was doing AND). 2013-03-04 22:09:45 +10:00
Unknown W. Brackets
f4bde1a263 Android / iOS buildfix. 2013-03-04 00:09:37 -08:00
Unknown W. Brackets
ac1209204c Add some reporting for CPU related stuff. 2013-03-04 00:01:41 -08:00
Sacha
0fc6b60874 Fix Lit Pools for cases where offset goes out of range. For example: Zero no Kiseki has a block that is 7K large. 2013-03-04 14:36:23 +10:00
Sacha
9633239f18 Update for lit pools. Works in some games now thanks to [Unknown]. 2013-03-04 14:29:17 +10:00
Sacha
bdfe24a86b ARMv6 literal pool method. 2013-03-04 14:26:45 +10:00
Henrik Rydgard
165cfe53a3 Quick ins bugfix 2013-03-04 00:06:33 +01:00
Henrik Rydgard
7dc75d87b5 armjit: Re-enable ext/ins, safer implementation. arm7 path disabled for now. 2013-03-03 23:17:21 +01:00
Henrik Rydgard
1cddc86e05 armjit: Temporarily disable ext/ins as they appear to have broken Persona 3 somehow. 2013-03-03 22:26:20 +01:00
Henrik Rydgard
1e3a00ee9d armjit: implement vzero, vone. Use vmla for dot product. 2013-03-03 20:56:22 +01:00
Henrik Rydgard
650c02c3a5 Some more armjit work (ext, ins) and VFPU prefix clamps (not enabled) 2013-03-03 17:36:22 +01:00
Henrik Rydgard
3c640a0f1e armjit: seb and seh instructions 2013-03-03 15:29:13 +01:00
Henrik Rydgard
bc15617392 Make un-buffered rendering much smarter, removing flicker.
This turns it into a very viable option for many games. You do lose some FX
but it can as a result even be used as a workaround for the massive glow
in Wipeout...
2013-03-03 13:00:21 +01:00
Unknown W. Brackets
ab05149dbf Add a few more CONDITIONAL_DISABLEs. 2013-03-03 01:44:33 -08:00
Unknown W. Brackets
d647816d10 Add CONDITIONAL_DISABLE to all armjit funcs. 2013-03-03 01:40:55 -08:00
Unknown W. Brackets
a3f93ed203 Fix some printf size warnings, signed warnings. 2013-03-02 15:34:15 -08:00
Sacha
f8d7c024e5 Fix for 'sf' 2013-03-03 06:53:39 +10:00
Henrik Rydgård
3ec581b624 Merge pull request #838 from xsacha/master
Armjit update
2013-03-02 12:46:46 -08:00
Sacha
2d5783eb7f ARMJIT: Compare functions are now jitted. 2013-03-03 06:45:21 +10:00
Unknown W. Brackets
a2aa5fe23e Fix iOS / debug ARM build. 2013-03-02 11:27:11 -08:00
Henrik Rydgard
f5581caccc Some work on ARMJIT FPU compares, still not quite working. 2013-03-02 19:09:24 +01:00
Sacha
6c23e1b6d5 Use flags instead of bools for VCVT. Fix up some spacing. Only Android has ArmEmitterTest. 2013-03-02 11:34:03 +10:00
Henrik Rydgard
253396666c Merge branch 'armjit-fpu' of github.com:hrydgard/ppsspp into armjit-fpu 2013-03-01 18:26:36 +01:00
Sacha
0ca7b2a794 The cvt.s.w has to be signed (as it was before). Also, implement f,sf but untested so it is left commented out. 2013-03-01 16:55:10 +10:00
Sacha
26ebdb4f11 Improve VCMP instruction with option for E.
Add comment to le JIT about how the VCMP crashes on ARM11, with commented code.
2013-03-01 15:41:45 +10:00