Commit Graph

157836 Commits

Author SHA1 Message Date
Marek Olšák
6e4ff8b3a8 radeonsi: don't flush asynchronously for fence_server_signal
See the comment.

Fixes: 21b3a234 - mesa: fix SignalSemaphoreEXT behavior

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>
(cherry picked from commit da68678171072747ff1ee784dcf901cad2c98d62)
2022-09-26 13:11:09 -07:00
Lionel Landwerlin
ed090af4dc anv: clear descriptorsets if AllocateDescriptorSets fails
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7285
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18719>
(cherry picked from commit 369c12e5be3b0d009688082319c8386265056e17)
2022-09-26 13:11:09 -07:00
Marcin Ślusarz
c0c5ced0d5 intel/compiler: remove second shading rate lowering for mesh
It's already called in brw_postprocess_nir and calling it the second time
actually breaks shading rate.

Initially, when I added this call here in 9acb30c8c4, I was testing it
on an internal tree, which didn't have brw_nir_lower_shading_rate_output call
in brw_postprocess_nir.

Fixes: 9acb30c8c4 ("intel/compiler: implement primitive shading rate for mesh")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18702>
(cherry picked from commit cfd1e5a91e57a8a2ed7b6dfe9a07c5ef46ddc28f)
2022-09-26 13:11:06 -07:00
Mike Blumenkrantz
26c82a7e7e st/drawpixels: use normalized coords in samplers with lowered rects
cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18614>
(cherry picked from commit a96151f64533e0d6c7134aafcc10f0cdf87227ac)
2022-09-26 10:13:54 -07:00
Mike Blumenkrantz
66ab591a07 st/bitmap: use normalized coords in samplers with lowered rects
cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18614>
(cherry picked from commit 25c36c5caf1637f24d33d8e18b78fbaf7f178aff)
2022-09-26 10:13:54 -07:00
Mike Blumenkrantz
aff9edc12f zink: fix atomic ssbo fadd offsets
Fixes: 99a4a9c6ff0 ("zink: fix atomic ssbo indexing with non-32bit values")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18684>
(cherry picked from commit e13e139bcbd4f34ff16d99ee63caef6187d9451a)
2022-09-26 10:13:54 -07:00
Mike Blumenkrantz
553e016cff zink: fix/relax resolve geometry check
there's no requirement in the spec that the geometry for resolves must match,
only that the geometry must be positive (i.e., no flipped extents)

this avoids major perf issues for scaled resolves

cc: mesa-stable

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18364>
(cherry picked from commit 513fcb793600056b421b5528325d192e7e23a328)
2022-09-26 10:13:54 -07:00
Dave Airlie
548b18003a lavapipe: fix 3d depth stencil image clearing.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18665>
(cherry picked from commit 9452e5e03ad777057790d94cce84343e953a5177)
2022-09-26 10:13:54 -07:00
Mike Blumenkrantz
6393e4b32c zink: make void clears more robust
void clears are intended to be the first clear applied to a surface,
so ensure that these don't clobber any scissored clears

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18627>
(cherry picked from commit 13a19ad90c4ea15aa169b31a8566d962a9970232)
2022-09-26 10:13:54 -07:00
Mike Blumenkrantz
95c92bacaf zink: split up get_clear_data()
make the array extension part reusable

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18627>
(cherry picked from commit d7c64ffcb8a55549d4d638eb7de7b21af4077a3f)
2022-09-26 10:13:53 -07:00
Gert Wollny
231bf2950e r600/sfn: Handle shifts on Cayman
Fixes: 00599f6e7161065c51812174ca18427b9867f63f
  r600/sfn: Schedule shift instruction on R600 in t-slot

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18619>
(cherry picked from commit 260cddf9ec20c3239187f3e0f73f5a886b3186bf)
2022-09-26 10:13:53 -07:00
Mike Blumenkrantz
409f2d2558 zink: fix atomic ssbo indexing with non-32bit values
this has to adjust using dest size, not hardcoded as uint32

Fixes: 5a95c6b328 ("zink: rewrite atomic ssbo intrinsics as atomic derefs")

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>
(cherry picked from commit 99a4a9c6ff09f4a326341432ca75f18ddcdc0bf8)
2022-09-26 10:13:53 -07:00
Mike Blumenkrantz
0acef65842 zink: uncap ssbo size
since the transition to UINT pipe cap, this no longer needs to be
restricted to appease gallium

fixes #7103

cc: mesa-stable

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>
(cherry picked from commit 96be036a6b521e45785f0ff53d983116c1f4db1d)
2022-09-26 10:13:53 -07:00
Qiang Yu
bf2c81b32e nir: fix nir_xfb_info buffer_to_stream length
Fixes: 19064b8c3a ("nir: Add a pass for gathering transform feedback info")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>
(cherry picked from commit 417cf031a09f942f4aaea9999cfa31f5afe122cd)
2022-09-26 10:13:53 -07:00
Yonggang Luo
7240cc553e drm-shim: drop gnu99 override
If we override with gnu99 here, we effectively down-grade from C11,
meaning we can no longer assume static_assert support.

Fixes: 45fb815a75 ("util: implement STATIC_ASSERT using c++11 / c11 primitives")

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Suggested-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18611>
(cherry picked from commit a9f3e011e5f14af4ac4ccd6e581b6ec7cd8b8554)
2022-09-26 10:13:53 -07:00
Dylan Baker
c2eef037c2 .pick_status.json: Update to 3730be9873d556918a20795b37399b7e2e9630b5 2022-09-26 10:13:53 -07:00
Martin Krastev
6f87f1996e meson: add svga gallium driver to 'auto' group on arm/aarch64
svga gallium driver is a good citizen on arm/aarch64 linux targets.
Enable that driver for -Dgallium-drivers=auto builds.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
(cherry picked from commit 6e311dd7229b2afb478e65afe2f17d7fb422d01e)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18256>
2022-09-26 09:39:17 +00:00
James Park
f297f05c67 meson,amd: Remove Windows libelf wrap
Functionality isn't worth the maintenance cost.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18797>
2022-09-25 03:13:14 +08:00
Dylan Baker
3da8d29132 docs: Add sha256 sum for 22.2.0 2022-09-21 09:17:10 -07:00
Dylan Baker
eb7995d61e docs: add release notes for 22.2.0 2022-09-21 09:17:00 -07:00
Dylan Baker
4ef98ce435
VERSION: update to 22.2.0 2022-09-20 14:01:37 -07:00
Charmaine Lee
5c4d90f1aa svga: fix invalid component access of domain location
Tesscoord is declared as vec3 in the incoming shader but the z component
of a tesscoord should only be referenced in the domain shader if the
tessellator domain is of triangle type.

Fixes vmx crash running GFXBench-Tessellation with MTL Renderer.

Reviewed-by: Martin Krastev <krastevm@vmware.com>
Reviewed-by: Min-Yu Huang <min-yuhuang@vmware.com>
(cherry picked from commit f73862d339fbeac14fe7e1e1dc9e73d3501e0c97)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18235>
2022-09-19 22:40:06 +00:00
Marek Olšák
b47e856216 ac/surface: disallow 256KB swizzle modes on gfx11 APUs
It doesn't work.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
(cherry picked from commit a6050a43cae57d4dcb8d3b7aaf05ce2b803bea26)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18500>
2022-09-16 22:16:16 +00:00
Mike Blumenkrantz
ab6ce72fd9 st_pbo/compute: fix 1D coord dimension by pre-trimming vectors
cc: mesa-stable

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18118>
(cherry picked from commit 2fa5afd639d0431b6f38da09a3f33a23220004dd)
2022-09-15 14:45:43 -07:00
Mike Blumenkrantz
2adacf5594 st_pbo/compute: fix 1D_ARRAY offsets
these come in as yoffset, but the constant data must use 0 since the sampler
view is created with the offset

cc: mesa-stable

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18118>
(cherry picked from commit cd07a0002f10869136aa61e59f9bbcdb02d1a2d6)
2022-09-15 13:59:21 -07:00
Riteo
242b498115 vulkan/device_select_wayland: fix a memory leak with DRM device handling
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18076>
(cherry picked from commit 163390d762ba45c285d0ccafcbdd68f760d9b640)
2022-09-15 11:12:44 -07:00
James Zhu
20886cf572 amd/common: some ASICs with gfx9 use compute rings for render
Some ASICs with gfx9 use compute rings for render.

Fixes: 983223de5d - ac/gpu_info: use the kernel-reported
GFX IP version to set gfx_level

-v2: update merge requests num

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18553>
(cherry picked from commit fe8e18c7824b35ac83a6c0da50d4b01728675bb0)
2022-09-15 10:59:46 -07:00
Rob Clark
91ccbb017e freedreno: We really don't need aligned vbo's
The logic was inverted, we don't need aligned for later gens.

Fixes: 60912f1ebd ("freedreno: we don't need aligned vbo's")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18605>
(cherry picked from commit 2664d59aeec72da8608611860ab6a9e2d944922a)
2022-09-15 10:59:45 -07:00
Dylan Baker
8c36939dd6 .pick_status.json: Update to 3d4c36a3bcc51ed441b2667d92291bea30ef7449 2022-09-15 10:59:39 -07:00
Mike Blumenkrantz
a021a38f5e zink: handle split acquire/present
if the swapchain image is acquired in a different cmdbuf than it gets
presented with, the acquire semaphore will have already been submitted
by this point, and the swapchain should be flagged as such

cc: mesa-stable

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18557>
(cherry picked from commit db192c08837300fe7017195effe047379c69dd96)
2022-09-15 10:15:59 -07:00
Connor Abbott
5b6aa0c7ee tu: Don't preload variable-count descriptors
We don't know how many descriptors will actually be valid, which could
lead to preloading descriptors out-of-bounds of the descriptor size.
This was leading to GPU hangs on some tests once we enabled inline
uniforms.

Fixes: d9fcf5de55 ("turnip: Enable nonuniform descriptor indexing")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17960>
(cherry picked from commit 15f3274ea6150ee1b778b9e891269692496cab19)
2022-09-15 10:15:58 -07:00
Danylo Piliaiev
da97b8a0e1 ir3: Prevent reordering movmsk with kill
`kill` changes which fibers are active, thus reodering instructions
which depend on which fibers are active - is wrong.

The issue was hidden because only `ballot(true)` is translated to movmsk
immidiately, while others are passed as MACRO and don't properly
take part in ir3_sched (which does the reordering).

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7162

Fixes CTS test (on gen3+):
 dEQP-VK.spirv_assembly.instruction.terminate_invocation.terminate.subgroup_ballot

Fixes: b1b80c06a7
("ir3: Implement nir subgroup intrinsics")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18413>
(cherry picked from commit 33e60798e144c6638343486371462e5522f3afd4)
2022-09-15 10:15:58 -07:00
Eric Engestrom
fbc7e23afd broadcom: fix dependencies in static_library() calls
The first argument is the name of the library, and the second argument
is the list of files; those two got a bit mixed up.

Fixes: 1ae8018a6a ("meson: Add support for the vc4 driver.")
Fixes: 4f3e380fa0 ("meson: Add support for the vc5 driver.")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18593>
(cherry picked from commit 5bfca00d318e8fdbe6914fc358d24af983086f15)
2022-09-15 10:15:56 -07:00
Yiwei Zhang
6e574e2c81 venus: ignore pInheritanceInfo if not secondary command buffer
TEST: no segfault in dEQP-VK.api.command_buffers.bad_inheritance_info_random

Fixes: 6f5289df53 ("venus: refactor VkCommandBufferBeginInfo fixups to function")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18583>
(cherry picked from commit e9b995ecf4b1590023083580133a4c5e4ab72416)
2022-09-15 10:15:55 -07:00
Pierre-Eric Pelloux-Prayer
4698093aff radeonsi: invalidate L2 when using dcc stores
This is only needed on chips with tcc_rb_non_coherent=1.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7084
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18494>
(cherry picked from commit 07a520f73168b1ee49e4baa68751b4e5a4c0d6ab)
2022-09-15 10:15:55 -07:00
Pierre-Eric Pelloux-Prayer
6ce21ce910 mesa: avoid reading back textures from VRAM
This can be very slow on dGPU.

I tried a different version that would allocate a full row
and then do a single memcpy per row but the performance
was similar so I kept the simple version.

Cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18484>
(cherry picked from commit a5b1a811053eef74e8e0353ebbe2bb9c68e5c26b)
2022-09-15 10:15:54 -07:00
Alyssa Rosenzweig
2c56768a2f panfrost: Respect buffer offset for OpenCL
This is so dumb. Panfrost port of d98b82a103 ("iris/cs: take buffer offsets
into account for CL")

Fixes buffer.sub_buffers_read_write

Fixes: 80b90a0f2b ("panfrost: Implement panfrost_set_global_binding")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Suggested-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18560>
(cherry picked from commit b4dd1b8916d95576fb7277e96f1c3a1e5afc126d)
2022-09-15 10:15:54 -07:00
Erik Faye-Lund
4de1373cc4 docs/zink: document rgtc requirement
OpenGL 3.0 requires RGTC support, and until we have emulation in place,
we should document that requirement.

Fixes: d50e8554b9 ("zink: add feature-documentation")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18549>
(cherry picked from commit 3454ff21e59446a5371bb85749707d3a1cec9805)
2022-09-15 10:15:53 -07:00
Samuel Pitoiset
d30ddb0406 radv: fix pipelineStageCreationFeedbackCount when it's 0
From the Vulkan spec 1.3.227:

    "If pipelineStageCreationFeedbackCount is not 0,
     pPipelineStageCreationFeedbacks must be a valid pointer to an
     array of pipelineStageCreationFeedbackCount
     VkPipelineCreationFeedback structures."

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18513>
(cherry picked from commit 28af93ace7b4a5d7dfd1cbfa6ab14ffcb86ad6ba)
2022-09-15 10:14:49 -07:00
Timur Kristóf
f0dc4ee1cd nir/gather_info: Clear cross-invocation output mask.
Similar to how other I/O info is cleared at the beginning
of gather_info we should also clear the cross-invocation
mesh shader output mask.

Fixes: 112a856813
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18464>
(cherry picked from commit e58a5cca0293ab10ec327debf85175901d027478)
2022-09-15 09:25:43 -07:00
Yiwei Zhang
ac210811e8 zink: fix in-fence lifecycle
For in-fence handling, dri2 has this below sequence in a row:
1. create_fence_fd: import external fence fd
2. fence_server_sync: import the pipe fence into the driver ctx
3. fence_reference: deref the created pipe fence

Before this change, zink pushed the wrapped external semaphore to the
wait semaphores of the next batch but the followed fence_reference will
destroy the imported semaphore immediately. Instead of extending the
lifecycle of the pipe fence throughout the batch state, we can simply
transfer the semaphore ownership to the batch and destroy it upon batch
reset.

Fixes: 32597e116d ("zink: implement GL semaphores")

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18453>
(cherry picked from commit 6d1e214238276e86e979cebef7eb4c8982a357ea)
2022-09-15 09:25:42 -07:00
Yiwei Zhang
a861f9a0b2 zink: fix zink_create_fence_fd to properly import
This change fixes below:
1. Dup the fence fd, otherwise, since external semaphore import takes
   the ownership of the fd, non-Vulkan part touches the fd leading to
   undefined behavior. This can be hit on implementations that defer
   the processing of the passed fd.
2. Use VK_SEMAPHORE_IMPORT_TEMPORARY_BIT for importing since that's
   required for SYNC_FD handle type because of its copy transference.
   Meanwhile, doing temporary import for opaque fd is fine in this path.

Fixes: 32597e116d ("zink: implement GL semaphores")

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18453>
(cherry picked from commit c1b827d6a25527ae61dd0c102c5cc3f6e42dc90a)
2022-09-15 09:25:42 -07:00
Mike Blumenkrantz
4813bc413e zink: flag all assigned output slots as mapped
this ensures types which consume more than 1 slot are effectively tagged
so that the next stage inputs are also assigned properly

fixes:
spec@arb_enhanced_layouts@execution@component-layout@vs-fs-array-dvec3

cc: mesa-stable

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18444>
(cherry picked from commit a0f6fecc6afeccc8e149ab31769df8b5225faa16)
2022-09-15 09:25:41 -07:00
Karol Herbst
fc8ba10f73 nv50: properly flush the TSC cache on 3D
The change didn't make any sense. `s` will always be
`NV50_SHADER_STAGE_COMPUTE`, because it's used to loop over all shader
stages. And the TSC cache on the compute side is already flushed in
`nv50_compute_validate_samplers`.

Fixes spurious `CACHE_ERROR` dmesg messages.

Fixes: ba6ba8c990 ("nv50: adapt texture and constbuf paths for compute shaders")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18382>
(cherry picked from commit 54709efd5e34a06ef8d518fe7635f6ae345bef40)
2022-09-15 09:25:41 -07:00
Karol Herbst
9478d1be89 nv50/ir: fix OP_UNION resolving when used for vector values
When an OP_UNION def takes part in a vector source e.g. for a tex
instruction we failed to clean up the OP_UNION instruction as rep() points
towards the coalesced value instead.

This fixes a regression on nv50 moving to NIR, but also potentially issues
with nvc0.

The main reason this is common in nv50 is, that we lower OP_SLCT to a set,
predicated movs and a union.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6406
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7117
Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18377>
(cherry picked from commit b23b94fbc9201368398823ccdc633cf1fa60127c)
2022-09-15 09:25:40 -07:00
Mark Collins
842011a4bd tu: Clamp priority in DRM submitqueue creation
The kernel driver has a range of valid priority values that can
be supplied to it, submitting any priority value outside these
bounds will result in `-EINVAL`. To avoid this, the priority
value is now clamped to the range that the kernel supports.

Fixes: 0c6fbfca0c91ef012e8ab767a317c07f1f6dc5e6
Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18389>
(cherry picked from commit c82249aa6891e43398cc8d62d552869495292b31)
2022-09-15 09:25:39 -07:00
Bas Nieuwenhuizen
26b95ed403 amd/common: Disable DCC retile modifiers on RDNA1
Some claims of corruption, modifier-less Mesa already doesn't do
it. Since these modifiers have no purpose besides being displayed
lets just disable in Mesa.

Cc: mesa-stable

Tested-by: Michel Dänzer <mdaenzer@redhat.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18140>
(cherry picked from commit ae7532e0cce8b5987335aadda712f1dc3f8ad5e3)
2022-09-15 09:25:39 -07:00
Bas Nieuwenhuizen
36ac6a48b9 amd/common: Don't rely on DCN support checks with modifiers.
Going to be a bad time if they disagree, which is bound to happen
sometimes. Not asserting and stuff tends to be a better experience
than crashing.

Cc: mesa-stable

Tested-by: Michel Dänzer <mdaenzer@redhat.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18140>
(cherry picked from commit af4b656817700ddcd4a26fdbf19a7b6dbbcd7738)
2022-09-15 09:25:38 -07:00
Jordan Justen
314d56e9b8 intel/pci_ids: Drop non-upstream dg2 pci-ids
These pci-ids should be included in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14523, since
these pci-ids will only be supported by kernels that support the
forked Linux uapi. (Note that !14523 will never be merged into
upstream Mesa.)

Ref: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/drm/i915_pciids.h?h=v6.0-rc3#n695
Fixes: 398a9be94b ("intel/dev: Enable remaining DG2 and ATS-M device IDs")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18386>
(cherry picked from commit b26980a4d40a9c04666d9ef1299c7c037cf15ede)
2022-09-15 09:25:38 -07:00
Iván Briano
4b3daadae0 anv: pipelineStageCreationFeedbackCount is allowed to be 0
Fixes: 6601e5d6fc ("anv: implement VK_EXT_pipeline_creation_feedback")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18451>
(cherry picked from commit 92ee2e6b64369d3bdcb44e99e5a318588129950b)
2022-09-15 09:25:37 -07:00