107 Commits

Author SHA1 Message Date
Jeffrey Walton
8edc5cf2d5
Add "cc" clobber due to GCC 3.3 compile failure 2018-12-29 00:09:59 -05:00
Jeffrey Walton
29d1c1772d
Fix missing ExtendedControlRegister when CRYPTOPP_DISABLE_ASM
Also see https://github.com/noloader/cryptopp-cmake/issues/44
2018-12-28 12:19:13 -05:00
Shmueli Englard
fc87f8666a Add check for VS version and ExtendedControlRegister (PR #766) 2018-12-21 19:54:24 -05:00
hygonsoc
6dfb428f10 Add Hygon Dhyana support to enable RDRAND/RDSEED/ADX/AVX2 Feature (PR #765)
Hugh, interesting.

Thank you very much.

Ping @randombit. Botan may want or need this, too.
2018-12-20 17:33:16 -05:00
Jeffrey Walton
0aa217b91c
Update comments in config.h
Some comments in config.h were old. Time for a refresh.
Switch from CRYPTOPP_BOOL_ARM64 to CRYPTOPP_BOOL_ARMV8. Aarch32 is ARMv8, and that's the important part.
2018-12-09 10:24:55 -05:00
Jeffrey Walton
3e909c13d4
Add IBM XLC init priority support 2018-11-30 08:23:35 -05:00
Jeffrey Walton
af7cdcdbec
Update documentation 2018-11-30 05:57:02 -05:00
Jeffrey Walton
3db34abf2f
Add Power9 Random Number Generator support (GH #747, PR #748) 2018-11-27 02:54:26 -05:00
Jeffrey Walton
cc5eb3919f
Fix compile using SunCC 5.9 2018-11-08 15:08:30 -05:00
Jeffrey Walton
5c3532597a
Whitespace check-in 2018-08-20 01:33:09 -04:00
Jeffrey Walton
082ad86132
Fix missing _xgetbv for Visual Studio 2008 and below 2018-08-19 10:19:29 -04:00
Jeffrey Walton
048c2721fb
Remove unneeded defines from cpu.cpp 2018-08-08 20:55:00 -04:00
Jeffrey Walton
9ff731824b
Prepare for POWER8 carryless multiplies using vpmsum 2018-08-06 05:40:38 -04:00
Tanzinul Islam
da00422d3c Fix build with Embarcadero C++Builder 10.2.3 (#696)
Fix two compilation errors encountered with C++Builder (Starter Edition):

 - In `cpu.cpp`, 0ccdc197b introduced a dependency on `_xgetbv()` from `<immintrin.h>` that doesn't exist on C++Builder. Enlist it for the workaround, similar to SunCC in 692ed2a2b.

 - In `adv-simd.h`, `<pmmintrin.h>` is being #included under the `CRYPTOPP_SSE2_INTRIN_AVAILABLE` macro. This header, [which apparently provides SSE3 intrinsics](https://stackoverflow.com/a/11228864/1433768), is not shipped with C++Builder. (This section of code was recently downgraded from a SSSE3 to a SSE2 block in 09c8ae28, followed by moving away from `<immintrin.h>` in bc8da71a, followed by reintroducing the SSSE3 check in d1e646a5.) Split the SSE2 and SSSE3 cases such that `<pmmintrin.h>` is not #included for SSE2. This seems safe to do, because some `git grep` analysis shows that:
    - `adv-simd.h` is not #included by any other header, but only directly #included by some `.cpp` files.
    - Among those `.cpp` files, only `sm4-simd.cpp` has a `CRYPTOPP_SSE2_INTRIN_AVAILABLE` preprocessor block, and there it again includes the other two headers (`<emmintrin.h>` and `<xmmintrin.h>`).

NOTE: I was compiling via the IDE after [setting up a project file](https://github.com/tanzislam/cryptopals/wiki/Importing-into-Embarcadero-C%E2%94%BC%E2%94%BCBuilder-Starter-10.2#using-the-crypto-library). My compilation command was effectively:

```
bcc32c.exe -DCRYPTOPP_NO_CXX11 -DCRYPTOPP_DISABLE_SSSE3 -D__SSE2__ -D__SSE__ -D__MMX__
```
2018-08-04 22:54:36 -04:00
Jeffrey Walton
692ed2a2bb
Fix SunStudio compile on Solaris 2018-07-15 19:24:55 -04:00
Jeffrey Walton
4e3a1ea962
Add ARMv8.4 cpu feature detection support (GH #685) (#687)
This PR adds ARMv8.4 cpu feature detection support. Previously we only needed ARMv8.1 and things were much easier. For example, ARMv8.1 `__ARM_FEATURE_CRYPTO` meant PMULL, AES, SHA-1 and SHA-256 were available. ARMv8.4 `__ARM_FEATURE_CRYPTO` means PMULL, AES, SHA-1, SHA-256, SHA-512, SHA-3, SM3 and SM4 are  available. 

We still use the same pattern as before. We make something available based on compiler version and/or preprocessor macros. But this time around we had to tighten things up a bit to ensure ARMv8.4 did not cross-pollinate down into ARMv8.1.

ARMv8.4 is largely untested at the moment. There is no hardware in the field and CI lacks QEMU with the relevant patches/support. We will probably have to revisit some of this stuff in the future.

Since this update applies to ARM gadgets we took the time to expand Android and iOS testing on Travis. Travis now tests more platforms, and includes Autotools and CMake builds, too.
2018-07-15 08:35:14 -04:00
Jeffrey Walton
7a67e43b27
Fix Apple feature detection (GH #685) 2018-07-14 08:40:06 -04:00
Jeffrey Walton
d11a7b3436
Add ARMv8 CPU feature queries (GH #685)
CPU feature probes are still outstanding. They are going to be trickier because if CRYPTOPP_XXX_FEATURE_AVAILABLE
2018-07-14 08:20:16 -04:00
Jeffrey Walton
517d552a91
Add ARMv7 cpu detection 2018-07-08 02:49:21 -04:00
Jeffrey Walton
0ccdc197b7
Add AVX and AVX2 runtime feature detection (GH #671)
There are no corresponding defines in config.h at the moment. Programs will have to use the preprocessor macros __AVX__ and __AVX2__ to determine when they are available.
2018-06-18 18:33:17 -04:00
Ilja
8d81492f88 Remove extra ; from cpu.cpp (PR #614) 2018-03-31 13:10:11 -04:00
Jeffrey Walton
69915e1755
Remove double CRYPTOPP_SECTION_INIT for g_hasSSE2
Also change to a single declaration per line. The multiple declarations got to be messy
2018-03-27 23:19:26 -04:00
Jeffrey Walton
1c60f6480f
Fix Windows compile error using VS2008 2018-03-27 20:38:26 -04:00
Jeffrey Walton
af6b96c78b
Whitespace check-in 2018-03-22 00:20:45 -04:00
Jeffrey Walton
f589de0839
Rework Glibc sysconf code
It looks like the 0 return value for _SC_LEVEL1_DCACHE_LINESIZE is not a 1-off problem with PPC. It appears Glibc regularly returns 0 instead of failure. Also see https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/posix/sysconf.c.
We were OK before the change. The difference now is, we expect all Glibc queries to misbehave
2018-03-21 16:19:43 -04:00
Jeffrey Walton
ddf9e70234
Fix Power7 test using PPC_FEATURE_ARCH_2_06 2018-03-21 00:35:56 -04:00
Jeffrey Walton
04e361889e
Add CPU feature queries for AIX
Also see the discussion at https://github.com/noloader/POWER8-crypto
2018-03-20 23:52:10 -04:00
Fabrice Fontaine
f7f13c70c8 Define AT_HWCAP/AT_HWCAP2 if getauxval unavailable (#594)
If CRYPTOPP_GETAUXV_AVAILABLE is undefined, getauxval function is
defined to return 0 however AT_HWCAP and AT_HWCAP2 are not defined so
compilation on toolchain without getauxval and these variables such as
uclibc-ng will fail.

Signed-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com>
2018-03-04 09:17:03 -05:00
Jeffrey Walton
51db9eb436
Clear clang-tidy warnings 2018-01-24 20:04:16 -05:00
Jeffrey Walton
788cd1794d
Use x86 highest basic before calling a leaf function
This was a latent bug that just surfaced on a Sun Core2 workstation. RDSEED caused an illegal instruction exception on the Core2. It seems we managed to miss it because old processors had family and stepping values so low they never set CPUID.EBX.RDSEED[bit 18] = 1. Newer processors had the feature so CPUID.EBX.RDSEED[bit 18] = 1 was accurate.
2018-01-11 17:59:24 -05:00
Jeffrey Walton
43a34590a9
Add Altivec detection for PowerMac
We now need to detect Altivec/Power4. Formerly it did not matter so CPU_QueryAltivec simply returned false
2017-12-13 11:49:35 -05:00
Jeffrey Walton
a5bf962681
Fix target misdetection on OS X with '-arch i386'
This tested OK on Linux OS X, Solaris and Windows. It may break things under IBM XL C/C++. We will cross that bridge when we get to it.
2017-11-16 19:37:29 -05:00
Jeffrey Walton
bd41c3d5dd
Remove SSE2 from cpu.cpp, add sse-simd.cpp
We need to ensure SSE2 does not cross pollinate into other CPU functions since SSE2 is greater than the minimum arch. The minimum arch is i586/i686, and both lack SSE2 instructions
2017-11-16 15:11:51 -05:00
Jeffrey Walton
8b52a03d08
Fix SunCC 12.2 compiler crash with GCM_Xor16_SSE2
SunCC 12.3 through 12.5 still cannot handle CLMUL, though. It would be nice if Sun fixed the regression.
2017-11-16 02:38:53 -05:00
Jeffrey Walton
91b8d85f4c
Fix SunCC compile with -xarch=sse2
Fix copy/paste messages in cryptest.sh
2017-11-13 19:10:15 -05:00
Jeffrey Walton
bf717f47e6
Reduce C++ file scope class objects
Update comments and documentation
2017-11-12 11:55:57 -05:00
Jeffrey Walton
7ba8c6bc81
Cleanup Altivec and Power7 code paths
This changes the dependency from Altivec to Power7. Internally we needed Power7 but it was cut-in as a pseudo Altivec dependency. Also see http://groups.google.com/forum/#!topic/cryptopp-users/fmEKOG41SG8
2017-10-17 22:50:45 -04:00
Jeffrey Walton
f1a80e6a58
Detect XSAVE/XRESTORE OS feature support (GH #521)
This avoids the probe for SSE2 in most circumstances. The SSE2 test is mostly benign nowadays since SSE2 and OS support is nearly ubiquitous. But the define CRYPTOPP_NO_CPU_FEATURE_PROBES added for Apple OSes was interacting badly on x86 machines. Also see GH #511.
2017-10-12 20:14:21 -04:00
Jeffrey Walton
3bd01f73ba
Add Power8 SHA256 and SHA512 support (GH #513) 2017-09-22 08:58:50 -04:00
Jeffrey Walton
6102333fc3
Add CRYPTOPP_NO_CPU_FEATURE_PROBES (GH #511)
We determine machine capabilities by performing an os/platform *query* first, like getauxv(). If the *query* fails, we move onto a cpu *probe*. The cpu *probe* tries to exeute an instruction and then catches a SIGILL on Linux or the exception EXCEPTION_ILLEGAL_INSTRUCTION on Windows. Some OSes fail to hangle a SIGILL gracefully, like Apple OSes. Apple machines corrupt memory and variables around the probe.
2017-09-19 21:08:37 -04:00
Deadpikle
723d87c9b5 Make sure _SC_LEVEL1_DCACHE_LINESIZE is defined (#507) 2017-09-17 14:34:05 -04:00
Jeffrey Walton
3e237540fe
Query sysconf for _SC_LEVEL1_DCACHE_LINESIZE on ARM and PPC 2017-09-17 02:39:41 -04:00
Jeffrey Walton
a835443b34
Fix compile on CentOS 6 with GCC 4.7
The system uses Glibc 2.12, which is below 2.16 required for getauxv
2017-09-17 00:41:48 -04:00
Jeffrey Walton
da0dc66952
Route Borland/Embarcadero into MS inline ASM code for CPUID
The inline ASM code now uses local variables to save the EAX-EDX registers, and then copies the locals into the function parameters. It side steps problems with calling conventions
2017-09-16 18:03:24 -04:00
Jeffrey Walton
2814842b97
Switch to CRYPTOPP_CONSTANT for cpu flags 2017-09-16 01:21:14 -04:00
Jeffrey Walton
5296e087ad
Fix func/subfunc parameter names (GH #502) 2017-09-16 00:19:14 -04:00
Jeffrey Walton
173a7a8025
Fix compile under Embarcadero (GH #498)
[bcc32 Error] cpu.cpp (131): E2211 Inline assembly not allowed in inline and template functions
2017-09-15 12:42:50 -04:00
Jeffrey Walton
172ab40874
Fix missing closing paren for Android Aarch64 (GH #491) 2017-09-13 07:32:08 -04:00
Jeffrey Walton
6e1a07025c
Build Android cpu-features from sources (GH #491)
Thanks to Deadpikle for suggesting the strategy
2017-09-13 07:16:41 -04:00
Jeffrey Walton
b255bf26ec
Fix missing cpu-features.h for Android 2017-09-13 04:18:04 -04:00