xemu/hw/mips
Huacai Chen c3173a35bc hw/mips: Add CPU IRQ3 delivery for KVM
Currently, KVM/MIPS only deliver I/O interrupt via IP2, this patch add
IP3 delivery as well, because Loongson-3 based machine use both IRQ2
(CPU's IP2) and IRQ3 (CPU's IP3).

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Co-developed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Message-Id: <1588501221-1205-4-git-send-email-chenhc@lemote.com>
2020-06-01 13:28:21 +02:00
..
addr.c Include hw/hw.h exactly where needed 2019-08-16 13:31:52 +02:00
boston.c mips/boston: Plug memory leak in boston_mach_init() 2020-05-27 07:45:44 +02:00
cps.c qdev: set properties with device_class_set_props() 2020-01-24 20:59:15 +01:00
fuloong2e.c hw/mips/fuloong2e: Fix typo in Fuloong machine name 2020-05-26 13:20:48 +02:00
gt64xxx_pci.c hw: replace hw/i386/pc.h with a header just for the i8259 2019-12-17 19:33:49 +01:00
jazz.c hw/mips: Rename malta/mipssim/r4k/jazz files 2020-05-26 13:21:12 +02:00
Kconfig hw/mips/fuloong2e: Fix typo in Fuloong machine name 2020-05-26 13:20:48 +02:00
Makefile.objs hw/mips: Rename malta/mipssim/r4k/jazz files 2020-05-26 13:21:12 +02:00
malta.c Error reporting patches for 2020-05-27 2020-05-28 11:21:30 +01:00
mips_int.c hw/mips: Add CPU IRQ3 delivery for KVM 2020-06-01 13:28:21 +02:00
mipssim.c hw/mips: Rename malta/mipssim/r4k/jazz files 2020-05-26 13:21:12 +02:00
r4k.c hw/mips: Rename malta/mipssim/r4k/jazz files 2020-05-26 13:21:12 +02:00
trace-events hw/mips/gt64xxx: Remove dynamic field width from trace events 2019-11-19 14:46:01 +01:00