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Author	SHA1	Message	Date
ptitSeb	49a854fa7e	[INTERPRETER] Fixed potential issue with 0F A3 opcode	2024-11-16 13:44:36 +01:00
ptitSeb	5adabbbcaa	[ARM64_DYNAREC] Small optim in emit_sar8c helper	2024-11-16 13:23:23 +01:00
ptitSeb	42eae3e1b4	Expose a few more CPU features	2024-11-16 12:48:12 +01:00
ptitSeb	518d2b0129	Removed a debug leftover	2024-11-16 12:19:14 +01:00
ptitSeb	bc8c786b80	Smal adjustment in singal handling for no-execution error	2024-11-16 12:16:51 +01:00
Yang Liu	5ab8a6f6f4	[WRAPPER] Fixed myStackAlignGVariantNew and refined the test too (#2038)	2024-11-15 21:37:36 +01:00
ptitSeb	385a31ec11	[ARM64_DYNAREC] Various fixes and improvments to a few random opcodes	2024-11-15 21:05:41 +01:00
ptitSeb	5c49954f69	[DYNAREC] Zero'd upper 32bits of regs when switching to 32bits from 64bits	2024-11-15 21:05:06 +01:00
ptitSeb	6ce7a1ba1f	[INTERPRETER] Zero'd upper 32bits of regs when switching to 32bits from 64bits	2024-11-15 21:03:59 +01:00
ptitSeb	8c1335626f	[ARM64_DYNAREC] A few fixes to 8/16bits logic/math opcodes	2024-11-15 15:34:22 +01:00
ptitSeb	8b0eec097b	[TRACE] More info on signal	2024-11-15 15:34:00 +01:00
ptitSeb	a39c8aa5c5	[INTERPRETER] Some cleanup on base logic/math/shift operations	2024-11-15 14:37:16 +01:00
ptitSeb	27745ceebb	Added support for RDMSR, just in case	2024-11-15 14:36:42 +01:00
ptitSeb	64b213fe42	[ARM64_DYNAREC] Try to not call UpdateFlags when switching to a DFNONE state but dfnone is not needed	2024-11-15 14:27:43 +01:00
ptitSeb	eaca84e9ba	[ARM64_DYNAREC] Very small change on on emit_rol32c helper	2024-11-15 14:26:25 +01:00
xctan	bca0f4d66d	[RV64_DYNAREC] Added more MMX opcodes for vector (#2037) ... * [RV64_DYNAREC] Added 0F 74-76 PCMPEQB/W/D opcodes * [RV64_DYNAREC] Added 0F 64-66 PCMPGTB/W/D opcodes * [RV64_DYNAREC] Added 0F E1-E2 PSRAW/D opcodes * [RV64_DYNAREC] Added 0F 6E MOVD opcode * [RV64_DYNAREC] Added 0F 73 /2 PSRLQ opcode * [RV64_DYNAREC] Added 0F 73 /6 PSLLQ opcode	2024-11-15 10:11:11 +01:00
ptitSeb	8c17a37d1a	[ARM64_DYNAREC] Reworked 8/16/32/64bits TEST opcodes	2024-11-14 18:54:40 +01:00
xctan	979a3232f9	[RV64_DYNAREC] Added more MMX opcodes for vector (#2035) ... * [RV64_DYNAREC] Added 0F 68 PUNPCKHBW opcode * [RV64_DYNAREC] Added 0F 69 PUNPCKHWD opcode * [RV64_DYNAREC] Added 0F 6A PUNPCKHDQ opcode * [RV64_DYNAREC] Updated 0F 68-69 PUNPCKHBW/WD opcodes * [RV64_DYNAREC] Added 0F 60 PUNPCKLBW opcode * [RV64_DYNAREC] Added 0F 61 PUNPCKLWD opcode * [RV64_DYNAREC] Added 0F 62 PUNPCKLDQ opcode * [RV64_DYNAREC] Simplified MMX PUNPCK{L,H}{BW,WD,DQ}	2024-11-14 17:41:28 +01:00
Yang Liu	47dbbe030c	[DYNAREC] Added a experimental BOX64_DYNAREC_WEAKBARRIER option (#2033) ... * [DYNAREC] Added a experimental BOX64_DYNAREC_WEAKBARRIER option * Added it to the RCFILE	2024-11-14 17:41:12 +01:00
ptitSeb	d05e719ce3	[ARM64_DYNAREC] Refactor 8/16/32/64bits CMP and REP CMPS/SCAS opcodes	2024-11-14 16:43:01 +01:00
Leslie Zhai	12f4afcba2	[LA64] Implement convert x64_va_list_t to sysv_varargs for float (#2025) (#2031) ... * [LA64] Implement convert x64_va_list_t to sysv_varargs for float (#2025) * [LA64] Implement myStackAlignGVariantNew (#2025) * [LA64] Limit the log to LOG_DEBUG (#2055) * [LA64] Add missing file (#2025)	2024-11-14 16:01:36 +01:00
ptitSeb	cd2638d11a	[ARM64_DYNAREC] Some refactor on 8/16/32/64bits SHL/SHR/SAR opcodes	2024-11-14 15:00:58 +01:00
ptitSeb	c87796e51c	[ARM64_DYNAREC] Minor change on 16bits neg opcode	2024-11-14 12:43:30 +01:00
ptitSeb	d47b555e12	[ARM64_DYNAREC] Some rework on 8/16/32/64 INC/DEC opcodes	2024-11-14 11:20:57 +01:00
Yang Liu	4e568e1fdf	Minor adjustments to README, updated README_CN (#2032)	2024-11-14 11:15:36 +01:00
Diego q	0688c53675	Update README.md (#2022) ... * Update README.md I made it more readable to the normal human being, kept all important info, rewrote everything to make it cleaner, and re-organized a few things, let me know if you want anything extra added * Update README.md Added And Fixed Some things as requested * Update README.md Fixed Everything Requested	2024-11-14 08:11:01 +01:00
ptitSeb	6d523f9c7f	[ARM64_DYNAREC] Small optim for 8/16/32/64bits adc/sbb opcodes	2024-11-13 20:00:02 +01:00
ptitSeb	0f4f274bc7	[ARM64_DYNAREC] Various small fixes for some 16bits math/logic opcodes	2024-11-13 19:48:44 +01:00
xctan	09b8c3b94e	[RV64_DYNAREC] Added more MMX opcodes for vector (#2027) ... * [RV64_DYNAREC] Added 0F D5 PMULLW opcode * [RV64_DYNAREC] Added 0F E5 PMULHW opcode * [RV64_DYNAREC] Added 0F F5 PMADDWD opcode * [RV64_DYNAREC] Added 0F 6B PACKSSDW opcode * [RV64_DYNAREC] Added 0F 63 PACKSSWB opcode * [RV64_DYNAREC] Added 0F 67 PACKUSWB opcode * [RV64_DYNAREC] Removed useless vsetvli in MMX PACKUSWB/SSWB/SSDW	2024-11-13 19:43:57 +01:00
ptitSeb	1dbb676f38	[ARM64_DYNAREC] Reworked 8/16/32/64bits XOR opcodes	2024-11-13 18:46:47 +01:00
ptitSeb	331866bd1d	[ARM64_DYNAREC] Fixed previous commit	2024-11-13 18:32:43 +01:00
ptitSeb	2515096f56	[ARM64_DYNAREC] Reworked 8/16/32/64 OR opcodes	2024-11-13 17:34:21 +01:00
ptitSeb	8868023ce9	[ARM64_DYNAREC] Reworked 8/16/32/64bits AND opcodes	2024-11-13 17:12:03 +01:00
ptitSeb	dd9d6f8f83	[ARM64_DYNAREC] Small change in sbb32 helper	2024-11-13 15:18:56 +01:00
ptitSeb	21e403c908	[WRAPPER] Added more callback slots for libwaylend-client	2024-11-13 14:39:08 +01:00
ptitSeb	f66aa57594	[ARM64_DYNAREC] Improved div/idiv opcode flags (non)handling	2024-11-13 14:38:14 +01:00
Yang Liu	506cb980b1	[RV64_DYNAREC] Prefer AMO* instructions over LR/SC when possible (#2028) ... * [RV64_DYNAREC] Prefer AMO* instructions over LR/SC when possible * fixes	2024-11-13 14:22:25 +01:00
ptitSeb	937e2cf853	[ARM64_DYNAREC] Improved 32/64bits imul/mul opcodes flags handling	2024-11-13 13:31:32 +01:00
xctan	82bf71ee19	[RV64_DYNAREC] Added more MMX opcodes for vector (#2026) ... * [RV64_DYNAREC] Added 0F F8-FB PSUBB/W/D/Q opcodes * [RV64_DYNAREC] Added 0F E8 PSUBSB opcode * [RV64_DYNAREC] Added 0F D8-D9 PSUBUSB/W opcodes * [RV64_DYNAREC] Added 0F F1-F3 PSLLW/D/Q opcodes * [RV64_DYNAREC] Added 0F E9 PSUBSW opcode * [RV64_DYNAREC] Added 0F EB POR opcode * [RV64_DYNAREC] Added 0F DB PAND opcode * [RV64_DYNAREC] Added 0F DF PANDN opcode * [RV64_DYNAREC] Added 0F EF PXOR opcode * [RV64_DYNAREC] Optimized rvv MMX PSLLW/D/Q	2024-11-13 11:04:43 +01:00
xctan	eb9e7b9fee	[RV64_DYNAREC] Added more MMX opcodes for vector (#2024) ... * [RV64_DYNAREC] Added 0F D1-D3 PSRLW/PSRLD/PSRLQ opcode * [RV64_DYNAREC] Added 0F EC PADDSB opcode * [RV64_DYNAREC] Added 0F DC-DD PADDUSB/PADDUSW opcode * [RV64_DYNAREC] Added 0F FC-FE PADDB/PADDW/PADDD opcodes * [RV64_DYNAREC] Added 0F ED PADDSW opcode * [RV64_DYNAREC] Added 0F 7F MOVQ opcode * [RV64_DYNAREC] Fixed some typos * [RV64_DYNAREC] Optimized RVV MMX PSRLW/D/Q to a mask-less version	2024-11-13 10:08:16 +01:00
Yang Liu	b02942c0b0	[RV64_DYNAREC] Made eflags emulation branchless with xtheadcondmov (#2019) ... * [RV64_DYNAREC] Made eflags emulation branchless with xtheadcondmov * more	2024-11-11 19:53:55 +01:00
Yang Liu	56e813ccb7	[RV64_DYNAREC] Added more MMX opcodes for vector (#2017) ... * [RV64_DYNAREC] Added more MMX opcodes for vector * fixed	2024-11-11 12:29:55 +01:00
Yang Liu	cf5b94d471	[CORE][LA64] Check LASX and display its existence (#2016)	2024-11-10 17:41:31 +01:00
ptitSeb	5d941f702a	Preserve errno on mmap / munmap speicifc memory traqking operations	2024-11-10 11:09:33 +01:00
ptitSeb	b46925e7e0	[WRAPPER] Added wrapped libXaw with new wrapperhelper (for #1990)	2024-11-09 18:36:27 +01:00
ptitSeb	e676756cda	[DYNAREC] Small chnage o hotpage detection to make it less sensitive	2024-11-09 18:12:43 +01:00
ptitSeb	591958c59c	[RCFILE] advertise that BOX64_DYNAREC_TEST=1 is applied	2024-11-09 18:12:09 +01:00
ptitSeb	63a80ff696	This should fix LA64 Static build	2024-11-09 17:55:31 +01:00
ptitSeb	ee6e3a7a96	[WRAPPER] Added a bunch of libc wrapped functions (for #2010)	2024-11-09 16:13:18 +01:00
ptitSeb	1d607cb937	[ARM64_DYNAREC] A small optim for a specific case of 0F C6 opcode	2024-11-09 16:12:26 +01:00