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Author SHA1 Message Date
Alyssa Rosenzweig
2e0be0a5e7 OpcodeDispatcher: allow more upper garbage with adc 
missed this last series.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-26 15:42:13 -04:00
Alyssa Rosenzweig
d60c089697 OpcodeDispatcher: allow upper garbage with sbb 
for the usual reasons

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-26 15:35:14 -04:00
Alyssa Rosenzweig
e76ebeab58 OpcodeDispatcher: use 1-op "src + CF" 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-26 15:35:14 -04:00
Alyssa Rosenzweig
333271d490 OpcodeDispatcher: fuse sbb when flags calculated 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-26 15:35:14 -04:00
Alyssa Rosenzweig
a750870abf OpcodeDispatcher: use fused sbcs calculations 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-26 15:25:03 -04:00
Alyssa Rosenzweig
15db72ef60 IR: add Sbb, SbbWithFlags ops 
For fusing sbc+sbcs

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-26 15:25:03 -04:00
Ryan Houdek
9687ac51f0
Merge pull request #3424 from Sonicadvance1/safer_clone_stack_handling 
Linux: More safe stack cleanup for clone
 2024-02-26 06:59:27 -08:00
Alyssa Rosenzweig
5f16f357af
Merge pull request #3456 from alyssarosenzweig/opt/adc 
Optimize ADC
 2024-02-26 09:39:37 -04:00
Alyssa Rosenzweig
32a4abbea7
Merge pull request #3457 from alyssarosenzweig/bug/nzcv 
RedundantFlagCalculationElimination: fix missing NEG case
 2024-02-26 09:31:06 -04:00
Alyssa Rosenzweig
7deb4976a3 RedundantFlagCalculationElimination: fix missing NEG case 
can be predicated.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-25 17:37:16 -04:00
Alyssa Rosenzweig
2cfd71c159 InstCountCI: add dead ADC test 
nothing else covers this case

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-25 10:50:25 -04:00
Alyssa Rosenzweig
0f26780de0 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-25 10:50:25 -04:00
Alyssa Rosenzweig
1e153e0c81 OpcodeDispatcher: allow garbage with adcs 
for the usual reasons

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-25 10:50:02 -04:00
Alyssa Rosenzweig
6994fc3a01 IR,OpcodeDispatcher,JIT: fuse adcs flags 
The usual tricks, also requires introducing a bare adc op to optimize adcs to,
but we wanted that anyway!

Also support a zero source, so we can calculate "foo + CF" in one instruction to
optimize the "lock adc" cases.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-25 10:49:32 -04:00
Alyssa Rosenzweig
0ef72bf118
Merge pull request #3451 from Sonicadvance1/fix_zero_reg_regression 
Fixes zero register flag generation
 2024-02-24 21:08:49 -04:00
Alyssa Rosenzweig
49ca0e2181
Merge pull request #3452 from Sonicadvance1/dxvk_mgrr_hotblock 
Adds MGRR hottest block on render thread
 2024-02-24 21:07:25 -04:00
Ryan Houdek
947ae1c243
Adds MGRR hottest block on render thread 
Was about 7% CPU time in this looping block. Has some fairly obvious
performance improvements that can be done.
 2024-02-24 16:49:46 -08:00
Ryan Houdek
d703f3ccee
Fixes zero register flag generation 
Fixes 140976d322dc5e26c129d1e6448f25f6b2378341

Adds a unit test to ensure it keeps working.
 2024-02-24 16:32:25 -08:00
Ryan Houdek
d8a18687e8
Merge pull request #3443 from alyssarosenzweig/opt/add-too 
Fuse add + cmn -> adds
 2024-02-24 15:12:16 -08:00
Alyssa Rosenzweig
045549f166 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:55:07 -04:00
Alyssa Rosenzweig
80e632db8a OpcodeDispatcher: garbage collect 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
852e3c4e93 OpcodeDispatcher: fuse XADD 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
e86547bbcb OpcodeDispatcher: fuse INC 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
883cca2e8f OpcodeDispatcher: use AddWithFlags 
give it the same treatment we just gave sub.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
8540332520 IR: add AddWithFlags 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
df5bdefb8a OpcodeDispatcher: merge secondary ALU with primary ALU 
It's the same, stop copypasting. This gets our flag and arithmetic opts (current
and future) applied to secondary ALU too.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
3d1fb7701c OpcodeDispatcher: optimize sub 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
140976d322 OpcodeDispatcher: prep primary ALU for better flags 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
9a11d3b1a2 OpcodeDispatcher: fuse NEG 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
96e652879f OpcodeDispatcher: fuse DEC 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
cc1c1dd047 OpcodeDispatcher: return result from SUB flag calculate 
for fusion

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
c1d572951f OpcodeDispatcher: drop unused GenerateFlags_SUB arg 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
dd9d3264dd OpcodeDispatcher: smarten SUB flag generation 
we don't need the result, we can use subs and come out ahead in practice. also a
step towards better fusion

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
2aaf957ad8 RedundantFlagCalculationElimination: DCE as we go 
This is required to ensure single-iteration convergence with a sequence like:

  write C
  whatever = load C
  rmif C, whatever
  invalidate C

avoids regressing the "DEC dead" case with future work in the series.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
d459b2f9b5 IR: propagate 0 into sub 
now that we have to handle it, we may as well take advantage of it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
22ab7f2b3e IR: add SubWithFlags op (arm64 subs) 
with 8/16-bit handling to keep everything uniform.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
f7e32373ce JIT: allow #0 in sub 
turns into neg, this will be generated via SubWithFlags -> Sub opts.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
25d422e92b JIT: use GetZeroableReg for NZCVSelect 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
cfbeece09f JIT: use GetZeroableReg for CondAddNZCV 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
a597a09825 JIT: use GetZeroableReg for SubNZCV 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
99854ff310 JIT: add GetZeroableReg helper 
for inlining constant zeroes in applicable sources

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-24 15:54:49 -04:00
Alyssa Rosenzweig
44d1502b5a
Merge pull request #3450 from Sonicadvance1/vector_add_loop 
InstcountCI: Adds a vector addition loop from bytemark
 2024-02-24 15:54:44 -04:00
Ryan Houdek
c3c635e36e
InstcountCI: Adds a vector addition loop from bytemark 
This was interesting because it caught that we are failing loadstores
with reg+reg address generation on vectors.
 2024-02-24 03:44:02 -08:00
Ryan Houdek
7e2f20cabb
Merge pull request #3446 from neobrain/fix_gdb_source_map 
Syscalls: Fix SourcecodeMap generation for GDB JIT integration
 2024-02-24 02:46:45 -08:00
Tony Wasserka
3425b07711 Syscalls: Fix SourcecodeMap generation for GDB JIT integration 
This fixes a regression from 9dd715573, which accidentally changed the
filename and set up incorrect file opening flags.
 2024-02-24 11:00:23 +01:00
Ryan Houdek
9b93495d45
Merge pull request #3441 from Sonicadvance1/remove_signaldelegation_tls 
Moves SignalDelegator TLS tracking to the frontend
 2024-02-24 01:23:43 -08:00
Ryan Houdek
cf067994f3
Merge pull request #3440 from Sonicadvance1/addressing_limits 
InstcountCI: Adds addressing limitations to instcountci
 2024-02-24 01:09:22 -08:00
Ryan Houdek
0a64f8a9c5
Moves SignalDelegator TLS tracking to the frontend 
FEXCore doesn't need track the TLS state of the SignalDelegator, this is
a frontend concept.

Removes the tracking from the backend and keeps it in the frontend.
 2024-02-24 01:07:29 -08:00
Ryan Houdek
3ac7fe3f05
Linux: More safe stack cleanup for clone 
Previously: Would keep one clone thread's stack active for teardown
delaying.

With aggressive cloning and teardown, this was unsafe.
Only reap the stack when told it is safe to do so.
 2024-02-24 01:05:20 -08:00
Ryan Houdek
59ec88f48d
Merge pull request #3438 from Sonicadvance1/move_tls_allocation 
Moves JITSymbol allocation
 2024-02-23 14:49:04 -08:00