Magic-Mirror/capstone
1
0
Fork 0
mirror of https://github.com/capstone-engine/capstone.git synced 2024-12-14 00:49:53 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
1,901 Commits 13 Branches 41 Tags 111 MiB
e19490e8f7
Commit Graph

1901 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Nguyen Anh Quynh
e19490e8f7 arm: some load/store instructions writeback without bang letter. bug reported by @jabba2989 2015-01-21 20:03:21 +08:00
Nguyen Anh Quynh
b238628e37 Merge pull request #252 from aidanhs/aphs-fix-dummy-cs 
Set _detail in a dummy Cs, closes #251
 2015-01-21 06:46:32 +08:00
Aidan Hobson Sayers
dbeeaf7d64 Set _detail in a dummy Cs, closes #251 2015-01-20 20:04:52 +00:00
Josh
50c3823f50 - Fixed memory leak for cython disasm functions 2015-01-16 22:15:35 +08:00
Nguyen Anh Quynh
f2157deacc arm: in Thumb mode, ADC & SBC do not update flags. bug reported by @jabba2989 2015-01-13 22:18:05 +08:00
Nguyen Anh Quynh
e95a76611c x86: remove some instructions unsupported in 3.x version 2015-01-13 14:35:43 +08:00
Nguyen Anh Quynh
273c6f4a9e arm64 & sparc: fix some warnings reported by MSVC 2015-01-13 14:33:09 +08:00
Nguyen Anh Quynh
9a1238d353 suite: fix an compilation warning reported by MSVC on test_arm_regression.c 2015-01-13 14:21:15 +08:00
Nguyen Anh Quynh
25525fb20c x86: remove some instructions irrelevant for LOCK prefix in invalidPrefix() 2015-01-13 12:14:46 +08:00
Nguyen Anh Quynh
7de172d6ec x86: properly handle REP, REPNE & REPNZ prefixes 2015-01-13 12:04:19 +08:00
Andrew Wesie
29f41da4c2 x86: add more valid instructions for LOCK prefix 2015-01-13 12:04:12 +08:00
Nguyen Anh Quynh
5323128ed2 x86: check for invalid instructions with LOCK prefix 2015-01-13 12:04:02 +08:00
Nguyen Anh Quynh
18dfc1929d Merge branch 'v3' of https://github.com/aquynh/capstone into v3 2015-01-13 10:41:45 +08:00
Nguyen Anh Quynh
0c30daf749 arm64: BL & BLR do not read SP register 2015-01-13 10:41:18 +08:00
Nguyen Anh Quynh
78d640045c cython: fix incomplete array of bytes returned by CsInsn.bytes. bug reported by @secretsquirrel 2015-01-07 22:08:35 +08:00
Nguyen Anh Quynh
599b559455 x86: fix some compilation issues about missing instructions on CAPSTONE_X86_REDUCE setup 2014-12-31 10:42:16 +08:00
Maciej Szawlowski
2c24d88f89 fixed bug that prevented using md.detail = true and md.skipdata = true together 2014-12-31 10:33:05 +08:00
derrek
07526e989b arm: Thumb BL & BLX read ARM_REG_PC instead of ARM_REG_SP. 2014-12-30 10:47:04 +08:00
Nguyen Anh Quynh
c51e04fa97 x86: support CR9-CR15 registers 2014-12-27 23:56:14 +08:00
Nguyen Anh Quynh
db684b2398 arm: BL & BLX do not read SP, but PC register. issue reported by Der Rek 2014-12-27 16:26:42 +08:00
Nguyen Anh Quynh
7ca66a4982 bump package version to 3.0.1 2014-12-26 21:32:40 +08:00
Nguyen Anh Quynh
9f694cc934 x86: handle undocumented immediates for (v)cmpps/pd/ss/sd instructions 2014-12-26 17:54:11 +08:00
Nguyen Anh Quynh
d319c114db x86: more encodings for FXCH & FCOMP. also print LJUMP without * as prefix for Intel syntax. handle BOUND & FARCALL better 2014-12-26 16:49:10 +08:00
Nguyen Anh Quynh
5f8c4239c2 x86: add missing CR8-CR15 registers to arch/X86/X86DisassemblerDecoder.h 2014-12-25 01:12:56 +08:00
Nguyen Anh Quynh
2ac7941227 x86: handle REX properly for segment related instructions by ignoring REX.r entirely 2014-12-24 16:16:51 +08:00
Nguyen Anh Quynh
80959c9a25 code style 2014-12-24 16:03:10 +08:00
Nguyen Anh Quynh
094811415c x86: handle REX properly for x64 MMX related instructions by ignoring REX.b & REX.w entirely 2014-12-24 16:02:44 +08:00
Nguyen Anh Quynh
c9c3fdc3c9 arm64: print ADR with absolute address. bug reported by blackboxer123 2014-12-23 15:30:40 +08:00
Nguyen Anh Quynh
51754231b9 x86: check instruction size <=15 as soon as possible 2014-12-18 00:20:07 +08:00
Nguyen Anh Quynh
3539595183 x86: instruction length must be <= 15 2014-12-17 23:53:32 +08:00
Nguyen Anh Quynh
a3d689de51 x86: allow to mix REX & legacy prefix repeatedly in any order 2014-12-16 22:36:16 +08:00
Nguyen Anh Quynh
674db4c96f ppc: fix some compilation bugs when DIET mode is enable 2014-12-16 22:12:23 +08:00
Nguyen Anh Quynh
10ecdaef31 x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP 2014-12-16 22:04:07 +08:00
Nguyen Anh Quynh
145efa5be6 Merge branch 'next' into rex 2014-12-16 12:37:03 +08:00
Nguyen Anh Quynh
2537cfd669 python: fix a memory leak issue when we stop enumeration over the disassembled instructions prematurely. patch by Jan Newger 2014-12-16 00:09:40 +08:00
Nguyen Anh Quynh
58831e8d2c Merge branch 'next' into rex 2014-12-15 11:39:17 +08:00
Nguyen Anh Quynh
611b0c5c22 code style 2014-12-15 11:22:46 +08:00
Nguyen Anh Quynh
dfde75c379 Merge branch 'out_of_mem_fix' of https://github.com/nedwill/capstone into next 2014-12-15 11:20:32 +08:00
Edward Williamson
f1e497502c check malloc return value 2014-12-14 20:45:19 -05:00
Nguyen Anh Quynh
1016d3214d x86: only eliminate REX prefixes if next byte is not a legacy prefix 2014-12-13 10:27:56 +08:00
Nguyen Anh Quynh
1cbc222626 x86: eliminate redundant REX prefixes in front of x86_64 instruction. bug reported by Aurélien Wailly 2014-12-13 01:41:49 +08:00
Nguyen Anh Quynh
03a1836454 arm64: set absolute (rather than relative) address B/BL. issue reported by Pancake 2014-12-12 22:06:06 +08:00
Nguyen Anh Quynh
c2925e9034 x86: accept more than one REX prefix for x86_64. bug reported by Aurélien Wailly. thanks Ange Albertini for help 2014-12-12 18:31:31 +08:00
Nguyen Anh Quynh
073a3dd701 package: update Brew formula (copied from Homebrew repo) 2014-12-12 14:09:33 +08:00
Nguyen Anh Quynh
03fb6f357d x86: MOV32sm should reference word rather than dword. bug reported by Andrew Wesie 2014-12-12 11:51:35 +08:00
Nguyen Anh Quynh
1befd7584a x86: reverse the order of operands for alias instruction IMUL in Intel syntax. bug reported by Andrew Wesie 2014-12-12 11:40:59 +08:00
Nguyen Anh Quynh
9578185ad8 x86: add missing operands in detail mode for 'IN/OUT reg, reg' instructions. bug reported by Andrew Wesie 2014-12-12 11:25:12 +08:00
Nguyen Anh Quynh
2ce4da3726 x86: fix the last bug on PUSH/POP <segment> for ATT syntax 2014-12-12 10:44:58 +08:00
Nguyen Anh Quynh
b32515d622 x86: add missing operands in detail mode for PUSH/POP <segment> instructions. bug reported by Andrew Wesie 2014-12-12 10:40:15 +08:00
Nguyen Anh Quynh
5b981a4399 x86: also fix AT&T syntax for the last MOV32ms bug 2014-12-04 23:19:04 +07:00