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17870 Commits

Author SHA1 Message Date
Eric Christopher
a6fb14395f Some cleanup and optimize fallthrough more. 
llvm-svn: 130546
 2011-04-29 21:56:31 +00:00
Eli Friedman
7d05eaa3f4 Re-committing r130454, which does not in fact break anything. 
Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register.
rdar://problem/9338332 .

llvm-svn: 130539
 2011-04-29 21:22:56 +00:00
Eric Christopher
ba0cef1b0b Add trunc->branch support, this won't help with clang's i8->i1 truncations 
for bools, but is a start.

llvm-svn: 130534
 2011-04-29 20:02:39 +00:00
Daniel Dunbar
c52dfd4349 MCExpr: Add FindAssociatedSection, which attempts to mirror the 'as' semantics 
that associate sections with expressions.

llvm-svn: 130517
 2011-04-29 18:00:03 +00:00
Andrew Trick
88152ec6d2 Teach Thumb2 isel to fold and->rotr ==> ROR. 
Generalization of Nate Begeman's patch!

llvm-svn: 130502
 2011-04-29 14:18:15 +00:00
Benjamin Kramer
81d46d0c06 This is done. 
llvm-svn: 130499
 2011-04-29 14:09:57 +00:00
Chris Lattner
52e40d9b4c clean up after Sean's r127646 patch. 
llvm-svn: 130475
 2011-04-29 05:40:18 +00:00
Chris Lattner
c8dff72621 use the MachineInstrBuilder operator-> to simplify some code. 
There are probably more instances of this floating around.

llvm-svn: 130474
 2011-04-29 05:24:29 +00:00
Eric Christopher
f7f8f92201 Update comments and checks to match reality. 
llvm-svn: 130464
 2011-04-29 00:07:20 +00:00
Eric Christopher
68cdb30c0d Whitespace. 
llvm-svn: 130463
 2011-04-29 00:03:10 +00:00
Eli Friedman
a93906d0c3 Revert r130454; apparently this doesn't actually work. 
llvm-svn: 130462
 2011-04-28 23:55:14 +00:00
Eli Friedman
9a80f23666 Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register. 
rdar://problem/9338332 .

llvm-svn: 130454
 2011-04-28 23:03:25 +00:00
Daniel Dunbar
a65f557314 Target/X86/MC: Add an option for disabling arith relaxation, for my own testing 
purposes.

llvm-svn: 130438
 2011-04-28 21:23:31 +00:00
Eli Friedman
afc21e9be2 fast-isel sret calls, try 2. We actually do need to do something on x86-32. rdar://problem/9303592 . 
llvm-svn: 130429
 2011-04-28 20:19:12 +00:00
Eli Friedman
7b68473355 Revert r130348; causing buildbot issues on x86-32. 
llvm-svn: 130412
 2011-04-28 18:06:10 +00:00
Eric Christopher
2e9c3e61ee Be more layout aware here and swap the successor and branch condition 
if it means we get a fallthrough.

llvm-svn: 130404
 2011-04-28 16:52:09 +00:00
Rafael Espindola
f75a67d261 Add a getExprForPersonalitySymbol method to MCAsmInfo. Use it when 
converting the symbol passed to .cfi_personality into bytes is the file.

llvm-svn: 130400
 2011-04-28 16:09:09 +00:00
Eric Christopher
bea4df9acc Let the immediate leaf pattern take transforms and switch the signed 
immediate patterns in arm to using the pattern.

Handles rdar://9299434

llvm-svn: 130386
 2011-04-28 05:49:04 +00:00
Chris Lattner
61521f8481 move PR9803 to this readme. 
llvm-svn: 130385
 2011-04-28 05:33:16 +00:00
Devang Patel
900ceb725b Teach dwarf writer to handle complex address expression for .debug_loc entries. 
This fixes clang generated blocks' variables' debug info.
Radar 9279956.

llvm-svn: 130373
 2011-04-28 02:22:40 +00:00
Justin Holewinski
a1728a7d40 PTX: support for select_cc and fixes for setcc 
- expansion of SELECT_CC into SETCC
- force SETCC result type to i1
- custom selection for handling i1 using SETCC

Patch by Dan Bailey

llvm-svn: 130358
 2011-04-28 00:19:56 +00:00
Justin Holewinski
a042c76db5 PTX: support for select 
- selection of SELP instruction
- new selp.ll test

Patch by Dan Bailey

llvm-svn: 130357
 2011-04-28 00:19:55 +00:00
Justin Holewinski
c1013e6801 PTX: mov fix and rounding correction for cvt 
- fix typo in MOV
- correct fp rounding on CVT
- new cvt.ll test

Patch by Dan Bailey

llvm-svn: 130356
 2011-04-28 00:19:54 +00:00
Justin Holewinski
405d24712b PTX: support for fneg 
- selection of FNEG instruction
- new fneg.ll test

Patch by Dan Bailey

llvm-svn: 130355
 2011-04-28 00:19:53 +00:00
Justin Holewinski
8e5353495e PTX: support for zext loads and trunc stores 
- expansion of EXTLOAD and TRUNCSTORE instructions

Patch by Dan Bailey

llvm-svn: 130354
 2011-04-28 00:19:52 +00:00
Justin Holewinski
bde9352742 PTX: support for bitwise operations on predicates 
- selection of bitwise preds (AND, OR, XOR)
- new bitwise.ll test

Patch by Dan Bailey

llvm-svn: 130353
 2011-04-28 00:19:51 +00:00
Justin Holewinski
520fdbc49f PTX: patch to AsmPrinter 
- immediate value cast as long not int
- handles initializer for constant array

Patch by Dan Bailey

llvm-svn: 130352
 2011-04-28 00:19:50 +00:00
Eli Friedman
bcb7cd335d fast-isel sret. We actually don't need to do anything special on x86. :) rdar://problem/9303592 . 
llvm-svn: 130348
 2011-04-27 23:58:52 +00:00
Rafael Espindola
36e419b524 Remove unnecessary argument. 
llvm-svn: 130343
 2011-04-27 23:17:57 +00:00
Rafael Espindola
0525497a16 Rename getPersonalityPICSymbol to getCFIPersonalitySymbol, document it, and 
give it a bit more responsibility. Also implement it for MachO.

If hacked to use cfi, 32 bit MachO will produce

.cfi_personality 155, L___gxx_personality_v0$non_lazy_ptr

and 64 bit will produce

.cfi_presonality ___gxx_personality_v0

The general idea is that .cfi_personality gets passed the final symbol. It is
up to codegen to produce it if using indirect representation (like 32 bit
MachO), but it is up to MC to decide which relocations to create.

llvm-svn: 130341
 2011-04-27 23:08:15 +00:00
Eli Friedman
c5406cdb50 Make the fast-isel code for literal 0.0 a bit shorter/faster, since 0.0 is common. rdar://problem/9303592 . 
llvm-svn: 130338
 2011-04-27 22:41:55 +00:00
Kevin Enderby
dbc7221170 Fix a bug in the case that there is no add or subtract symbol and the offset 
value is zero so it does not add a NULL expr operand.

llvm-svn: 130330
 2011-04-27 21:02:27 +00:00
Devang Patel
42f4a7ff92 Revert r130178. It turned out to be not the optimal path to emit complex location expressions. 
llvm-svn: 130326
 2011-04-27 20:29:27 +00:00
Eli Friedman
4406055de1 Refactor out code to fast-isel a memcpy operation with a small constant 
length.  (I'm planning to use this to implement byval.)

llvm-svn: 130274
 2011-04-27 01:45:07 +00:00
Eli Friedman
00b153c2eb Fix an edge case involving branches in fast-isel on x86. 
rdar://problem/9303306 .

llvm-svn: 130272
 2011-04-27 01:34:27 +00:00
Chris Lattner
01ceb99a05 Transform: "icmp eq (trunc (lshr(X, cst1)), cst" to "icmp (and X, mask), cst" 
when X has multiple uses.  This is useful for exposing secondary optimizations,
but the X86 backend isn't ready for this when X has a single use.  For example,
this can disable load folding.

This is inching towards resolving PR6627.

llvm-svn: 130238
 2011-04-26 20:18:20 +00:00
Jim Grosbach
77d45564c3 ARM and Thumb2 support for atomic MIN/MAX/UMIN/UMAX loads. 
rdar://9326019

llvm-svn: 130234
 2011-04-26 19:44:18 +00:00
Jakob Stoklund Olesen
7a2dca07a8 Add a TRI::getLargestLegalSuperClass hook to provide an upper limit on register class inflation. 
The hook will be used by the register allocator when recomputing register
classes after removing constraints.

Thumb1 code doesn't allow anything larger than tGPR, and x86 needs to ensure
that the spill size doesn't change.

llvm-svn: 130228
 2011-04-26 18:52:33 +00:00
Rafael Espindola
59c3a084c6 Print all the moves at a given label instead of just the first one. 
Remove previous DwarfCFI hack.

llvm-svn: 130187
 2011-04-26 03:58:56 +00:00
Devang Patel
4969322bc4 Let dwarf writer allocate extra space in the debug location expression. This space, if requested, will be used for complex addresses of the Blocks' variables. 
llvm-svn: 130178
 2011-04-26 00:12:46 +00:00
Chris Lattner
35166f3b22 add a missed bitfield instcombine. 
llvm-svn: 130137
 2011-04-25 18:44:26 +00:00
Akira Hatanaka
59b356bcc3 Lower BlockAddress node when relocation-model is static. 
llvm-svn: 130131
 2011-04-25 17:10:45 +00:00
Chandler Carruth
74094b8d4a Remove some hard coded CR-LFs. Some of these were the entire files, one of 
these was just one line of a file. Explicitly set the eol-style property on the
files to try and ensure this fix stays.

llvm-svn: 130125
 2011-04-25 07:11:23 +00:00
Duncan Sands
e4e802432c Fix comment typo. Noticed by Liu. 
llvm-svn: 130120
 2011-04-25 06:21:43 +00:00
Sebastian Redl
ef01c3c33f Fix Target/ARM/Thumb1FrameLowering.h header guard. 
llvm-svn: 130097
 2011-04-24 15:47:01 +00:00
Jay Foad
c146569beb Remove unused STL header includes. 
llvm-svn: 130068
 2011-04-23 19:53:52 +00:00
Benjamin Kramer
fee48a936f Silence an overzealous uninitialized variable warning from GCC. 
llvm-svn: 130053
 2011-04-23 08:21:06 +00:00
Andrew Trick
a130d110d1 Thumb2 and ARM add/subtract with carry fixes. 
Fixes Thumb2 ADCS and SBCS lowering: <rdar://problem/9275821>.
t2ADCS/t2SBCS are now pseudo instructions, consistent with ARM, so the
assembly printer correctly prints the 's' suffix.

Fixes Thumb2 adde -> SBC matching to check for live/dead carry flags.

Fixes the internal ARM machine opcode mnemonic for ADCS/SBCS.
Fixes ARM SBC lowering to check for live carry (potential bug).

llvm-svn: 130048
 2011-04-23 03:55:32 +00:00
Andrew Trick
31c7962ce5 whitespace 
llvm-svn: 130046
 2011-04-23 03:24:11 +00:00
Johnny Chen
dfac31bc1b Disassembly of A8.6.59 LDR (literal) Encoding T1 (16-bit thumb instruction) should 
print out ldr, not ldr.n.

rdar://problem/9267772

llvm-svn: 130008
 2011-04-22 19:12:43 +00:00