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3502 Commits

Author SHA1 Message Date
Evan Cheng
f1a2e421c3 Added comi and ucomi SSE intrinsics. 
llvm-svn: 27443
 2006-04-05 23:37:18 +00:00
Chris Lattner
86763bafa7 add altivec ds* intrinsics 
llvm-svn: 27441
 2006-04-05 22:18:01 +00:00
Chris Lattner
986d42c2e9 Get the types right, third time is the charm. Add vsl. 
llvm-svn: 27424
 2006-04-05 01:15:54 +00:00
Chris Lattner
f41b7d5a80 correct the type of two intrinsics, add int_ppc_altivec_vmladduhm 
llvm-svn: 27422
 2006-04-05 00:49:14 +00:00
Chris Lattner
0afabdfdaf Add m[tf]vscr intrinsics. 
llvm-svn: 27420
 2006-04-05 00:03:03 +00:00
Chris Lattner
e7a52b473f Add missing byte merges. 
llvm-svn: 27418
 2006-04-04 23:43:56 +00:00
Chris Lattner
ab137b431f Add FP -> Int Conversions 
llvm-svn: 27417
 2006-04-04 23:25:02 +00:00
Chris Lattner
39a966beec add average intrinsics. 
llvm-svn: 27415
 2006-04-04 23:13:21 +00:00
Evan Cheng
a4d3c6df75 Added intrinsics to match __builtin_ia32_pslldqi128 and 
__builtin_ia32_psrldqi128.

llvm-svn: 27411
 2006-04-04 21:48:31 +00:00
Chris Lattner
657e2d1d80 How could this ever have worked? 
llvm-svn: 27409
 2006-04-04 19:05:42 +00:00
Chris Lattner
6ce700fbae Make sure to consider alignment of variable sized objects. 
This, along with the previous dag combiner fix, fixes
CodeGen/Alpha/2006-04-04-zextload.ll

llvm-svn: 27403
 2006-04-04 17:39:56 +00:00
Chris Lattner
1dc3c03ee7 Move isShuffleLegal from TLI to Legalize. 
llvm-svn: 27398
 2006-04-04 17:21:22 +00:00
Chris Lattner
a1fc0eb694 Fix the types for these intrinsics. 
llvm-svn: 27392
 2006-04-04 01:40:06 +00:00
Chris Lattner
9925c6018f Allow targets to have fine grained control over which types various ops get 
promoted to, if they desire.

llvm-svn: 27389
 2006-04-04 00:25:10 +00:00
Chris Lattner
b46d7d9fc4 Keep track of max stack alignment as objects are added. Remove an obsolete method. 
llvm-svn: 27378
 2006-04-03 21:38:39 +00:00
Chris Lattner
29156e5094 shrinkify intrinsics more by using some local classes 
llvm-svn: 27373
 2006-04-03 17:20:06 +00:00
Chris Lattner
c0cba5e03f Add some classes to make it easier to define intrinsics. Add min/max intrinsics. 
llvm-svn: 27371
 2006-04-03 15:43:07 +00:00
Chris Lattner
99a3213376 simplify this method 
llvm-svn: 27338
 2006-04-02 02:28:52 +00:00
Chris Lattner
a76347d917 Fix Transforms/IndVarsSimplify/2006-03-31-NegativeStride.ll and 
PR726 by performing consistent signed division, not consistent unsigned
division when evaluating scev's.  Do not touch udivs.

llvm-svn: 27326
 2006-04-01 04:48:52 +00:00
Evan Cheng
aeb1560ea5 Added haddp{s|d} and hsubp{s|d} intrinsics. 
llvm-svn: 27309
 2006-03-31 21:28:46 +00:00
Chris Lattner
8e0dfe133c Modify the TargetLowering::getPackedTypeBreakdown method to also return the 
unpromoted element type.

llvm-svn: 27273
 2006-03-31 00:46:36 +00:00
Chris Lattner
557951b354 Add a method useful for decimating vectors. 
llvm-svn: 27269
 2006-03-31 00:28:23 +00:00
Chris Lattner
e35e1db8c2 fix incorrect prototypes 
llvm-svn: 27267
 2006-03-30 23:32:58 +00:00
Chris Lattner
69148453d0 Add vector multiply, multiply sum, pack, unpack, and lvsl/lvsr intrinsics. 
llvm-svn: 27258
 2006-03-30 18:52:02 +00:00
Evan Cheng
57d481a78a Add support for _mm_cmp{cc}_ss and _mm_cmp{cc}_ps intrinsics 
llvm-svn: 27256
 2006-03-30 06:21:22 +00:00
Evan Cheng
82d2a6910f Add 128-bit pmovmskb intrinsic support. 
llvm-svn: 27255
 2006-03-30 00:33:26 +00:00
Evan Cheng
9ebe75e915 Change SSE pack operation definitions to fit what the intrinsics expected. 
For example, packsswb actually creates a v16i8 from a pair of v8i16. But since
the intrinsic specification forces the output type to match the operands.

llvm-svn: 27254
 2006-03-29 23:53:14 +00:00
Evan Cheng
1b19ed24d6 Add SSE2 integer pack with saturation intrinsics. 
llvm-svn: 27253
 2006-03-29 23:09:19 +00:00
Evan Cheng
84c8b5bcd9 Add more SSE intrinsics 
llvm-svn: 27247
 2006-03-29 06:07:16 +00:00
Chris Lattner
83ec289ebf Add a new node 
llvm-svn: 27230
 2006-03-28 19:54:11 +00:00
Jim Laskey
4c2d4d1912 Refactor address attributes. Add base register to frame info. 
llvm-svn: 27226
 2006-03-28 14:58:32 +00:00
Jim Laskey
eb38a3e83a Expose base register for DwarfWriter. Refactor code accordingly. 
llvm-svn: 27225
 2006-03-28 13:48:33 +00:00
Nate Begeman
5a82c8ccbd Add a few more altivec intrinsics 
llvm-svn: 27215
 2006-03-28 04:15:58 +00:00
Chris Lattner
1a5116bd0c These don't directly map to gcc intrinsics any more. 
llvm-svn: 27213
 2006-03-28 03:52:36 +00:00
Chris Lattner
176d16aec7 Add some more intrinsics: rotates, fp rounds, and random other fp instructions. 
llvm-svn: 27208
 2006-03-28 02:28:48 +00:00
Evan Cheng
d10153ba72 getVectorTyppe(MVT::i64, 2) ==> MVT::v2i64. 
llvm-svn: 27207
 2006-03-28 01:59:17 +00:00
Chris Lattner
76ce849af5 Add lvxl 
llvm-svn: 27206
 2006-03-28 01:49:27 +00:00
Chris Lattner
a0f80c3c3f Tblgen doesn't like multiple SDNode<> definitions that map to the same 
enum value.  Split them into separate enums.

llvm-svn: 27199
 2006-03-28 00:39:06 +00:00
Chris Lattner
b53e0ddbd3 Reenable pointer intrinsics. 
llvm-svn: 27198
 2006-03-28 00:15:44 +00:00
Chris Lattner
1e517cbb0c revert this, it breaks things 
llvm-svn: 27195
 2006-03-28 00:02:52 +00:00
Jim Laskey
1585be504a Should not remove casts from variable's alloca. 
llvm-svn: 27191
 2006-03-27 23:30:18 +00:00
Chris Lattner
720a11dd3e Add support for intrinsics with pointer arguments in target .td files. 
llvm-svn: 27190
 2006-03-27 22:49:46 +00:00
Chris Lattner
a6ae3e278a Add some missing template specializations for autodereferencing User. 
llvm-svn: 27189
 2006-03-27 22:49:07 +00:00
Chris Lattner
fd3aa5f890 add a new iPTR ValueType for tblgen use 
llvm-svn: 27187
 2006-03-27 22:48:00 +00:00
Chris Lattner
6917dae72b Divirge from the GCC specification of the load/store intrinsics: only take 
one pointer operand, instead of a pointer and an offset.  The FE will lower
to this canonicalized form.

llvm-svn: 27186
 2006-03-27 22:38:39 +00:00
Chris Lattner
735fa11e56 fix spelling :( 
llvm-svn: 27184
 2006-03-27 22:07:12 +00:00
Chris Lattner
37cd00ed2a add some more intrinsics. 
llvm-svn: 27183
 2006-03-27 22:05:34 +00:00
Evan Cheng
aba79c636f Intrinsics naming convention change. 
llvm-svn: 27172
 2006-03-27 08:23:12 +00:00
Evan Cheng
4667bd17cb Change isBuildVectorAllOnesInteger to isBuildVectorAllOnes. Also check for 
floating point cases.

llvm-svn: 27165
 2006-03-27 06:58:47 +00:00
Nate Begeman
3d518334b9 SelectionDAGISel can now natively handle Switch instructions, in the same 
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks.  The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.

This functionality is currently only enabled on x86, but should be safe for
every target.  In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.

llvm-svn: 27156
 2006-03-27 01:32:24 +00:00