Commit Graph

164958 Commits

Author SHA1 Message Date
Hiroshi Inoue
372c859080 [PowerPC] reduce rotate in BitPermutationSelector
BitPermutationSelector builds the output value by repeating rotate-and-mask instructions with input registers.
Here, we may avoid one rotate instruction if we start building from an input register that does not require rotation.

For example of the test case bitfieldinsert.ll, it first rotates left r4 by 8 bits and then inserts some bits from r5 without rotation.
This can be executed by one rlwimi instruction, which rotates r4 by 8 bits and inserts its bits into r5.

This patch adds a check for rotation amounts in the comparator used in sorting to process the input without rotation first.

Differential Revision: https://reviews.llvm.org/D47765

llvm-svn: 334011
2018-06-05 11:58:01 +00:00
Clement Courbet
d3825552be [llvm-exegesis] Add instructions to BenchmarkResult Key.
We want llvm-exegesis to explore instructions (effect of initial register values, effect of operand selection). To enable this a BenchmarkResult muststore all the relevant data in its key. This patch starts adding such data. Here we simply allow to store the generated instructions, following patches will add operands and initial values for registers.

https://reviews.llvm.org/D47764

Authored by: Guilluame Chatelet

llvm-svn: 334008
2018-06-05 10:56:19 +00:00
Simon Pilgrim
5f8f0b3a1b [X86][SSE] Add target shuffle support to X86TargetLowering::computeKnownBitsForTargetNode
Ideally we'd use resolveTargetShuffleInputs to handle faux shuffles as well but:
(a) that code path doesn't handle general/pre-legalized ops/types very well.
(b) I'm concerned about the compute time as they recurse to calls to computeKnownBits/ComputeNumSignBits which would need depth limiting somehow.

llvm-svn: 334007
2018-06-05 10:52:29 +00:00
Gabor Buella
32fc1b0f96 [X86] NFC Refactor some code in InstPrinters
Summary:
Bringing some come duplicated in the AT&T and the Intel printers
into a common parent class.

Reviewers: craig.topper

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D47682

llvm-svn: 334005
2018-06-05 10:41:39 +00:00
Peter Smith
fa22d499a7 [MC][ARM] Add range checking for Thumb2 resolved fixups.
When the branch target of a Thumb2 unconditional or conditonal branch is
resolved at assembly time, no range checking is performed on the result
leading to incorrect immediates. This change adds a range check:
+- 16 Megabytes for unconditional branches, +- 1 Megabyte for the
conditional branch.

Differential Revision: https://reviews.llvm.org/D46306

llvm-svn: 333997
2018-06-05 10:00:56 +00:00
Simon Pilgrim
3548135570 [X86][SSE] Add basic PACKUS support to X86TargetLowering::computeKnownBitsForTargetNode
Helps improve analysis of saturation ops

llvm-svn: 333995
2018-06-05 09:45:03 +00:00
Peter Smith
abbe09ad00 [MC][ARM] Correct Thumb BL instruction range
The Thumb BL range is + or - either 16 Megabytes or 4 Megabytes depending
on whether the CPU supports Thumb2 or the v8-m baseline ops. The existing
check for BL range is incorrectly set at +- 32 Megabytes. This change
corrects the higher range and uses the lower range if the featurebits
don't have the necessary support for it.

Differential Revision: https://reviews.llvm.org/D46305

llvm-svn: 333991
2018-06-05 09:32:28 +00:00
Alexander Ivchenko
9a19512999 [X86][CET] Shadow stack fix for setjmp/longjmp
This is the new version of D46181, allowing setjmp/longjmp
to work correctly with the Intel CET shadow stack by storing
SSP on setjmp and fixing it on longjmp. The patch has been
updated to use the cf-protection-return module flag instead
of HasSHSTK, and the bug that caused D46181 to be reverted
has been fixed with the test expanded to track that fix.

patch by mike.dvoretsky

Differential Revision: https://reviews.llvm.org/D47311

llvm-svn: 333990
2018-06-05 09:22:30 +00:00
Craig Topper
5fd87a52a6 [X86] Make all instructions that operate on MMX types, but were added after the initial MMX support via one of the SSE features flags make them require the MMX feature as well.
Passing -mattr=-mmx needs to disable these instructions since the MMX register class won't have been set up. But we don't want -mattr=-mmx to disable SSE so we have to do it separately.

llvm-svn: 333984
2018-06-05 06:20:06 +00:00
Nirav Dave
8db1c4f08d [RegAllocGreedy] Use simpler map class for EvicteeInfo. NFCI.
RegAlloc keeps a insertion-time ordered map of evictee information,
but we only use membership. Replace MapVector with contextually
equivalent DenseMap which is smaller and faster.

llvm-svn: 333981
2018-06-05 03:16:28 +00:00
Vedant Kumar
563a747bd5 [opt] Introduce -strip-named-metadata
This renames and generalizes -strip-module-flags to erase all named
metadata from a module. This makes it easier to diff IR.

llvm-svn: 333977
2018-06-05 00:56:08 +00:00
Vedant Kumar
85503c73b3 [Debugify] Don't insert debug values after terminating deopts
As is the case with musttail calls, the IR does not allow for
instructions inserted after a terminating deopt.

llvm-svn: 333976
2018-06-05 00:56:07 +00:00
Vedant Kumar
097bdda6d9 Apply clang-format on a file, NFC
llvm-svn: 333975
2018-06-05 00:56:07 +00:00
Francis Visoiu Mistrih
b3775b8d98 Use MF instead of Fn for MachineFunction references. NFC
llvm-svn: 333973
2018-06-05 00:27:28 +00:00
Francis Visoiu Mistrih
9008ed7f02 [ShrinkWrap] Add optimization remarks to the shrink-wrapping pass
Start by emitting remarks for very basic unsupported cases such as
irreducible CFGs and EHFunclets. The end goal is to be able to cover all
the cases where we give up with an explanation.

llvm-svn: 333972
2018-06-05 00:27:24 +00:00
Amara Emerson
f60ecfcfa7 [MIRParser] Add parser support for 'true' and 'false' i1s.
We already output true and false in the printer, but the parser isn't able to
read it.

Differential Revision: https://reviews.llvm.org/D47424

llvm-svn: 333970
2018-06-05 00:17:13 +00:00
Reid Kleckner
c7cfe4c775 Fix -Wcovered-switch-default warning and clang-format it
llvm-svn: 333967
2018-06-04 23:47:29 +00:00
David Blaikie
b760ceab63 Move Compiler.h from Demangle back to Support
Code review feedback from r328123 prefers copying the few feature test
macros used by Demangle into there, rather than sinking the header into
an odd corner like Demangle.

llvm-svn: 333965
2018-06-04 22:53:38 +00:00
Derek Schuff
2a2291f1d7 Simplified WebAssemblyAsmBackend by removing explicit ELF variant.
The ELF version was broken (does not deal with wasm specific fixups),
and now is slightly less broken. It will be removed in its entirety
in the future which this change makes slightly easier (just remove
the IsELF bool).

Differential Revision: https://reviews.llvm.org/D47745

Patch by Wouter van Oortmerssen

llvm-svn: 333964
2018-06-04 22:53:36 +00:00
Sanjay Patel
b2a8a5c373 [InstCombine] refine UB-handling in shuffle-binop transform
As noted in rL333782, we can be both better for optimization and
safer with this transform:
BinOp (shuffle V1, Mask), C --> shuffle (BinOp V1, NewC), Mask

The only potentially unsafe-to-speculate binops are integer div/rem.
All other binops are always safe (although I don't see a way to
assert that in code here).

For opcodes like shifts that can produce poison, it can't matter
here because we know the lanes with undef are dropped by the
subsequent shuffle.

Differential Revision: https://reviews.llvm.org/D47686

llvm-svn: 333962
2018-06-04 22:26:45 +00:00
Amaury Sechet
57672b8208 Remove various use of undef in the X86 test suite as patern involving undef can collapse them. NFC
llvm-svn: 333961
2018-06-04 22:09:26 +00:00
Amaury Sechet
54c1ba8142 Revert "Regenerate expected test results for test/CodeGen/X86/pr23103.ll . NFC"
This reverts commit cf25dfc503c861845947f3e6a9d308811ebb9da3.

llvm-svn: 333960
2018-06-04 21:49:23 +00:00
Vedant Kumar
3fff3d2b73 [Debugify] Preserve analyses in -check-debugify
The -check-debugify pass should preserve all analyses. Otherwise, it may
invalidate an optional analysis and inadvertently alter codegen.

The test case is reduced from deopt-bundle.ll. The result of `opt -O1`
on this file would differ when -debugify-each was toggled. That happened
because CheckDebugify failed to preserve GlobalsAA.

Thanks to Davide Italiano for his help chasing this down!

llvm-svn: 333959
2018-06-04 21:43:28 +00:00
David Blaikie
7cdb14506b Add missing header
llvm-svn: 333957
2018-06-04 21:33:56 +00:00
David Blaikie
93054c1e87 Move Analysis/Utils/Local.h back to Transforms
Review feedback from r328165. Split out just the one function from the
file that's used by Analysis. (As chandlerc pointed out, the original
change only moved the header and not the implementation anyway - which
was fine for the one function that was used (since it's a
template/inlined in the header) but not in general)

llvm-svn: 333954
2018-06-04 21:23:21 +00:00
Amaury Sechet
a4ff6f180a Revert "Remove various use of undef in the X86 test suite as patern involving undef can collapse them. NFC"
This reverts commit f0e85c194ae5e87476bc767304470dec85b6774f.

llvm-svn: 333953
2018-06-04 21:20:45 +00:00
Jessica Paquette
a6b0671eeb [MachineOutliner] NFC - Move intermediate data structures to MachineOutliner.h
This is setting up to fix bug 37573 cleanly.

This moves data structures that are technically both used in some way by the
target and the general-purpose outlining algorithm into MachineOutliner.h. In
particular, the `Candidate` class is of importance.

Before, the outliner passed the locations of `Candidates` to the target, which
would then make some decisions about the prospective outlined function. This
change allows us to just pass `Candidates` along to the target. This will allow
the target to discard `Candidates` that would be considered unsafe before cost
calculation. Thus, we will be able to remove the unsafe candidates described in
the bug without resorting to torching the entire prospective function.

Also, as a side-effect, it makes the outliner a bit cleaner.

https://bugs.llvm.org/show_bug.cgi?id=37573

llvm-svn: 333952
2018-06-04 21:14:16 +00:00
Alexander Ivchenko
acf5a1a563 [X86][ELF][CET] Adding the .note.gnu.property ELF section in X86
In preparation for the proposed linker ABI changes
(https://github.com/hjl-tools/linux-abi/wiki/linux-abi-draft.pdf,
https://github.com/hjl-tools/x86-psABI/wiki/x86-64-psABI-cet.pdf),
this patch enables emission of the .note.gnu.property section to
ELF object files when building CET-enabled modules.

patch by mike.dvoretsky

Differential Revision: https://reviews.llvm.org/D47145

llvm-svn: 333951
2018-06-04 21:07:35 +00:00
Amaury Sechet
22aa8938ec Remove various use of undef in the X86 test suite as patern involving undef can collapse them. NFC
llvm-svn: 333950
2018-06-04 20:57:27 +00:00
Amaury Sechet
475f34222c Regenerate expected test results for test/CodeGen/X86/pr23103.ll . NFC
llvm-svn: 333949
2018-06-04 20:47:00 +00:00
Scott Linder
7c369fa7dd [CodeGen] Always update divergence in SelectionDAG::UpdateNodeOperands
Some overloads failed to update divergence.

Differential Revision: https://reviews.llvm.org/D47148

llvm-svn: 333947
2018-06-04 20:19:45 +00:00
Zachary Turner
971d9f9d57 [Support] Add functions that operate on native file handles on Windows.
Windows' CRT has a limit of 512 open file descriptors, and fds which are
generated by converting a HANDLE via _get_osfhandle count towards this
limit as well.

Regardless, often you find yourself marshalling back and forth between
native HANDLE objects and fds anyway. If we know from the getgo that
we're going to need to work directly with the handle, we can cut out the
marshalling layer while also not contributing to filling up the CRT's
very limited handle table.

On Unix these functions just delegate directly to the existing set of
functions since an fd *is* the native file type. It would be nice, very
long term, if we could convert most uses of fds to file_t.

Differential Revision: https://reviews.llvm.org/D47688

llvm-svn: 333945
2018-06-04 19:38:11 +00:00
Amaury Sechet
1042265b01 [DAGcombine] Teach the combiner about -a = ~a + 1
Summary: This include variant for add, uaddo and addcarry. usubo and subcarry require the carry to be flipped to preserve semantic, but we chose to do the transform anyway in that case as to push the transform down the carry chain.

Reviewers: efriedma, spatel, RKSimon, zvi, bkramer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D46505

llvm-svn: 333943
2018-06-04 19:23:22 +00:00
Teresa Johnson
6b92d64b27 Fix for llvm-dis/llvm-bcanalyzer overflows
Summary:
These tools failed for a very large bitcode file produced by LTO due to
64-bit values being assigned to 32-bit types. For the BitstreamReader.h
fix, the value initially fit into the 32-bit unsigned, but there was an
overflow when multiplying by 32 furter below to compute the bit offset.

No test case in the patch as this requires a huge bitcode file.

Reviewers: pcc, george.karpenkov

Subscribers: mehdi_amini, a.sidorin, llvm-commits

Differential Revision: https://reviews.llvm.org/D47731

llvm-svn: 333942
2018-06-04 19:20:02 +00:00
Alexander Shaposhnikov
936cf94651 [llvm-strip] Add missing aliases for --strip-debug
Add missing aliases for --strip-debug: -g, -S, -d.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D47674

llvm-svn: 333940
2018-06-04 18:55:41 +00:00
Amaury Sechet
58bd18d592 Get rid of SETCCE
Summary: It has been deprecated in favor of SETCCCARRY for a year now and isn't used by any in tree backend.

Reviewers: efriedma, craig.topper, dblaikie, bkramer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47685

llvm-svn: 333939
2018-06-04 18:36:22 +00:00
Dmitry Mikulin
3c17b323b0 In thin and full LTO + CFI, direct function calls may go through jump table
entries to reach the target. Since these calls don't require type checks,
we can short-circuit them to their real targets, except in cases when they
can be pre-empted.

Differential Revision: https://reviews.llvm.org/D46326

llvm-svn: 333937
2018-06-04 18:18:12 +00:00
Craig Topper
308f37f223 [X86] Don't pass ParitySrc array into isAddSubOrSubAddMask. Instead use a bool output parameter to get the real piece of info we care about. NFC
The ParitySrc array is more of an implementation detail. A single bool to get the final parity is sufficient.

llvm-svn: 333935
2018-06-04 17:58:45 +00:00
Stanislav Mekhanoshin
4301179049 [AMDGPU] Small refactoring in the scheduler
After last changes some code can be simplified.

Differential Revision: https://reviews.llvm.org/D47661

llvm-svn: 333934
2018-06-04 17:57:40 +00:00
Stanislav Mekhanoshin
d0dbf4d085 [AMDGPU] Factored out common part of GCNRPTracker::reset()
Differential Revision: https://reviews.llvm.org/D47664

llvm-svn: 333931
2018-06-04 17:21:54 +00:00
Sam Clegg
5d9dbb96b7 [MachO] Add out-of-bounds check to MachOObjectFile.cpp
This is a followup to rL333496.

Differential Revision: https://reviews.llvm.org/D47544

llvm-svn: 333929
2018-06-04 17:01:20 +00:00
Sam Clegg
c7ecc0ce30 [WebAssembly] Fix .td files after rL333900
Differential Revision: https://reviews.llvm.org/D47727

llvm-svn: 333928
2018-06-04 16:59:26 +00:00
John Brawn
c040d0bd38 [ValueTracking] Match select abs pattern when there's an sext involved
When checking a select to see if it matches an abs, allow the true/false values
to be a sign-extension of the comparison value instead of requiring that they're
directly the comparison value, as all the comparison cares about is the sign of
the value.

This fixes a regression due to r333702, where we were no longer generating ctlz
due to isKnownNonNegative failing to match such a pattern.

Differential Revision: https://reviews.llvm.org/D47631

llvm-svn: 333927
2018-06-04 16:53:57 +00:00
Mark Searles
77bed3607d [AMDGPU][Waitcnt] Fix handling of flat instrs
On GFX9 and earlier, flat memory ops may decrement VMCNT out-of-order as well as LGKMCNT out-of-order.

Differential Revision: https://reviews.llvm.org/D46616

llvm-svn: 333926
2018-06-04 16:51:59 +00:00
Simon Pilgrim
1ee706885e [X86] Only accept const SelectionDAG to resolveTargetShuffleInputs/getFauxShuffleMask
These methods should only be using SelectionDAG for analysis (known/sign bits etc), not node creation.

llvm-svn: 333925
2018-06-04 16:48:13 +00:00
Benjamin Kramer
29e203b4dc [NVPTX] Delete dead code from the AsmPrinter.
llvm-svn: 333924
2018-06-04 16:12:33 +00:00
Andrea Di Biagio
8b4cab0d54 [RFC][patch 3/3] Add support for variant scheduling classes in llvm-mca.
This patch is the last of a sequence of three patches related to LLVM-dev RFC
"MC support for variant scheduling classes".
http://lists.llvm.org/pipermail/llvm-dev/2018-May/123181.html

This fixes PR36672.

The main goal of this patch is to teach llvm-mca how to solve variant scheduling
classes.  This patch does that, plus it adds new variant scheduling classes to
the BtVer2 scheduling model to identify so-called zero-idioms (i.e. so-called
dependency breaking instructions that are known to generate zero, and that are
optimized out in hardware at register renaming stage).

Without the BtVer2 change, this patch would not have had any meaningful tests.
This patch is effectively the union of two changes:
 1) a change that teaches llvm-mca how to resolve variant scheduling classes.
 2) a change to the BtVer2 scheduling model that allows us to special-case
    packed XOR zero-idioms (this partially fixes PR36671).

Differential Revision: https://reviews.llvm.org/D47374 

llvm-svn: 333909
2018-06-04 15:43:09 +00:00
Alexander Ivchenko
d887a99b3c [llvm-readobj] Support GNU_PROPERTY_X86_FEATURE_1_AND notes in .note.gnu.property
Resubmit of r333424. This version contains the fix for fails found by buildbots
on some targets.

This patch allows parsing GNU_PROPERTY_X86_FEATURE_1_AND
notes in .note.gnu.property sections. These notes
indicate that the object file is built to support Intel CET.

patch by mike.dvoretsky

Differential Revision: https://reviews.llvm.org/D47473

llvm-svn: 333908
2018-06-04 15:14:18 +00:00
Krzysztof Parzyszek
d2627a7e7a [SelectionDAG] Add missing closing parentheses in comments, NFC
llvm-svn: 333907
2018-06-04 14:54:53 +00:00
Nicolai Haehnle
5a12112c99 AMDGPU: Make various NamedOperands upper case
Summary:
Avoid name clashes with the corresponding bit fields in the instruction
encoding.

Change-Id: Id1644e703e976e78f7af93788d9f44cb48c3251f

Reviewers: arsenm, rampitec, kzhuravl

Subscribers: wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D47433

llvm-svn: 333905
2018-06-04 14:45:20 +00:00