Commit Graph

82486 Commits

Author SHA1 Message Date
Duncan Sands
39edcc75ac Fix PR12858, a crash due to GVN's PRE not fully removing an instruction from the
leader table.  That's because it wasn't expecting instructions to turn up as
leader for a value number that is not its own, but equality propagation could
create this situation.  One solution is to have the leader table use a WeakVH
but this slows down GVN by about 5%.  Instead just have equality propagation not
add instructions to the leader table, only constants and arguments.  In theory
this might cause GVN to run more (each time it changes something it runs again)
but it doesn't seem to occur enough to cause a slow down.

llvm-svn: 157251
2012-05-22 14:17:53 +00:00
Craig Topper
0fe3f1297b Fix constant used for pshufb mask when lowering v16i8 shuffles. Bug introduced in r157043. Fixes PR12908.
llvm-svn: 157236
2012-05-22 06:09:38 +00:00
Akira Hatanaka
2a600ff5f4 This patch adds a predicate to existing mips32 and mips64 so that those
instruction encodings can be excluded during mips16 processing.

This revision fixes the issue raised by Jim Grosbach.

bool hasStandardEncoding() const { return !inMips16Mode(); }

When micromips is added it will be

bool StandardEncoding() const { return !inMips16Mode()&&  !inMicroMipsMode(); }

No additional testing is needed other than to assure that there is no regression
from this patch.

Patch by Reed Kotler.

llvm-svn: 157234
2012-05-22 03:10:09 +00:00
Nuno Lopes
328f9efec2 fix the quotient returned by sdivrem() for the case when LHS is negative and RHS is positive
based on a patch by Preston Briggs, with some modifications

llvm-svn: 157231
2012-05-22 01:09:48 +00:00
Jim Grosbach
06eae84c89 FileCheck'ize test, and add a bit to test for r157221.
llvm-svn: 157222
2012-05-21 23:50:00 +00:00
Jim Grosbach
6e9ef9c931 ARM: .end_data_region mismatch in Thumb2.
32-bit offset jump tables just use real branch instructions and so aren't
marked as data regions. We were still emitting the .end_data_region
marker though, which assert()ed.

rdar://11499158

llvm-svn: 157221
2012-05-21 23:34:42 +00:00
Pete Cooper
869fc085f9 Added address space qualifier to intrinsic PointerType arguments.
llvm-svn: 157218
2012-05-21 23:21:28 +00:00
Owen Anderson
da2ddf18dc Fix use of an unitialized value in the LegalizeOps expansion for ISD::SUB. No in-tree targets exercise this path.
Patch by Micah Villmow.

llvm-svn: 157215
2012-05-21 22:39:20 +00:00
Jim Grosbach
85edf59851 Thumb2: RSB source register should be rGRP not GPRnopc.
t2RSB defined the operand correctly, but tRSBS didn't.

llvm-svn: 157200
2012-05-21 17:57:17 +00:00
Dan Gohman
992a69b57c Mark an unreachable region of code with llvm_unreachable.
llvm-svn: 157197
2012-05-21 17:41:28 +00:00
Chad Rosier
8d8d0f7479 Typo.
llvm-svn: 157195
2012-05-21 17:13:41 +00:00
Owen Anderson
6187e32939 Make it so that the MArch, MCPU, MAttrs passed to EngineBuilder are actually used.
Patch by Jose Fonseca.

llvm-svn: 157191
2012-05-21 16:57:17 +00:00
Patrik Hägglund
80e0e52143 test commit
llvm-svn: 157184
2012-05-21 13:18:06 +00:00
Stepan Dyatkovskiy
98d41ce6af PR1255 (case ranges: work with ConstantRangesSet instead of ConstantInt) related changes for Execution and Verifier.
llvm-svn: 157183
2012-05-21 10:44:40 +00:00
Craig Topper
57d54b1831 Allow 256-bit shuffles to still be split even if only half of the shuffle comes from two 128-bit pieces.
llvm-svn: 157175
2012-05-21 06:40:16 +00:00
Jakob Stoklund Olesen
c058c41261 Give a small negative bias to giant edge bundles.
This helps compile time when the greedy register allocator splits live
ranges in giant functions. Without the bias, we would try to grow
regions through the giant edge bundles, usually to find out that the
region became too big and expensive.

If a live range has many uses in blocks near the giant bundle, the small
negative bias doesn't make a big difference, and we still consider
regions including the giant edge bundle.

Giant edge bundles are usually connected to landing pads or indirect
branches.

llvm-svn: 157174
2012-05-21 03:11:23 +00:00
Jakob Stoklund Olesen
dadb6e60b9 Clear kill flags on the fly when joining intervals.
With physreg joining out of the way, it is easy to recognize the
instructions that need their kill flags cleared while testing for
interference.

This allows us to skip the final scan of all instructions for an 11%
speedup of the coalescer pass.

llvm-svn: 157169
2012-05-20 21:41:05 +00:00
Nick Lewycky
c86575e757 Add RPO to the lexicon.
llvm-svn: 157166
2012-05-20 20:30:47 +00:00
Jakob Stoklund Olesen
e9ba1b5df0 Make the global base reg GR32_NOSP.
It can sometimes be used in addressing modes that don't support %ESP.

llvm-svn: 157165
2012-05-20 18:43:00 +00:00
Jakob Stoklund Olesen
904bc4185f Constrain regclasses in PeepholeOptimizer.
It can be necessary to restrict to a sub-class before accessing
sub-registers.

llvm-svn: 157164
2012-05-20 18:42:55 +00:00
Jakob Stoklund Olesen
12cd5a3007 Constrain register classes in TailDup.
When rewriting operands, make sure the new registers have a compatible
register class.

llvm-svn: 157163
2012-05-20 18:42:51 +00:00
Peter Collingbourne
c9e3c75c4d When legalising shifts, do not pre-build a list of operands which
may be RAUW'd by the recursive call to LegalizeOps; instead, retrieve
the other operands when calling UpdateNodeOperands.  Fixes PR12889.

llvm-svn: 157162
2012-05-20 18:36:15 +00:00
Benjamin Kramer
d8782377c7 Emit memcmp directly from the StringMatcherEmitter.
There should be no difference in the resulting binary, given a sufficiently
smart compiler. However we already had compiler timeouts on the generated
code in Intrinsics.gen, this hopefully makes the lives of slow buildbots a
little easier.

llvm-svn: 157161
2012-05-20 18:10:42 +00:00
Benjamin Kramer
e42f976213 Plug a leak when using MCJIT.
Found by valgrind.

llvm-svn: 157160
2012-05-20 17:24:08 +00:00
Hal Finkel
9fad4cf803 Add a missing PPC 64-bit stwu pattern.
This seems to fix the remaining compile-time failures on PPC64 when
compiling with -enable-ppc-preinc.

llvm-svn: 157159
2012-05-20 17:11:24 +00:00
Benjamin Kramer
fda11b2327 Use TargetMachine's register info instead of creating a new one and leaking it.
llvm-svn: 157155
2012-05-20 11:24:27 +00:00
Jakob Stoklund Olesen
bedc5bbb62 Use the right register class for LDRrs.
llvm-svn: 157152
2012-05-20 06:38:47 +00:00
Jakob Stoklund Olesen
3bee83c3a5 Transfer memory operands to the right instruction.
They need to go on the PICLDR as the verifier points out.

llvm-svn: 157151
2012-05-20 06:38:42 +00:00
Jakob Stoklund Olesen
ed19f92618 Properly constrain register classes for sub-registers.
Not all GR64 registers have sub_8bit sub-registers.

llvm-svn: 157150
2012-05-20 06:38:37 +00:00
Jakob Stoklund Olesen
3979d32abd Properly constrain register classes in 2-addr.
X86 has 2-addr instructions with different constraints on the tied def
and use operands. One is GR32, one is GR32_NOSP.

llvm-svn: 157149
2012-05-20 06:38:32 +00:00
Jakob Stoklund Olesen
e2ec343323 Missed a push_back in r157147.
llvm-svn: 157148
2012-05-20 05:28:53 +00:00
Jakob Stoklund Olesen
72efb98f61 Avoid deleting extra copies when RegistersDefinedFromSameValue is true.
This function adds copies to be erased to DupCopies, avoid also adding
them to DeadCopies.

llvm-svn: 157147
2012-05-20 04:52:48 +00:00
Jakob Stoklund Olesen
04202f992f Fix build bots.
Avoid looking at the operands of a potentially erased instruction.

llvm-svn: 157146
2012-05-20 03:57:12 +00:00
Jakob Stoklund Olesen
9d172f4b64 LiveRangeQuery simplifies shrinkToUses().
llvm-svn: 157145
2012-05-20 02:54:52 +00:00
Jakob Stoklund Olesen
d43dc753ee Use LiveRangeQuery in ScheduleDAGInstrs.
llvm-svn: 157144
2012-05-20 02:44:38 +00:00
Jakob Stoklund Olesen
5d95a00a3b Eliminate some uses of struct LiveRange.
That struct ought to be a LiveInterval implementation detail.

llvm-svn: 157143
2012-05-20 02:44:36 +00:00
Jakob Stoklund Olesen
ef9f8dc31c Use LiveRangeQuery instead of getLiveRangeContaining().
llvm-svn: 157142
2012-05-20 02:44:33 +00:00
Jakob Stoklund Olesen
178f5ce549 Add a LiveRangeQuery class.
This class is meant to be the primary interface for examining a live
range in the vicinity on a given instruction. It avoids all the messy
dealings with iterators and early clobbers.

This is a more abstract interface to live ranges, hiding the
implementation as a vector of segments.

llvm-svn: 157141
2012-05-20 02:44:30 +00:00
Peter Collingbourne
4b4c08e616 Do not pass an invalid domtree to SimplifyInstruction from
LoopUnswitch.  Fixes PR12887.

llvm-svn: 157140
2012-05-20 01:32:09 +00:00
Jakob Stoklund Olesen
3a4b342af1 Simplify overlap check.
llvm-svn: 157137
2012-05-19 23:59:27 +00:00
Jakob Stoklund Olesen
207108d4a4 Fix 12892.
Dead code elimination during coalescing could cause a virtual register
to be split into connected components. The following rewriting would be
confused about the already joined copies present in the code, but
without a corresponding value number in the live range.

Erase all joined copies instantly when joining intervals such that the
MI and LiveInterval representations are always in sync.

llvm-svn: 157135
2012-05-19 23:34:59 +00:00
Peter Collingbourne
0baed83df2 Do not eliminate allocas whose alignment exceeds that of the
copied-in constant, as a subsequent user may rely on over alignment.
Fixes PR12885.

llvm-svn: 157134
2012-05-19 22:52:10 +00:00
Hal Finkel
259ded3876 Add a FIXME about access to negative stack-pointer offsets on PPC32.
The current code will generate a prologue which starts with something like:
        mflr 0
        stw 31, -4(1)
        stw 0, 4(1)
        stwu 1, -16(1)

But under the PPC32 SVR4 ABI, access to negative offsets from R1 is not allowed.

This was pointed out by Peter Bergner.

llvm-svn: 157133
2012-05-19 21:52:55 +00:00
Jakob Stoklund Olesen
01ab5e172d Remove the late DCE in RegisterCoalescer.
Dead code and joined copies are now eliminated on the fly, and there is
no need for a post pass.

This makes the coalescer work like other modern register allocator
passes: Code is changed on the fly, there is no pending list of changes
to be committed.

llvm-svn: 157132
2012-05-19 21:02:31 +00:00
Jakob Stoklund Olesen
81d77434d9 Erase joined copies immediately.
The late dead code elimination is no longer necessary.

The test changes are cause by a register hint that can be either %rdi or
%rax. The choice depends on the use list order, which this patch changes.

llvm-svn: 157131
2012-05-19 20:54:07 +00:00
Jakob Stoklund Olesen
b2eb997a2c Fix an ancient bug in removeCopyByCommutingDef().
Before rewriting uses of one value in A to register B, check that there
are no tied uses. That would require multiple A values to be rewritten.

This bug can't bite in the current version of the code for a fairly
subtle reason: A tied use would have caused 2-addr to insert a copy
before the use. If the copy has been coalesced, it will be found by the
same loop changed by this patch, and the optimization is aborted.

This was exposed by 400.perlbench and lua after applying a patch that
deletes joined copies aggressively.

llvm-svn: 157130
2012-05-19 20:54:03 +00:00
Nadav Rotem
a46c75d9a7 On Haswell, perfer storing YMM registers using a single instruction.
llvm-svn: 157129
2012-05-19 20:30:08 +00:00
Nadav Rotem
441318ee29 Add support for additional in-reg vbroadcast patterns
llvm-svn: 157127
2012-05-19 19:57:37 +00:00
Benjamin Kramer
386e9a3f75 Disambiguate call to operator==.
clang++ and msvc happily had no problem with it but g++ refuses to compile.

llvm-svn: 157126
2012-05-19 19:32:11 +00:00
Jakob Stoklund Olesen
7b0808e107 Collect inflatable virtual registers on the fly.
There is no reason to defer the collection of virtual registers whose
register class may be replaced with a larger class.

llvm-svn: 157125
2012-05-19 19:25:00 +00:00