Commit Graph

84784 Commits

Author SHA1 Message Date
Kostya Serebryany
a56cf96db5 [asan] extend the blacklist functionality to handle global-init. Patch by Reid Watson
llvm-svn: 163199
2012-09-05 07:29:56 +00:00
Craig Topper
864ef1eec5 Remove some of the patterns added in r163196. Increasing the complexity on insert_subvector into undef accomplishes the same thing.
llvm-svn: 163198
2012-09-05 07:26:35 +00:00
Craig Topper
f029cfe913 Add patterns for integer forms of VINSERTF128/VINSERTI128 folded with loads. Also add patterns to turn subvector inserts with loads to index 0 of an undef into VMOVAPS.
llvm-svn: 163196
2012-09-05 06:58:39 +00:00
Chad Rosier
d18aee2236 Add a FIXME that assumes we maintain backward compatibility until the next major release.
llvm-svn: 163195
2012-09-05 06:28:52 +00:00
Logan Chien
d6babb951e Reorder the comments of EmitExceptionTable.
llvm-svn: 163194
2012-09-05 06:28:26 +00:00
Logan Chien
a15abb3d65 Fix UseInitArray option for MIPS target.
llvm-svn: 163193
2012-09-05 06:17:17 +00:00
Craig Topper
6274d26545 Convert vextracti128/vextractf128 intrinsics to extract_subvector at DAG build time. Similar was previously done for vinserti128/vinsertf128. Add patterns for folding these extract_subvectors with stores.
llvm-svn: 163192
2012-09-05 05:48:09 +00:00
Marshall Clow
86cc403d56 Removed Trie.h; unused in a long time
llvm-svn: 163191
2012-09-05 03:18:55 +00:00
Richard Smith
8213d2a51b Remove redundant semicolons to fix -pedantic-errors build.
llvm-svn: 163190
2012-09-05 01:41:37 +00:00
Chad Rosier
b75afa43e4 Fix function name per coding standard.
llvm-svn: 163187
2012-09-05 01:15:43 +00:00
Chad Rosier
63608419b5 Fix function name per coding standard.
llvm-svn: 163186
2012-09-05 01:02:38 +00:00
Chad Rosier
00a82f13af [ms-inline asm] Add support for the nsdialect keyword in the Bitcode
Reader/Writer.

llvm-svn: 163185
2012-09-05 00:56:20 +00:00
Chad Rosier
aaab764144 [ms-inline asm] Add the nsdialect keyword to the lexer.
llvm-svn: 163184
2012-09-05 00:51:02 +00:00
Chad Rosier
aaee8ac173 [ms-inline asm] Emit the (new) inline asm Non-Standard Dialect attribute.
llvm-svn: 163181
2012-09-05 00:08:17 +00:00
Dan Gohman
e90f78d5cd Make provenance checking conservative in cases when
pointers-to-strong-pointers may be in play. These can lead to retains and
releases happening in unstructured ways, foiling the optimizer. This fixes
rdar://12150909.

llvm-svn: 163180
2012-09-04 23:16:20 +00:00
Jakub Staszak
fea8f898f4 BypassSlowDivision: Assign to reference, don't copy the object.
llvm-svn: 163179
2012-09-04 23:11:11 +00:00
Jakob Stoklund Olesen
2cda807309 Search the whole instruction for tied operands.
Implicit uses can be dynamically tied to defs. This will soon be used
for predicated instructions on ARM.

llvm-svn: 163177
2012-09-04 22:59:30 +00:00
Chad Rosier
46ed647f1e [ms-inline asm] Add the inline assembly dialect, AsmDialect, to the InlineAsm
class.

llvm-svn: 163175
2012-09-04 22:46:24 +00:00
Chad Rosier
b049a3421f [ms-inline asm] Remove the Inline Asm Non-Standard Dialect attribute. This
implementation does not co-exist well with how the sideeffect and alignstack
attributes are handled.  The reverts r161641.

llvm-svn: 163174
2012-09-04 22:29:45 +00:00
David Blaikie
258495d9ac [LIT] Add a clang_tools_extra_site_cfg to match the various other site_cfg.
This doesn't seem ideal, perhaps we could just keep the llvm_site_cfg and have
other config (clang and clang-tools-extra) derive their site_cfg from that.

Suggestions/complaints/ideas welcome.

llvm-svn: 163171
2012-09-04 22:09:04 +00:00
Jakub Staszak
a5fd74206a Fix my previous patch (r163164). It does now what it is supposed to do:
Doesn't set MadeChange to TRUE if BypassSlowDivision doesn't change anything.

llvm-svn: 163165
2012-09-04 21:16:59 +00:00
Jakub Staszak
b2faa176c4 Return false if BypassSlowDivision doesn't change anything.
Also a few minor changes:
- use pre-inc instead of post-inc
- use isa instead of dyn_cast
- 80 col
- trailing spaces

llvm-svn: 163164
2012-09-04 20:48:24 +00:00
Jakub Staszak
be574b61dd Remove unneeded code.
llvm-svn: 163160
2012-09-04 19:49:17 +00:00
Jakob Stoklund Olesen
50ac7b577c Typo.
llvm-svn: 163154
2012-09-04 18:44:43 +00:00
Jakob Stoklund Olesen
a017c9c48b Actually use the MachineOperand field for isRegTiedToDefOperand().
The MachineOperand::TiedTo field was maintained, but not used.

This patch enables it in isRegTiedToDefOperand() and
isRegTiedToUseOperand() which are the actual functions use by the
register allocator.

llvm-svn: 163153
2012-09-04 18:43:25 +00:00
Jakob Stoklund Olesen
ef5dcf47b8 Move tie checks into MachineVerifier::visitMachineOperand.
llvm-svn: 163152
2012-09-04 18:38:28 +00:00
Jakob Stoklund Olesen
87d2cdf93b Allow tied uses and defs in different orders.
After much agonizing, use a full 4 bits of precious MachineOperand space
to encode this. This uses existing padding, and doesn't grow
MachineOperand beyond its current 32 bytes.

This allows tied defs among the first 15 operands on a normal
instruction, just like the current MCInstrDesc constraint encoding.
Inline assembly needs to be able to tie more than the first 15 operands,
and gets special treatment.

Tied uses can appear beyond 15 operands, as long as they are tied to a
def that's in range.

llvm-svn: 163151
2012-09-04 18:36:28 +00:00
Preston Gurd
c80dc7d214 Generic Bypass Slow Div
- CodeGenPrepare pass for identifying div/rem ops
- Backend specifies the type mapping using addBypassSlowDivType
- Enabled only for Intel Atom with O2 32-bit -> 8-bit
- Replace IDIV with instructions which test its value and use DIVB if the value
is positive and less than 256.
- In the case when the quotient and remainder of a divide are used a DIV
and a REM instruction will be present in the IR. In the non-Atom case
they are both lowered to IDIVs and CSE removes the redundant IDIV instruction,
using the quotient and remainder from the first IDIV. However,
due to this optimization CSE is not able to eliminate redundant
IDIV instructions because they are located in different basic blocks.
This is overcome by calculating both the quotient (DIV) and remainder (REM)
in each basic block that is inserted by the optimization and reusing the result
values when a subsequent DIV or REM instruction uses the same operands.
- Test cases check for the presents of the optimization when calculating
either the quotient, remainder,  or both.

Patch by Tyler Nowicki!

llvm-svn: 163150
2012-09-04 18:22:17 +00:00
Bob Wilson
3277095910 Make sure macros in the include subdirectory are not used without being defined.
Rationale: For each preprocessor macro, either the definedness is what's
meaningful, or the value is what's meaningful, or both. If definedness is
meaningful, we should use #ifdef. If the value is meaningful, we should use
and #ifdef interchangeably for the same macro, seems ugly to me, even if
undefined macros are zero if used.

This also has the benefit that including an LLVM header doesn't prevent
you from compiling with -Wundef -Werror.

Patch by John Garvin!
<rdar://problem/12189979>

llvm-svn: 163148
2012-09-04 17:42:53 +00:00
Sergei Larin
905bc1964f Porting Hexagon MI Scheduler to the new API.
Change current Hexagon MI scheduler to use new converging
scheduler. Integrates DFA resource model into it.

llvm-svn: 163137
2012-09-04 14:49:56 +00:00
Arnold Schwaighofer
d606c6fcdf Patch to implement UMLAL/SMLAL instructions for the ARM architecture
This patch corrects the definition of umlal/smlal instructions and adds support
for matching them to the ARM dag combiner.

Bug 12213

Patch by Yin Ma!

llvm-svn: 163136
2012-09-04 14:37:49 +00:00
Elena Demikhovsky
61924c155d This patch optimizes shuffle instruction - generates 2 instructions instead of 4.
Since this specific shuffle is widely used in many workloads we have ~10% performance on them.

shufflevector <8 x float> %A, <8 x float> %B, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>

vmovaps (%rdx), %ymm0
vshufps $8, %ymm0, %ymm0, %ymm0
vmovaps (%rcx), %ymm1
vshufps $8, %ymm0, %ymm1, %ymm1
vunpcklps       %ymm0, %ymm1, %ymm0

vmovaps (%rcx), %ymm0
vmovsldup       (%rdx), %ymm1
vblendps        $85, %ymm0, %ymm1, %ymm0

llvm-svn: 163134
2012-09-04 12:49:02 +00:00
Nadav Rotem
d57aaf8ae1 LICM may hoist an instruction with undefined behavior above a trap.
Scan the body of the loop and find instructions that may trap.
Use this information when deciding if it is safe to hoist or sink instructions.
Notice that we can optimize the search of instructions that may throw in the case of nested loops.

rdar://11518836

llvm-svn: 163132
2012-09-04 10:25:04 +00:00
Evgeniy Stepanov
d74d632931 Fix Android build of gtest and lib/Support.
llvm-svn: 163131
2012-09-04 09:14:45 +00:00
Alexey Samsonov
0dd3d6f49e Add support for fetching inlining context (stack of source code locations)
by instruction address from DWARF.

Add --inlining flag to llvm-dwarfdump to demonstrate and test this functionality,
so that "llvm-dwarfdump --inlining --address=0x..." now works much like
"addr2line -i 0x...", provided that the binary has debug info
(Clang's -gline-tables-only *is* enough).

llvm-svn: 163128
2012-09-04 08:12:33 +00:00
Bob Wilson
00bddec249 Be conservative about allocations that may alias the accessed pointer.
If an allocation has a must-alias relation to the access pointer, we treat it
as a Def.  Otherwise, without this check, the code here was just skipping over
the allocation call and ignoring it.  I noticed this by inspection and don't
have a specific testcase that it breaks, but it seems like we need to treat
a may-alias allocation as a Clobber.

llvm-svn: 163127
2012-09-04 03:30:13 +00:00
Chad Rosier
f24d0a24c7 [ms-inline asm] Make comment more verbose and add an assert.
llvm-svn: 163125
2012-09-03 20:37:01 +00:00
Chad Rosier
294688cf56 [ms-inline asm] Asm operands can map to one or more MCOperands. Therefore, add
the NumMCOperands argument to the GetMCInstOperandNum() function that is set
to the number of MCOperands this asm operand mapped to.

llvm-svn: 163124
2012-09-03 20:31:23 +00:00
Chad Rosier
6d692c7883 [ms-inline asm] Add a comment.
llvm-svn: 163123
2012-09-03 19:04:35 +00:00
Chad Rosier
bd31fcd8a9 [ms-inline asm] Add an interface to the GetMCInstOperandNum() function in the
MCTargetAsmParser class.

llvm-svn: 163122
2012-09-03 18:47:45 +00:00
Chad Rosier
2a0cfdfaf2 Remove extraneous return.
llvm-svn: 163119
2012-09-03 17:39:57 +00:00
Chad Rosier
7ed8b33ece [ms-inline asm] Return the MCOperandNum instead of passing a reference.
llvm-svn: 163118
2012-09-03 17:33:50 +00:00
Roman Divacky
1a4b67cd3a Remove always true checks. Noticed by Adhemerval Zanella.
llvm-svn: 163117
2012-09-03 16:55:42 +00:00
Chad Rosier
bb0dcf509a Add braces to the case statement.
llvm-svn: 163116
2012-09-03 16:21:15 +00:00
Benjamin Kramer
107f9baa39 IRBuilderify the SjlLjEHPrepare pass.
No functionality change.

llvm-svn: 163115
2012-09-03 12:27:43 +00:00
Lang Hames
bfcd5e689a When updating live range endpoints, make sure to preserve the early clobber bit.
Fixs PR13719.

llvm-svn: 163107
2012-09-03 06:31:45 +00:00
Bob Wilson
8f6487007d Fix more fallout from r158919, similar to PR13547.
This code used to only handle malloc-like calls, which do not read memory.
r158919 changed it to check isNoAliasFn(), which includes strdup-like and
realloc-like calls, but it was not checking for dependencies on the memory
read by those calls.

llvm-svn: 163106
2012-09-03 05:15:15 +00:00
Chad Rosier
fac2e7b419 Removed unused argument.
llvm-svn: 163104
2012-09-03 03:16:09 +00:00
Chris Lattner
4a8f2bcb32 some peepholes that should match horizontal add/sub operations.
llvm-svn: 163103
2012-09-03 02:58:21 +00:00
Chad Rosier
6fbf85d859 [ms-inline asm] Expose the Kind and Opcode variables from the
MatchInstructionImpl() function.

These values are used by the ConvertToMCInst() function to index into the
ConversionTable.  The values are also needed to call the GetMCInstOperandNum()
function.

llvm-svn: 163101
2012-09-03 02:06:46 +00:00