RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-02-15 17:58:50 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
87,805 Commits 6 Branches 6 Tags
Commit Graph

58258 Commits

Author SHA1 Message Date
Nadav Rotem
4cad811734 If all of the write objects are identified then we can vectorize the loop even if the read objects are unidentified. 
PR14719.

llvm-svn: 171124
 2012-12-26 23:30:53 +00:00
Craig Topper
9e3cb122f1 Fix operands and encoding form for ARPL instruction. Register form had and reversed. Memory form writes memory, but was marked as MRMSrcMem. 
llvm-svn: 171123
 2012-12-26 23:27:57 +00:00
Craig Topper
fe4506dc6c Add hasSideEffects=0 to some atomic instructions. 
llvm-svn: 171122
 2012-12-26 23:08:12 +00:00
Craig Topper
c4205e1d63 Mark the AL/AX/EAX forms of the basic arithmetic operations has never having side effects. 
llvm-svn: 171121
 2012-12-26 22:19:23 +00:00
Nick Lewycky
7f19cf03a6 80 columns. No functionality change. 
llvm-svn: 171120
 2012-12-26 22:00:49 +00:00
Nick Lewycky
3aba2e21ea Remove mid-optimizer warning. This situation should be handled differently, 
such as by a compiler warning, a check in clang -fsanitizer=undefined, being
optimized to unreachable, or a combination of the above. PR14722.

llvm-svn: 171119
 2012-12-26 22:00:35 +00:00
Craig Topper
152bee45fa Mark all the _REV instructions as not having side effects. They aren't really emitted by the backend, but it reduces the number of instructions in the output files with unmodelled side effects to make auditing easier. 
llvm-svn: 171118
 2012-12-26 21:30:22 +00:00
Craig Topper
2b01799bba Remove a special conditional setting of neverHasSideEffects if the instruction didn't have a pattern. This was leftover from when tablegen used to complain if things were already inferred from patterns. 
llvm-svn: 171117
 2012-12-26 21:04:30 +00:00
Nadav Rotem
90712b89cc LoopVectorizer: Optimize the vectorization of consecutive memory access when the iteration step is -1 
llvm-svn: 171114
 2012-12-26 19:08:17 +00:00
Evgeniy Stepanov
3c52fb6e43 [msan] Raise alignment of origin stores/loads when possible. 
Origin alignment is as high as the alignment of the corresponding application
location, but never less than 4.

llvm-svn: 171110
 2012-12-26 11:55:09 +00:00
Evgeniy Stepanov
e64939756e [msan] Expand the file comment with track-origins info. 
llvm-svn: 171109
 2012-12-26 10:59:00 +00:00
Craig Topper
d3212f7ab5 Merge still more SSE/AVX instruction definitions. 
llvm-svn: 171103
 2012-12-26 07:54:43 +00:00
Craig Topper
e1a7e48937 Merge more SSE/AVX instruction definitions. 
llvm-svn: 171102
 2012-12-26 07:20:35 +00:00
Craig Topper
e11b743aa8 Fix 80 column violation. 
llvm-svn: 171097
 2012-12-26 06:15:53 +00:00
Craig Topper
6bb87eb1c5 Fix class name in comment. 
llvm-svn: 171096
 2012-12-26 06:15:09 +00:00
Craig Topper
6548cfbc58 Merge SSE/AVX PCMPEQ/PCMPGT instruction definitions. 
llvm-svn: 171095
 2012-12-26 06:14:15 +00:00
Craig Topper
891ef3c0d5 Remove 'v' from mnemonic to fix asm matching failures. 
llvm-svn: 171093
 2012-12-26 06:02:15 +00:00
Craig Topper
0466a426a3 Use an additional multiclass to merge the 128/256-bit SSE/AVX instruction definitions for a bunch of SSE2 integer arithmetic instructions. 
llvm-svn: 171092
 2012-12-26 05:49:15 +00:00
Nadav Rotem
715148a69d Reformat the docs. 
llvm-svn: 171091
 2012-12-26 04:59:20 +00:00
Craig Topper
cc9b1f307a Use an additional multiclass to merge the 128/256-bit SSE/AVX instruction definitions for PAND/POR/PXOR/PANDN 
llvm-svn: 171087
 2012-12-26 04:36:03 +00:00
Craig Topper
aabd76dd28 Merge an AVX/SSE 256-bit and 128-bit multiclass. 
llvm-svn: 171086
 2012-12-26 03:56:47 +00:00
Craig Topper
0b8d42715a Mark VANDNPD/VANDNPDS as not commutable. 
llvm-svn: 171085
 2012-12-26 03:48:10 +00:00
Craig Topper
771f143613 Remove alignment from a bunch more VEX encoded operations in the folding tables. 
llvm-svn: 171082
 2012-12-26 02:44:47 +00:00
Craig Topper
284833f94e Remove alignment from folding table for VMOVUPD as an unaligned instruction it shouldn't require alignment... 
llvm-svn: 171081
 2012-12-26 02:14:19 +00:00
Craig Topper
ca9f2be634 Remove alignment requirements from (V)EXTRACTPS. This instruction does 32-bit stores which aren't required to be aligned on SSE or AVX. 
llvm-svn: 171080
 2012-12-26 01:47:12 +00:00
Hal Finkel
7cfc448749 BBVectorize: Use VTTI to compute costs for intrinsics vectorization 
For the time being this includes only some dummy test cases. Once the
generic implementation of the intrinsics cost function does something other
than assuming scalarization in all cases, or some target specializes the
interface, some real test cases can be added.

Also, for consistency, I changed the type of IID from unsigned to Intrinsic::ID
in a few other places.

llvm-svn: 171079
 2012-12-26 01:36:57 +00:00
Craig Topper
b5af563b7e Remove alignment requirement from VCVTSS2SD in folding tables. Reverting r171049. This instruction doesn't require alignment. 
llvm-svn: 171078
 2012-12-26 00:35:47 +00:00
Hal Finkel
f9b3cb9121 LoopVectorize: Enable vectorization of the fmuladd intrinsic 
llvm-svn: 171076
 2012-12-25 23:21:29 +00:00
Hal Finkel
8299a9e0b2 BBVectorize: Enable vectorization of the fmuladd intrinsic 
llvm-svn: 171075
 2012-12-25 22:36:08 +00:00
Hal Finkel
6b98f1baa2 Expand PPC64 atomic load and store 
Use of store or load with the atomic specifier on 64-bit types would
cause instruction-selection failures. As with the 32-bit case, these
can use the default expansion in terms of cmp-and-swap.

llvm-svn: 171072
 2012-12-25 17:22:53 +00:00
Evgeniy Stepanov
f41a8d635d [msan] Fix handling of vectors of pointers. 
VectorType::getInteger() can not be used with them, because pointer size
depends on the target.

llvm-svn: 171070
 2012-12-25 16:04:38 +00:00
Evgeniy Stepanov
e7fdcc5fe1 [msan] Fix handling of select with vector condition. 
llvm-svn: 171069
 2012-12-25 14:56:21 +00:00
Benjamin Kramer
e4eabce005 X86: Shave off one shuffle from the pcmpeqq sequence for SSE2 by making use of and commutativity. 
llvm-svn: 171064
 2012-12-25 13:09:08 +00:00
Benjamin Kramer
2e313ba01d X86: Custom lower <2 x i64> eq and ne when SSE41 is not available. 
pcmpeqd, pshufd, pshufd, pand is cheaper than unpack + cmpq, sbbq, cmpq, sbbq + pack.
Small speedup on loop-vectorized viterbi (-march=core2).

llvm-svn: 171063
 2012-12-25 12:54:19 +00:00
Alexey Samsonov
c191ee3e37 ASan: initialize callbacks from ASan module pass in a separate function for consistency 
llvm-svn: 171061
 2012-12-25 12:28:20 +00:00
Alexey Samsonov
42f6219321 ASan: move stack poisoning logic into FunctionStackPoisoner struct 
llvm-svn: 171060
 2012-12-25 12:04:36 +00:00
Nick Lewycky
654d7933b1 Fix whitespace. No functionality change. 
llvm-svn: 171051
 2012-12-25 06:13:25 +00:00
Nadav Rotem
3017e5481d VCVTSS2SD requires a strict alignment. Thanks Elena. 
llvm-svn: 171049
 2012-12-25 03:29:18 +00:00
Bob Wilson
b0b344d1f6 Rename LLVMContext diagnostic handler types and functions. 
These are now generally used for all diagnostics from the backend, not just
for inline assembly, so this drops the "InlineAsm" from the names.  No
functional change.  (I've left aliases for the old names but only for long
enough to let me switch over clang to use the new ones.)

llvm-svn: 171047
 2012-12-25 00:07:12 +00:00
Nick Lewycky
3a64ce7001 Quiet gcc's -Wparenthesis warning. No functionality change. 
llvm-svn: 171044
 2012-12-24 19:58:45 +00:00
Benjamin Kramer
c41131afed Use a std::string rather than a dynamically allocated char* buffer. 
This affords us to use std::string's allocation routines and use the destructor
for the memory management. Switching to that also means that we can use
operator==(const std::string&, const char *) to perform the string comparison
rather than resorting to libc functionality (i.e. strcmp).

Patch by Saleem Abdulrasool!

Differential Revision: http://llvm-reviews.chandlerc.com/D230

llvm-svn: 171042
 2012-12-24 19:23:30 +00:00
Bob Wilson
94a94e9500 Add LLVMContext::emitWarning methods and use them. <rdar://problem/12867368> 
When the backend is used from clang, it should produce proper diagnostics
instead of just printing messages to errs(). Other clients may also want to
register their own error handlers with the LLVMContext, and the same handler
should work for warnings in the same way as the existing emitError methods.

llvm-svn: 171041
 2012-12-24 18:15:21 +00:00
Nadav Rotem
286f6b8ea1 CostModel: We have API for checking the costs of known shuffles. This patch adds 
support for the insert-subvector and extract-subvector kinds.

llvm-svn: 171027
 2012-12-24 10:04:03 +00:00
Elena Demikhovsky
33e7b6276c Added 6 more value types: v32i1, v64i1, v32i16, v32i8, v64i8, v8f64 
llvm-svn: 171026
 2012-12-24 10:03:57 +00:00
Elena Demikhovsky
9c47e68af1 Removed "static" from "__jit_debug_descriptor" because "static" adds C++ mangling prefix to this symbol. 
llvm-svn: 171025
 2012-12-24 09:42:27 +00:00
Nadav Rotem
37de0ccb55 Some x86 instructions can load/store one of the operands to memory. On SSE, this memory needs to be aligned. 
When these instructions are encoded in VEX (on AVX) there is no such requirement. This changes the folding
tables and removes the alignment restrictions from VEX-encoded instructions.

llvm-svn: 171024
 2012-12-24 09:40:33 +00:00
Nadav Rotem
ace51e510e LoopVectorizer: When checking for vectorizable types, also check 
the StoreInst operands.

PR14705.

llvm-svn: 171023
 2012-12-24 09:14:18 +00:00
Nadav Rotem
f8f6a2ff97 Change the codegen Cost Model API for shuffeles. This patch removes the API for broadcast and adds a more general API that accepts an enum of known shuffles. 
llvm-svn: 171022
 2012-12-24 08:57:47 +00:00
Alexey Samsonov
40f2e8fde5 Fix typo in comments 
llvm-svn: 171021
 2012-12-24 08:52:53 +00:00
Nadav Rotem
9dde42c312 Update the docs of the cost model. 
llvm-svn: 171016
 2012-12-24 05:51:12 +00:00