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106 Commits

Author SHA1 Message Date
Bob Wilson
ac3735b7fb Emit spaces after commas in Neon register lists. This is more consistent 
with the rest of the assembly output, is easier to read, and matches the
expected output for gcc's Neon tests.

llvm-svn: 93703
 2010-01-18 01:24:43 +00:00
Bob Wilson
72cf548263 The Neon "vtst" instruction takes a suffix that is the element size alone -- 
adding an "i" to the suffix, indicating that the elements are integers, is
accepted but not part of the standard syntax.  This helps us pass a few more
of the Neon tests from gcc.

llvm-svn: 93677
 2010-01-17 06:35:17 +00:00
Johnny Chen
e3171163da For VLDM/VSTM (Advanced SIMD), set encoding bits Inst{11-8} to 0b1011. 
llvm-svn: 90243
 2009-12-01 17:37:06 +00:00
Johnny Chen
7f7f23087c For VMOV (immediate), make some of the encoding bits (cmode and op) unspecified. 
For VMOVv*i[16,32], op bit is don't care, and some cmode bits vary depending on
the immediate values.

Ref: Table A7-15 Modified immediate values for Advanced SIMD instructions.
llvm-svn: 90173
 2009-12-01 00:02:02 +00:00
Evan Cheng
8c9f6147cd Massive refactoring of NEON instructions. Separate opcode from data size specifier suffix, move \t up stream to instruction format, and fix more 80 column violations. 
This fixes the NEON asm printing so the "predicate" field is printed between the opcode and the data type suffix.

llvm-svn: 89706
 2009-11-23 21:57:23 +00:00
Johnny Chen
e59a67f527 Partially revert r84730 by removing N2VDup from ARMInstrFormats.td and modifying 
VDUPLND and VDUPLNQ to derive from N2V instead of N2VDup.  VDUPLND and VDUPLNQ
now expect op19_18 and op17_16 as the first two args.

llvm-svn: 89699
 2009-11-23 21:00:43 +00:00
Johnny Chen
9999d2524e Revert r84572 by removing N3VImm from ARMInstrFormats.td now that we can specify 
{?,?,?,?} as op11_8 for VEXTd and VEXTq.

llvm-svn: 89693
 2009-11-23 20:09:13 +00:00
Johnny Chen
b49fe624e7 Partially revert r89377 by removing NLdStLN class definition from 
ARMInstrFormats.td and fixing VLD[234]LN* and VST[234]LN* to derive from NLdSt
instead of NLdStLN.

llvm-svn: 89684
 2009-11-23 18:16:16 +00:00
Johnny Chen
1116f46301 Make it clear that the index bit(s) of Vector Get Lane and Vector Set Lane 
should be left unspecified now that Bob Wilson has fixed pr5470.

llvm-svn: 89676
 2009-11-23 17:48:17 +00:00
Evan Cheng
a7496ef9a6 Add predicate operand to NEON instructions. Fix lots (but not all) 80 col violations in ARMInstrNEON.td. 
llvm-svn: 89542
 2009-11-21 06:21:52 +00:00
Johnny Chen
346e6b6cac Added NLdStLN which is similar to NLdSt with the exception that op7_4 is not 
fully specified at this level.  Subclasses of NLdStLN can specify selective
bit(s) for Inst{7-4}, as is done for VLD[234]LN* and VST[234]LN* inside
ARMInstrNEON.td.

llvm-svn: 89377
 2009-11-19 19:20:17 +00:00
Evan Cheng
a47f2ea71d Use table to separate opcode from operands. 
llvm-svn: 86965
 2009-11-12 07:16:34 +00:00
Jim Grosbach
ea6c9c17f5 Use Unified Assembly Syntax for the ARM backend. 
llvm-svn: 86494
 2009-11-09 00:11:35 +00:00
Bob Wilson
e79354a831 Print VMOV (immediate) operands as hexadecimal values. Apple's assembler 
will not accept negative values for these.  LLVM's default operand printing
sign extends values, so that valid unsigned values appear as negative
immediates.  Print all VMOV immediate operands as hex values to resolve this.
Radar 7372576.

llvm-svn: 86301
 2009-11-06 23:33:28 +00:00
Anton Korobeynikov
9737bfedeb Do not infer the target type for COPY_TO_REGCLASS from dest regclass, this won't work if it can contain several types. Require explicit result type for the node for now. This fixes PR5364. 
PS: It seems that blackfin usage of copy_to_regclass is completely bogus!
llvm-svn: 85766
 2009-11-02 00:11:39 +00:00
Jim Grosbach
5b094f3b36 vml[as].f32 cause stalls in following advanced SIMD instructions. Avoid using 
them for scalar floating point operations for now.

llvm-svn: 85697
 2009-10-31 22:57:36 +00:00
Bob Wilson
41f94edfb0 Fix NEON VST2LN instruction encoding. 
Patch by Johnny Chen.

llvm-svn: 84767
 2009-10-21 17:54:01 +00:00
Bob Wilson
5f9ea75e2b Revert 84732. It was the wrong fix. 
llvm-svn: 84766
 2009-10-21 17:52:34 +00:00
Bob Wilson
02d3df4a87 Fix some more NEON instruction encoding problems. 
Thanks to Johnny Chen for discovering the problem.

llvm-svn: 84732
 2009-10-21 02:27:20 +00:00
Bob Wilson
e85a3142bc Leave some NEON instruction encoding bits unspecified instead of setting 
a default value of zero.  This is important for decoding the instructions.
Patch by Johnny Chen, with some changes from me, too.

llvm-svn: 84730
 2009-10-21 02:15:46 +00:00
Jim Grosbach
ea7293494f Refs: A8-598. 
Leave Inst{11-8}, which represents the starting byte index of the extracted
result in the concatenation of the operands and is left unspecified.

Patch by Johnny Chen.

llvm-svn: 84572
 2009-10-20 00:38:19 +00:00
Bob Wilson
c415e33929 Fix more NEON instruction encodings. 
Patch by Johnny Chen.

llvm-svn: 84243
 2009-10-16 03:58:44 +00:00
Bob Wilson
aa08dec009 Fix encoding bits for N3VLInt3_QHS multiclass with 8-bit elements. 
Patch by Johnny Chen.

llvm-svn: 84206
 2009-10-15 21:57:47 +00:00
Bob Wilson
db95c227fa Fix instruction encoding bits for NEON VPADAL. 
Patch by Johnny Chen.

llvm-svn: 84146
 2009-10-14 21:43:17 +00:00
Jim Grosbach
d86f233722 Inst{11-8} for vshl should be 0b0101, not 0b1111. 
Refs: A7-17 & A8-750.

Patch by Johnny Chen.

llvm-svn: 84131
 2009-10-14 20:31:01 +00:00
Bob Wilson
8092fef09a Add codegen support for NEON vst4lane intrinsics with 128-bit vectors. 
llvm-svn: 83600
 2009-10-09 00:01:36 +00:00
Bob Wilson
979cb24a81 Add codegen support for NEON vst3lane intrinsics with 128-bit vectors. 
llvm-svn: 83598
 2009-10-08 23:51:31 +00:00
Bob Wilson
233992bc56 Add codegen support for NEON vst2lane intrinsics with 128-bit vectors. 
llvm-svn: 83596
 2009-10-08 23:38:24 +00:00
Bob Wilson
5b96a53ffe Add codegen support for NEON vld4lane intrinsics with 128-bit vectors. 
Also fix some copy-and-paste errors in previous changes.

llvm-svn: 83590
 2009-10-08 22:53:57 +00:00
Bob Wilson
7209d78713 Add codegen support for NEON vld3lane intrinsics with 128-bit vectors. 
llvm-svn: 83585
 2009-10-08 22:27:33 +00:00
Bob Wilson
3a55fe2105 Add codegen support for NEON vld2lane intrinsics with 128-bit vectors. 
llvm-svn: 83568
 2009-10-08 18:56:10 +00:00
Bob Wilson
276bdabb9a Add codegen support for NEON vst4 intrinsics with <1 x i64> vectors. 
llvm-svn: 83526
 2009-10-08 05:18:18 +00:00
Bob Wilson
8aa1d328b5 Add codegen support for NEON vst3 intrinsics with <1 x i64> vectors. 
llvm-svn: 83518
 2009-10-08 00:28:28 +00:00
Bob Wilson
958e4ae815 Add codegen support for NEON vst2 intrinsics with <1 x i64> vectors. 
llvm-svn: 83513
 2009-10-08 00:21:01 +00:00
Bob Wilson
729cd181a2 Add codegen support for NEON vld4 intrinsics with <1 x i64> vectors. 
llvm-svn: 83508
 2009-10-07 23:54:04 +00:00
Bob Wilson
3cbf156518 Add codegen support for NEON vld3 intrinsics with <1 x i64> vectors. 
llvm-svn: 83506
 2009-10-07 23:39:57 +00:00
Bob Wilson
0ffa9679a5 Add codegen support for NEON vld2 intrinsics with <1 x i64> vectors. 
llvm-svn: 83502
 2009-10-07 22:57:01 +00:00
Bob Wilson
e7173601a3 Add some instruction encoding bits for NEON load/store instructions. 
llvm-svn: 83490
 2009-10-07 21:53:04 +00:00
Bob Wilson
cee91108da Add codegen support for NEON vst4 intrinsics with 128-bit vectors. 
llvm-svn: 83486
 2009-10-07 20:49:18 +00:00
Bob Wilson
af14187764 Add codegen support for NEON vst3 intrinsics with 128-bit vectors. 
llvm-svn: 83484
 2009-10-07 20:30:08 +00:00
Bob Wilson
62a3e55cea Add codegen support for NEON vst2 intrinsics with 128-bit vectors. 
llvm-svn: 83482
 2009-10-07 18:47:39 +00:00
Bob Wilson
9bb47b3e5d Add codegen support for NEON vld4 intrinsics with 128-bit vectors. 
llvm-svn: 83479
 2009-10-07 18:09:32 +00:00
Bob Wilson
b38401ccef Add codegen support for NEON vld3 intrinsics with 128-bit vectors. 
llvm-svn: 83471
 2009-10-07 17:24:55 +00:00
Bob Wilson
8cd1ea81c4 Add codegen support for NEON vld2 operations on quad registers. 
llvm-svn: 83422
 2009-10-06 22:01:59 +00:00
Bob Wilson
64ce6ef65a Add a comment to describe letters used in multiclass name suffixes. 
llvm-svn: 83257
 2009-10-03 04:44:16 +00:00
Bob Wilson
be258e083a Fix encoding problem for VMLS instruction. 
Thanks to Johnny Chen for pointing this out!

llvm-svn: 83256
 2009-10-03 04:41:21 +00:00
Evan Cheng
241092d89f Add hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq flags to ld / st multiple, 
ld / st pairs, etc.

llvm-svn: 83197
 2009-10-01 08:22:27 +00:00
David Goodwin
89f5854ddd Finish scheduling itineraries for NEON. 
llvm-svn: 82788
 2009-09-25 18:38:29 +00:00
David Goodwin
1d72b88015 Checkpoint NEON scheduling itineraries. 
llvm-svn: 82657
 2009-09-23 21:38:08 +00:00
Anton Korobeynikov
267bd0c577 Add QPR_VFP2 regclass and add copy_to_regclass nodes, where needed to 
constraint the register usage.

llvm-svn: 81635
 2009-09-12 22:21:08 +00:00