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Author SHA1 Message Date
Jim Grosbach
572868e146 ARM PKH shift ammount operand printing tweaks. 
Move the shift operator and special value (32 encoded as 0 for PKHTB) handling
into the instruction printer. This cleans up a bit of the disassembler
special casing for these instructions, more easily handles not printing the
operand at all for "lsl #0" and prepares for correct asm parsing of these
operands.

llvm-svn: 135626
 2011-07-20 21:40:26 +00:00
Eli Friedman
f98434b2c7 Bring LICM into compliance with the new "Memory Model for Concurrent Operations" in LangRef. 
llvm-svn: 135625
 2011-07-20 21:37:47 +00:00
Eli Friedman
d9ac7681be Commit LangRef changes for LLVM concurrency model. Start of supporting C++0x memory model and atomics. See thread on llvmdev titled "Reviving the new LLVM concurrency model". 
llvm-svn: 135624
 2011-07-20 21:35:53 +00:00
Francois Pichet
1b727ad694 Unbreak the MSVC build. Since the "next" function already exists in the MSVC headers, we need the explicit llvm:: qualifier to prevent a conflict. 
llvm-svn: 135623
 2011-07-20 21:35:29 +00:00
Jim Grosbach
fbaaa3ae98 Tidy up a bit. 
Move common definitions for ARM and Thumb2 into ARMInstrFormats.td and rename
them to be a bit more descriptive that they're for the PKH instructions.

llvm-svn: 135617
 2011-07-20 20:49:03 +00:00
Jim Grosbach
94a88152c9 ARM: Tidy up representation of PKH instruction. 
The shift type is implied by the instruction (PKHBT vs. PKHTB) and so shouldn't
be also encoded as part of the shift value immediate. Otherwise we're able to
represent invalid instructions, plus it needlessly complicates the
representation. Preparatory work for asm parsing of these instructions.

llvm-svn: 135616
 2011-07-20 20:32:09 +00:00
Benjamin Kramer
575cdb54f1 Fix cmake again :) 
llvm-svn: 135613
 2011-07-20 20:00:06 +00:00
Evan Cheng
c9bc5a9011 Goodbye TargetAsmInfo. This eliminate last bit of CodeGen and Target in llvm-mc. 
There is still a bit more refactoring left to do in Targets. But we are now very
close to fixing all the layering issues in MC.

llvm-svn: 135611
 2011-07-20 19:50:42 +00:00
Benjamin Kramer
73b85ba883 Fix cmake. 
llvm-svn: 135609
 2011-07-20 19:43:38 +00:00
Benjamin Kramer
6c9a683f71 Sketch out an CFG reconstruction mode for llvm-objdump. 
- Not great yet, but it's a start.
- Requires an object file with a symbol table. (I really want to fix this, but it'll need a whole new algorithm)
- ELF and COFF won't work at the moment due to libObject shortcomings.

To try it out run
$ llvm-objdump -d --cfg foo.o

This will create a graphviz file for every symbol in the object file's text section containing a CFG.

llvm-svn: 135608
 2011-07-20 19:37:35 +00:00
Eli Friedman
7776a468cf Extend the hack for _GLOBAL_OFFSET_TABLE_ slightly; PR10389. 
llvm-svn: 135607
 2011-07-20 19:36:11 +00:00
Jim Grosbach
9c558ee8ce Add parsing/encoding tests for ARM ORR instruction. 
llvm-svn: 135602
 2011-07-20 18:48:53 +00:00
Jim Grosbach
173559ac44 Consolidate ARM NOP encoding test. 
llvm-svn: 135600
 2011-07-20 18:39:38 +00:00
Jim Grosbach
a2e8523f81 ARM parsing and encoding tests for MVN 
llvm-svn: 135599
 2011-07-20 18:37:08 +00:00
Jim Grosbach
1514063b5f ARM assembly parsing of MUL instruction. 
Correctly handle 's' bit and predication suffices. Add parsing and encoding
tests.

llvm-svn: 135596
 2011-07-20 18:20:31 +00:00
Eli Friedman
3af0eb7b5f PR10421: Fix a straightforward bug in the widening logic for CONCAT_VECTORS. 
llvm-svn: 135595
 2011-07-20 18:14:33 +00:00
Benjamin Kramer
7636a9969a Initialize the EHFrameSection pointer to zero. 
This should fix the spurious buildbot errors.

llvm-svn: 135594
 2011-07-20 18:13:23 +00:00
Eric Christopher
a7456220ba Regenerate configure and friends for Chad. 
llvm-svn: 135592
 2011-07-20 17:04:49 +00:00
Jay Foad
03130446b5 Fix a GCC warning. 
llvm-svn: 135581
 2011-07-20 08:15:21 +00:00
Evan Cheng
55d7fcc5f7 - Move CodeModel from a TargetMachine global option to MCCodeGenInfo. 
- Introduce JITDefault code model. This tells targets to set different default
  code model for JIT. This eliminates the ugly hack in TargetMachine where
  code model is changed after construction.

llvm-svn: 135580
 2011-07-20 07:51:56 +00:00
Evan Cheng
abb07a0c9d Include MCRegisterInfo to eliminate a compilation warning. 
llvm-svn: 135575
 2011-07-20 06:54:19 +00:00
Francois Pichet
74e35bf8ec Fix the CMake build. 
llvm-svn: 135573
 2011-07-20 06:35:24 +00:00
Evan Cheng
380dc98371 Add MCObjectFileInfo and sink the MCSections initialization code from 
TargetLoweringObjectFileImpl down to MCObjectFileInfo.

TargetAsmInfo is done to one last method. It's *almost* gone!

llvm-svn: 135569
 2011-07-20 05:58:47 +00:00
Andrew Trick
57280c0f11 indvars: Added getInsertPointForUses to find a valid place to truncate the IV. 
llvm-svn: 135568
 2011-07-20 05:32:06 +00:00
Andrew Trick
9c4333db13 indvars -disable-iv-rewrite: Add NarrowIVDefUse to cache def-use 
info. Holding Use* pointers is bad form even though it happened to
work in this case.

llvm-svn: 135566
 2011-07-20 04:39:24 +00:00
NAKAMURA Takumi
19d48c106d X86Subtarget.h: Assume "x86_64-cygwin", though it has not been released yet, to appease test/CodeGen/X86 on cygwin. 
llvm-svn: 135564
 2011-07-20 04:02:20 +00:00
Eric Christopher
7510091996 New pointer rotate test. 
llvm-svn: 135562
 2011-07-20 03:09:11 +00:00
Eric Christopher
51af0c896c Extra semi-colon. 
llvm-svn: 135561
 2011-07-20 02:44:39 +00:00
Andrew Trick
d2b268558b indvars test case for r135558. 
llvm-svn: 135559
 2011-07-20 02:14:37 +00:00
Andrew Trick
ee2d72e5f1 indvars -disable-iv-rewrite fix: derived GEP IVs 
llvm-svn: 135558
 2011-07-20 02:08:58 +00:00
Benjamin Kramer
679af0868f Don't leak CodeGenInfos. 
llvm-svn: 135555
 2011-07-20 01:27:58 +00:00
Akira Hatanaka
a9cbfe8f88 Change name of class. 
llvm-svn: 135550
 2011-07-20 00:53:09 +00:00
Akira Hatanaka
f61c905927 Define classes for definitions of atomic instructions. 
llvm-svn: 135546
 2011-07-20 00:23:01 +00:00
Bill Wendling
f3325864ce Build and install the archive when building the Apple way. 
llvm-svn: 135538
 2011-07-19 23:33:42 +00:00
Akira Hatanaka
a50bbdfe15 Lower memory barriers to sync instructions. 
llvm-svn: 135537
 2011-07-19 23:30:50 +00:00
Evan Cheng
9a80b0a7e6 Fix an obvious typo that's preventing x86 (32-bit) from using .literal16. 
llvm-svn: 135535
 2011-07-19 23:14:32 +00:00
Eli Friedman
f809f44cf5 PR10386: Don't try to split an edge from an indirectbr. 
llvm-svn: 135534
 2011-07-19 22:59:41 +00:00
Benjamin Kramer
f5ca440fd0 Fix off-by-one. 
llvm-svn: 135533
 2011-07-19 22:59:25 +00:00
Jim Grosbach
e70c8eb49a Tweak ARM assembly parsing and printing of MSR instruction. 
The system register spec should be case insensitive. The preferred form for
output with mask values of 4, 8, and 12 references APSR rather than CPSR.
Update and tidy up tests accordingly.

llvm-svn: 135532
 2011-07-19 22:45:10 +00:00
Devang Patel
65afdd27d0 Distinguish between two copies of one inlined variable. 
llvm-svn: 135528
 2011-07-19 22:31:15 +00:00
Jim Grosbach
720b8c6578 ARM assembly parsing of MRS instruction. 
Teach the parser to recognize the APSR and SPSR system register names. Add
and update tests accordingly.

llvm-svn: 135527
 2011-07-19 21:59:29 +00:00
Owen Anderson
ad0f17c102 Enhance the FixedLengthDecoder to be able to generate plausible-looking decoders for ARM. 
llvm-svn: 135524
 2011-07-19 21:06:00 +00:00
Akira Hatanaka
cccc5fca34 Change variable name. 
llvm-svn: 135522
 2011-07-19 20:56:53 +00:00
Jim Grosbach
66af8b4a40 ARM assembly parsing for MRC/MRC2/MRRC/MRRC2. 
Add range checking to the immediate operands. Update tests accordingly.

llvm-svn: 135521
 2011-07-19 20:35:35 +00:00
Akira Hatanaka
14e517df43 Use the correct opcodes: SLLV/SRLV or AND must be used instead of SLL/SRL or 
ANDi, when the instruction does not have any immediate operands.

llvm-svn: 135520
 2011-07-19 20:34:00 +00:00
Jim Grosbach
40cce44255 Move mr[r]c[2] ARM tests and tidy up a bit. 
llvm-svn: 135517
 2011-07-19 20:28:56 +00:00
Jim Grosbach
69686aec2b ARM testcases for MOVT. 
llvm-svn: 135516
 2011-07-19 20:23:25 +00:00
Akira Hatanaka
b4db39fa83 Use descriptive variable names. 
llvm-svn: 135514
 2011-07-19 20:11:17 +00:00
Jim Grosbach
9debba28ed ARM assembly parsing for MOV (register). 
Correct the handling of the 's' suffix when parsing ARM mode. It's only a
truly separate opcode in Thumb. Add test cases to make sure we handle
the s and condition suffices correctly, including diagnostics.

llvm-svn: 135513
 2011-07-19 20:10:31 +00:00
Jim Grosbach
7e61a1ecf2 Tidy up. 
llvm-svn: 135507
 2011-07-19 19:47:11 +00:00