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Author SHA1 Message Date
Chris Lattner
6a5ace34da Refactor some code into a function 
llvm-svn: 23603
 2005-10-03 01:04:44 +00:00
Chris Lattner
5a865c8598 This break is bogus and I have no idea why it was there. Basically it prevents 
memoizing code when IV's are used by phinodes outside of loops.  In a simple
example, we were getting this code before (note that r6 and r7 are isomorphic
IV's):

        li r6, 0
        or r7, r6, r6
LBB_test_3:     ; no_exit
        lwz r2, 0(r3)
        cmpw cr0, r2, r5
        or r2, r7, r7
        beq cr0, LBB_test_5     ; loopexit
LBB_test_4:     ; endif
        addi r2, r7, 1
        addi r7, r7, 1
        addi r3, r3, 4
        addi r6, r6, 1
        cmpw cr0, r6, r4
        blt cr0, LBB_test_3     ; no_exit

Now we get:

        li r6, 0
LBB_test_3:     ; no_exit
        or r2, r6, r6
        lwz r6, 0(r3)
        cmpw cr0, r6, r5
        beq cr0, LBB_test_6     ; loopexit
LBB_test_4:     ; endif
        addi r3, r3, 4
        addi r6, r2, 1
        cmpw cr0, r6, r4
        blt cr0, LBB_test_3     ; no_exit

this was noticed in em3d.

llvm-svn: 23602
 2005-10-03 00:37:33 +00:00
Chris Lattner
af938ddbe5 when checking if we should move a split edge block outside of a loop, 
check the presplit pred, not the post-split pred.  This was causing us
to make the wrong decision in some cases, leaving the critical edge block
in the loop.

llvm-svn: 23601
 2005-10-03 00:31:52 +00:00
Chris Lattner
3a47224042 This member can be const too 
llvm-svn: 23600
 2005-10-03 00:21:25 +00:00
Chris Lattner
187d775d80 put the right labels on the data 
llvm-svn: 23599
 2005-10-02 21:51:38 +00:00
Chris Lattner
70b5f4e3fd Fix a problem where the legalizer would run out of stack space on extremely 
large basic blocks because it was purely recursive.  This switches it to an
iterative/recursive hybrid.

llvm-svn: 23596
 2005-10-02 17:49:46 +00:00
Chris Lattner
52952a665d silence a bogus warning 
llvm-svn: 23595
 2005-10-02 16:30:51 +00:00
Chris Lattner
462fe8b2cc silence some warnings 
llvm-svn: 23594
 2005-10-02 16:29:36 +00:00
Chris Lattner
51aeb8156a silence a warning 
llvm-svn: 23593
 2005-10-02 16:27:59 +00:00
Chris Lattner
d4313f30ea add patterns for float binops and fma ops 
llvm-svn: 23592
 2005-10-02 07:46:28 +00:00
Chris Lattner
efd92cf886 Sort the cpu and features table, so that the alpha backend doesn't fail EVERY 
compile with an assertion that the tables are not sorted!

llvm-svn: 23591
 2005-10-02 07:13:52 +00:00
Chris Lattner
aa1a841fc7 Add assertions to the trivial scheduler to check that the value types match 
up between defs and uses.

llvm-svn: 23590
 2005-10-02 07:10:55 +00:00
Chris Lattner
00a39b4fd5 another solution to the fsel issue. Instead of having 4 variants, just force 
the comparison to be 64-bits.  This is fine because extensions from float
to double are free.

llvm-svn: 23589
 2005-10-02 07:07:49 +00:00
Chris Lattner
efc0d24037 fsel can take a different FP type for the comparison and for the result. As such 
split the FSEL family into 4 things instead of just two.

llvm-svn: 23588
 2005-10-02 06:58:23 +00:00
Chris Lattner
f1c1042780 fix an f32/f64 type mismatch 
llvm-svn: 23587
 2005-10-02 06:37:13 +00:00
Chris Lattner
2b189d4f9e Codegen CopyFromReg using the regclass that matches the valuetype of the 
destination vreg.

llvm-svn: 23586
 2005-10-02 06:34:16 +00:00
Chris Lattner
89c435541a Adjust to change in ctor 
llvm-svn: 23585
 2005-10-02 06:23:51 +00:00
Chris Lattner
cccadf388c Emit the value type for each register class. 
llvm-svn: 23584
 2005-10-02 06:23:37 +00:00
Chris Lattner
b19d4e5584 Expose the actual valuetype of each register class 
llvm-svn: 23583
 2005-10-02 06:23:19 +00:00
Chris Lattner
b66cf00015 Minor tweak to the branch selector. When emitting a two-way branch, and if 
we're in a single-mbb loop, make sure to emit the backwards branch as the
conditional branch instead of the uncond branch.  For example, emit this:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        ble cr0, LBBl29_z__44
        b LBBl29_z__48                   *** NOT PART OF LOOP

Instead of:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        bgt cr0, LBBl29_z__48            *** PART OF LOOP!
        b LBBl29_z__44

The former sequence has one fewer dispatch group for the loop body.

llvm-svn: 23582
 2005-10-01 23:06:26 +00:00
Chris Lattner
f26486ee16 like the comment says, enable this 
llvm-svn: 23581
 2005-10-01 23:02:40 +00:00
Chris Lattner
37fdc6dbf9 Add some very paranoid checking for operand/result reg class matchup 
For instructions that define multiple results, use the right regclass
to define the result, not always the rc of result #0

llvm-svn: 23580
 2005-10-01 07:45:09 +00:00
Jeff Cohen
412582bcec Fix VC++ warnings. 
llvm-svn: 23579
 2005-10-01 03:57:14 +00:00
Chris Lattner
2f63a0f7c6 fix typo 
llvm-svn: 23578
 2005-10-01 02:51:36 +00:00
Chris Lattner
50411b1026 Modify the ppc backend to use two register classes for FP: F8RC and F4RC. 
These are used to represent float and double values, and the two regclasses
contain the same physical registers.

llvm-svn: 23577
 2005-10-01 01:35:02 +00:00
Chris Lattner
9c069d09a5 Annotate nodes with their addresses if a graph requests it. 
This is Jim's feature implemented so that graphs could 'opt-in' and get
this behavior.  This is currently used by selection dags.

llvm-svn: 23576
 2005-10-01 00:19:21 +00:00
Chris Lattner
2a439615b7 add a method 
llvm-svn: 23575
 2005-10-01 00:17:07 +00:00
Jim Laskey
532fc48d3d typo 
llvm-svn: 23574
 2005-10-01 00:08:23 +00:00
Jim Laskey
809ab88d91 1. Simplify the gathering of node groups. 
2. Printing node groups when displaying nodes.

llvm-svn: 23573
 2005-10-01 00:03:07 +00:00
Jim Laskey
94e6b5c648 Should be using flag and not chain. 
llvm-svn: 23572
 2005-09-30 23:43:37 +00:00
Nate Begeman
62fa04cd5b Remove some now-dead code. 
llvm-svn: 23571
 2005-09-30 21:28:27 +00:00
Andrew Lenharth
73913b88bb more specific tests of subtarget stuff 
llvm-svn: 23570
 2005-09-30 20:30:24 +00:00
Andrew Lenharth
901ca061fd subtarget support for CIX and FIX extentions (the only 2 I care about right now) 
llvm-svn: 23569
 2005-09-30 20:24:38 +00:00
Jim Laskey
7dcadb97aa Reverting change moving to selection dag graph. 
llvm-svn: 23568
 2005-09-30 19:33:41 +00:00
Jim Laskey
1c928ba21a Added allnodes_size for scheduling support. 
llvm-svn: 23567
 2005-09-30 19:27:01 +00:00
Jim Laskey
5e51979f90 1. Made things node-centric (from operand). 
2. Added node groups to handle flagged nodes.

3. Started weaning simple scheduling off existing emitter.

llvm-svn: 23566
 2005-09-30 19:15:27 +00:00
Jim Laskey
35efa80550 Add the node name (thus the address) to node label. 
llvm-svn: 23565
 2005-09-30 19:11:53 +00:00
Chris Lattner
c744d9398f Rename MRegisterDesc -> TargetRegisterDesc for consistency 
llvm-svn: 23564
 2005-09-30 17:49:27 +00:00
Chris Lattner
f90f3abcef Update the discussion of TargetRegisterDesc 
llvm-svn: 23563
 2005-09-30 17:46:55 +00:00
Chris Lattner
f29abb6f4a remove some more initializers 
llvm-svn: 23562
 2005-09-30 17:41:05 +00:00
Chris Lattner
661384dce6 trim down the target info structs now that we have a preferred spill register class for each callee save register 
Why is V9 maintaining these tables manually? ugh!

llvm-svn: 23561
 2005-09-30 17:38:36 +00:00
Chris Lattner
6124aae803 trim down the target info structs now that we have a preferred spill register class for each callee save register 
llvm-svn: 23560
 2005-09-30 17:35:22 +00:00
Chris Lattner
3fcb5aa250 now that we have a reg class to spill with, get this info from the regclass 
llvm-svn: 23559
 2005-09-30 17:19:22 +00:00
Chris Lattner
c3c139cc70 constant fold these calls 
llvm-svn: 23558
 2005-09-30 17:16:59 +00:00
Chris Lattner
f70bf81bb6 simplify this code using the new regclass info passed in 
llvm-svn: 23557
 2005-09-30 17:12:38 +00:00
Chris Lattner
738631f389 Now that we have getCalleeSaveRegClasses() info, use it to pass the register 
class into the spill/reload methods.  Targets can now rely on that argument.

llvm-svn: 23556
 2005-09-30 16:59:07 +00:00
Chris Lattner
18454e037b expose a new virtual method 
llvm-svn: 23555
 2005-09-30 07:06:37 +00:00
Chris Lattner
8e4d17179d stub out a virtual method 
llvm-svn: 23554
 2005-09-30 06:55:18 +00:00
Chris Lattner
2da37b0d74 Compute a preferred spill register class for each callee-save register 
llvm-svn: 23553
 2005-09-30 06:44:45 +00:00
Chris Lattner
6a87f90d17 CR registers are not used by this "target" 
llvm-svn: 23552
 2005-09-30 06:43:58 +00:00