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43163 Commits

Author SHA1 Message Date
Evan Cheng
239d9b439d Conditional moves are slightly more expensive than moves. 
llvm-svn: 118985
 2010-11-13 05:14:20 +00:00
Rafael Espindola
d2ff64abae Fix warning and add support for printing gnu_unique_object. 
llvm-svn: 118981
 2010-11-13 04:55:06 +00:00
Rafael Espindola
9cd0fd30e0 Parse and record the gnu_unique_object type. 
llvm-svn: 118980
 2010-11-13 04:51:02 +00:00
Rafael Espindola
00c5605efc Parse and remember discriminators in .loc line. I try to output them with 
another patch.
This lets us parse a bit more of the gcc 4.5 output.

llvm-svn: 118975
 2010-11-13 03:18:27 +00:00
Daniel Dunbar
fef193dc12 JIT: More nitty style tweakage, aka territory marking. 
llvm-svn: 118973
 2010-11-13 02:48:57 +00:00
Daniel Dunbar
1f695efa5e report_fatal_error: Simplify a possible ambiguity. 
llvm-svn: 118972
 2010-11-13 02:48:51 +00:00
Wesley Peck
c534d55751 1. Adding test cases for MBlaze MC disassembler. 
2. Fixing several errors in disassembler uncovered by test cases.
3. Fixing invalid encoding of PCMPEQ and PCMPNE uncovered by test cases.

llvm-svn: 118969
 2010-11-13 02:37:59 +00:00
Evan Cheng
a7d3c3d387 Add conditional move of large immediate. 
llvm-svn: 118968
 2010-11-13 02:25:14 +00:00
Jim Grosbach
cab8b12f7a Swap multiclass operand order for consistency with other patterns. 
llvm-svn: 118965
 2010-11-13 01:28:30 +00:00
Jim Grosbach
c8b3147ca5 Continue ARM indexed load refactoring. Multiclass for LDR{B} pre/post indexed 
instructions.

llvm-svn: 118963
 2010-11-13 01:07:20 +00:00
Rafael Espindola
e296fd654b Fix the encoding of negative line deltas. 
llvm-svn: 118962
 2010-11-13 01:06:27 +00:00
Daniel Dunbar
a34e9e580c Fix some more 80-col violas. 
llvm-svn: 118959
 2010-11-13 00:55:45 +00:00
Daniel Dunbar
2b1fd6592e Fix 80-col violation / non-sensicalness. 
llvm-svn: 118958
 2010-11-13 00:55:42 +00:00
Jim Grosbach
03eb1993ea More ARM load/store indexed refactoring. Also fix an incorrect IndexMode 
flag for the LDRT/STRT family instructions as a side effect.

llvm-svn: 118955
 2010-11-13 00:35:48 +00:00
Dan Gohman
a4aa69cf2a Revert r118917, which is implicated in the llvm-gcc-i386-linux-selfhost failure. 
llvm-svn: 118954
 2010-11-13 00:31:40 +00:00
Evan Cheng
a08372d4b4 Fix an obvious typo which inverted an immediate. 
llvm-svn: 118951
 2010-11-13 00:27:47 +00:00
Wesley Peck
28f124b047 1. Adding missing immediate mode asm parser test cases. 
2. Fixing improper immediate mode reverse subtract.

llvm-svn: 118948
 2010-11-13 00:03:46 +00:00
Eric Christopher
f6c7694c29 Temporarily revert this. 
llvm-svn: 118946
 2010-11-12 23:50:48 +00:00
Evan Cheng
1f5296d832 For pre-v6t2 targets, only select MOVi32imm if the immediate can be handled with movi + orr. 
llvm-svn: 118945
 2010-11-12 23:46:13 +00:00
Wesley Peck
f11db049fe Fixing improperly encoded reverse subtract instructions in MBlaze backend. 
llvm-svn: 118943
 2010-11-12 23:41:10 +00:00
Owen Anderson
053d9fb9b5 Revert r118939 while I work out why it broke some buildbots. 
llvm-svn: 118942
 2010-11-12 23:36:03 +00:00
Wesley Peck
be71f5db40 1. Finishing MBlaze MC asm parser test cases 
2. Parsing .word directive in MBlaze asm parser
3. Fixing hack where memory instructions reversed order of last two parameters
4. Fixing many improperly encoded instructions
5. Support parsing special instructions (MFS,MTS,etc.)
6. Removing unused functions from inst printer

llvm-svn: 118941
 2010-11-12 23:30:17 +00:00
Devang Patel
3dd764feda Remove DW_AT_start_scope support. It is incomplete and superseeded by location entries support. 
llvm-svn: 118940
 2010-11-12 23:20:42 +00:00
Owen Anderson
f8192cf0cc Attemt to provide correct encodings for Thumb2 binary operators. 
llvm-svn: 118939
 2010-11-12 23:18:11 +00:00
Evan Cheng
f3c75f91e9 Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either movi+orr or movw+movt depending on the subtarget. 
llvm-svn: 118938
 2010-11-12 23:03:38 +00:00
Eric Christopher
b8ee838424 Make this happen for ARM like x86. Don't entirely bail out when 
an address is in a different block, get it into a register and go
from there.

llvm-svn: 118936
 2010-11-12 22:52:32 +00:00
Evan Cheng
19f018a1be Add conditional mvn instructions. 
llvm-svn: 118935
 2010-11-12 22:42:47 +00:00
Jim Grosbach
e0ba69b81d Zap a copy/paste-o bit of dead code. 
llvm-svn: 118926
 2010-11-12 21:29:10 +00:00
Jim Grosbach
eaaf8294a5 Refactor to parameterize some ARM load/store encoding patterns. Preparatory 
to splitting the load/store pre/post indexed instructions into [r, r] and
[r, imm] forms.

llvm-svn: 118925
 2010-11-12 21:28:15 +00:00
Owen Anderson
f1ffc8fdc9 First stab at providing correct Thumb2 encodings, start with adc. 
llvm-svn: 118924
 2010-11-12 21:12:40 +00:00
Duncan Sands
29593ddf27 Have GVN simplify instructions as it goes. For example, consider 
"%z = %x and %y".  If GVN can prove that %y equals %x, then it turns
this into "%z = %x and %x".  With the new code, %z will be replaced
with %x everywhere (and then deleted).  Previously %z would be value
numbered too, which is a waste of time.  Also, while a clever value
numbering algorithm would give %z the same value number as %x, our
current one doesn't do so (at least I don't think it does).  The new
logic has an essentially equivalent effect to what you would get if
%z was given the same value number as %x, i.e. it should make value
numbering smarter.  While there, get hold of target data once at the
start rather than a gazillion times all over the place.

llvm-svn: 118923
 2010-11-12 21:10:24 +00:00
Evan Cheng
b565d1acf9 Add some missing isel predicates on def : pat patterns to avoid generating VFP vmla / vmls (they cause stalls). Disabling them in isel is properly not a right solution, I'll look into a proper solution next. 
llvm-svn: 118922
 2010-11-12 20:32:20 +00:00
Jim Grosbach
160cc37f73 Kill more unused stuff. 
llvm-svn: 118921
 2010-11-12 19:27:45 +00:00
Benjamin Kramer
b4c0c4211e MCELF: Copy the symbol name only if we're going to modify it. 
llvm-svn: 118920
 2010-11-12 19:26:04 +00:00
Jim Grosbach
8bb507dd6b Remove unused class. 
llvm-svn: 118919
 2010-11-12 19:24:53 +00:00
Dan Gohman
8b86287a06 When the definition of an address value is in a different block 
from the user of the address, fall back to just using the
address in a register instead of bailing out of fast-isel
altogether.

llvm-svn: 118917
 2010-11-12 19:14:00 +00:00
Chris Lattner
2a70c4e38a accept lret as an alias for lretl, fixing the reopened part of PR8592 
llvm-svn: 118916
 2010-11-12 18:54:56 +00:00
Rafael Espindola
77cad43f26 Remove what looks like dead code in the production of debug lines. 
We only produce debug line information if we have seen a line directive, so
this code is dead. Also, if we want to be bug by bug compatible with
gas and sometimes produce "empty" .debug_line sections, this will
match the content produced by gas.

llvm-svn: 118914
 2010-11-12 18:41:26 +00:00
Andrew Trick
68d533cca4 typo (4th checkin for one fix) 
llvm-svn: 118913
 2010-11-12 18:36:03 +00:00
Jim Grosbach
f9d1b45754 Fill in the default predication bits for ARM unconditional branch. 
llvm-svn: 118907
 2010-11-12 18:13:26 +00:00
Jim Grosbach
cbab1ea04e Encoding for ARM LDRSB instructions. 
llvm-svn: 118905
 2010-11-12 17:52:59 +00:00
Andrew Trick
d0c919dcad Fixes PR8287: SD scheduling time. The fix is a failsafe that prevents 
catastrophic compilation time in the event of unreasonable LLVM
IR. Code quality is a separate issue--someone upstream needs to do a
better job of reducing to llvm.memcpy. If the situation can be reproduced with
any supported frontend, then it will be a separate bug.

llvm-svn: 118904
 2010-11-12 17:50:46 +00:00
Chris Lattner
612039e538 implement PR8592: empirically "lretq" is a "lret" with a rex.w prefix. 
llvm-svn: 118903
 2010-11-12 17:41:20 +00:00
Chris Lattner
bcdb696f6c tidy up. 
llvm-svn: 118896
 2010-11-12 17:24:29 +00:00
Rafael Espindola
dc54b2b285 gnu as support both % and @ before types, do the same. 
llvm-svn: 118893
 2010-11-12 15:47:08 +00:00
Dan Gohman
ec55b3ac75 Re-disable TBAA for now; it broke MultiSource/Applications/JM/lencod, 
at least.

llvm-svn: 118890
 2010-11-12 11:21:08 +00:00
Kalle Raiskila
f89d0d0389 Fix memory access lowering on SPU, adding 
support for the case where alignment<value size.

These cases were silently miscompiled before this patch.
Now they are overly verbose -especially storing is- and
any front-end should still avoid misaligned memory 
accesses as much as possible. The bit juggling algorithm
added here probably has some room for improvement still.

llvm-svn: 118889
 2010-11-12 10:14:03 +00:00
Eric Christopher
1ca7518097 Fix up a few more spots of addrmode2 (or not) changes that were 
missed. Update some comments accordingly.

Fixes rdar://8652289

llvm-svn: 118888
 2010-11-12 09:48:30 +00:00
Dan Gohman
f867bfd906 Enable TBAA. 
llvm-svn: 118884
 2010-11-12 06:20:01 +00:00
Lang Hames
b10e4b99e3 Fix some style issues in PBQP. Patch by David Blaikie. 
llvm-svn: 118883
 2010-11-12 05:47:21 +00:00
Dan Gohman
bc5a716f10 Enhance DSE to handle the case where a free call makes more than 
one store dead. This is especially noticeable in
SingleSource/Benchmarks/Shootout/objinst.

llvm-svn: 118875
 2010-11-12 02:19:17 +00:00
Dale Johannesen
659061fcd3 Remove possibly useful info from comment, per Chris. 
llvm-svn: 118865
 2010-11-12 00:43:18 +00:00
Bruno Cardoso Lopes
37f2439cbd Enable mips32 mul instruction. Patch by Akira Hatanaka <ahatanaka@mips.com> 
llvm-svn: 118864
 2010-11-12 00:38:32 +00:00
Jim Grosbach
f00a6faa17 Start of support for binary emit of 16-it Thumb instructions. 
llvm-svn: 118859
 2010-11-11 23:41:09 +00:00
Owen Anderson
85cf1b8ff5 Fill out support for Thumb2 encodings of NEON instructions. 
llvm-svn: 118854
 2010-11-11 23:12:55 +00:00
Wesley Peck
7974f4c201 The BRK instruction in the MicroBlaze is a branch-and-link. 
llvm-svn: 118848
 2010-11-11 22:21:08 +00:00
Nick Lewycky
1acee08e53 Doxygenify 
llvm-svn: 118846
 2010-11-11 21:51:44 +00:00
Dan Gohman
f3bf6591e0 Add helper functions for computing the Location of load, store, 
and vaarg instructions.

llvm-svn: 118845
 2010-11-11 21:50:19 +00:00
Wesley Peck
0e937ae80d Fix tblgen instruction errors exposed by MC asm parser tests 
Fix minimum 16-bit signed value error exposed by MC asm parser tests
Add initial MC asm parser tests for the MBlaze backend

llvm-svn: 118844
 2010-11-11 21:40:53 +00:00
Owen Anderson
0913dac245 Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. 
llvm-svn: 118843
 2010-11-11 21:36:43 +00:00
Dan Gohman
97ce60bfa4 Don't forget the TBAA info, if available. 
llvm-svn: 118842
 2010-11-11 21:27:26 +00:00
Dan Gohman
b20b7d2ec2 Factor out Instruction::isSafeToSpeculativelyExecute's code for 
testing for dereferenceable pointers into a helper function,
isDereferenceablePointer.  Teach it how to reason about GEPs
with simple non-zero indices.

Also eliminate ArgumentPromtion's IsAlwaysValidPointer,
which didn't check for weak externals or out of range gep
indices.

llvm-svn: 118840
 2010-11-11 21:23:25 +00:00
Eric Christopher
474a93ff76 Revert the accidental commit I made reverting the previous commit. 
llvm-svn: 118835
 2010-11-11 20:50:14 +00:00
Jim Grosbach
b48a272807 Trailing whitespace. 
llvm-svn: 118831
 2010-11-11 20:16:23 +00:00
Jim Grosbach
cc8e5dc0c6 ARM fixup encoding for direct call instructions (BL). 
llvm-svn: 118829
 2010-11-11 20:05:40 +00:00
Eric Christopher
e7f27cf66a Revert this temporarily. 
llvm-svn: 118827
 2010-11-11 19:47:02 +00:00
Eric Christopher
beb7a50acb Change the prologue and epilogue to use push/pop for the low ARM registers. 
llvm-svn: 118823
 2010-11-11 19:26:03 +00:00
Dan Gohman
b68f197748 Avoid calling alias on non-pointer values. 
llvm-svn: 118822
 2010-11-11 19:23:51 +00:00
Owen Anderson
f43f09f6f6 Add support for Thumb2 encodings of NEON data processing instructions, using the new PostEncoderMethod infrastructure. 
More tests to come.

llvm-svn: 118819
 2010-11-11 19:07:48 +00:00
Rafael Espindola
1725702868 Mark labels declared in tls sections as STT_TLS. This matches the behavior of 
gas.

llvm-svn: 118818
 2010-11-11 19:04:55 +00:00
Wesley Peck
9ad36509f8 Fixed some bugs in MBlaze asm parser that were introduced when removing OwningPtrs from the code. 
llvm-svn: 118807
 2010-11-11 18:41:33 +00:00
Chris Lattner
b3eff154cd add a note 
llvm-svn: 118806
 2010-11-11 18:23:57 +00:00
Rafael Espindola
8555d32c9e Initial comdat implementation. 
llvm-svn: 118805
 2010-11-11 18:13:52 +00:00
Dan Gohman
7c6a63aea3 TBAA-enable ArgumentPromotion. 
llvm-svn: 118804
 2010-11-11 18:09:32 +00:00
Dan Gohman
d88f1d63ac Add a FIXME comment. 
llvm-svn: 118803
 2010-11-11 18:08:43 +00:00
Jim Grosbach
abf0e10ea0 Encoding of destination fixup for ARM branch and conditional branch 
instructions.

llvm-svn: 118801
 2010-11-11 18:04:49 +00:00
Andrew Trick
5e77065d78 Check TRI->getReservedRegs because other allocators do it. Even though 
it makes no sense for allocation_order iterators to visit reserved regs.
The inline spiller depends on AliasAnalysis.
Manage the Query state to avoid uninitialized or stale results.

llvm-svn: 118800
 2010-11-11 17:46:29 +00:00
Rafael Espindola
f7b3bb84e8 Make AliasedSymbol able to handle MCTargetExpr. They can get here if 
a weakref is used with a VariantKind.

llvm-svn: 118798
 2010-11-11 17:24:43 +00:00
Chris Lattner
3514fa6b11 add pr# 
llvm-svn: 118797
 2010-11-11 17:17:56 +00:00
Jim Grosbach
cfc32e3b5a Encoding for ARM LDRSH_POST. 
llvm-svn: 118794
 2010-11-11 16:55:29 +00:00
Rafael Espindola
f1ee36c3a3 Fix the symbol index of weak references. Also make RecordRelocation a bit 
easier to read by having const references to the symbol, aliased symbol and
renamed symbol.

llvm-svn: 118793
 2010-11-11 16:48:11 +00:00
Dan Gohman
9f805118c3 Include ImmutablePass passes in -debug-pass=Arguments. 
llvm-svn: 118790
 2010-11-11 16:32:17 +00:00
Dan Gohman
8e986f9c2f Remove the memmove->memcpy optimization from CodeGen. MemCpyOpt does this. 
llvm-svn: 118789
 2010-11-11 16:24:49 +00:00
Dan Gohman
01ed16d764 Make Sink tbaa-aware. 
llvm-svn: 118788
 2010-11-11 16:21:47 +00:00
Dan Gohman
4a432aa7bc It's safe to sink some instructions which are not safe to speculatively 
execute. Make Sink's predicate more precise.

llvm-svn: 118787
 2010-11-11 16:20:28 +00:00
Rafael Espindola
5766346831 Remove some explicit arguments to getELFSection. This is 
a leftover from the removal of isExplicit.

llvm-svn: 118774
 2010-11-11 03:40:25 +00:00
Jim Grosbach
8cb10f8def Encoding for ARM LDRSH and LDRSH_PRE. Cannonicalize operand names. 
llvm-svn: 118767
 2010-11-11 01:55:59 +00:00
Jim Grosbach
b86e183a33 Fix encoding of Ra register for ARM smla* instructions. 
llvm-svn: 118761
 2010-11-11 01:27:41 +00:00
Jim Grosbach
3b13f9013c ARM STRH encoding information. 
llvm-svn: 118757
 2010-11-11 01:09:40 +00:00
Jakob Stoklund Olesen
e7e1f14d50 Delete SplittingSpiller. It was not being used by anyone, and it is being 
superceded by SplitKit.

llvm-svn: 118754
 2010-11-11 00:52:44 +00:00
Dan Gohman
50936c7c4b It's not necessary to clear out the Size and TBAATag at each of 
these points.

llvm-svn: 118752
 2010-11-11 00:42:22 +00:00
Dan Gohman
b476dc0f55 Set NonLocalDepInfo's Size field to UnknownSize when invalidating 
it, so that it doesn't appear to be a known size.

llvm-svn: 118748
 2010-11-11 00:20:27 +00:00
Jakob Stoklund Olesen
313b78d28e Insert two blank SlotIndexes between basic blocks instead of just one. 
This is the first small step towards using closed intervals for liveness instead
of the half-open intervals we're using now.

We want to be able to distinguish between a SlotIndex that represents a variable
being live-out of a basic block, and an index representing a variable live-in to
its successor.

That requires two separate indexes between blocks. One for live-outs and one for
live-ins.

With this change, getMBBEndIdx(MBB).getPrevSlot() becomes stable so it stays
greater than any instructions inserted at the end of MBB.

llvm-svn: 118747
 2010-11-11 00:19:20 +00:00
Jakob Stoklund Olesen
2f72fda7ef No need to add liveness that's already there. 
llvm-svn: 118742
 2010-11-10 23:56:00 +00:00
Jakob Stoklund Olesen
6a63cbe06d Hook up AliasAnalysis in InlineSpiller. This is used for rematerializing 
constant loads.

llvm-svn: 118741
 2010-11-10 23:55:56 +00:00
Jim Grosbach
2c1d6373ab Move LDM predicate operand encoding into base clase. Add STM missing STM 
encoding bits.

llvm-svn: 118738
 2010-11-10 23:44:32 +00:00
Jim Grosbach
ad037e5ded ARM LDM encoding for the mode (ia, ib, da, db) operand. 
llvm-svn: 118736
 2010-11-10 23:38:36 +00:00
Rafael Espindola
6ee5a9491d Factor some code into WriteSection. 
llvm-svn: 118733
 2010-11-10 23:36:59 +00:00
Jim Grosbach
ef95eee920 Fix ARM encoding of non-return LDM instructions. 
llvm-svn: 118732
 2010-11-10 23:18:49 +00:00
Jim Grosbach
d832c84199 Fix ARM encoding of LDM+Return instruction. 
llvm-svn: 118730
 2010-11-10 23:12:48 +00:00