Commit Graph

1721 Commits

Author SHA1 Message Date
Evan Cheng
0e82270ff2 Matches MachineInstr changes.
llvm-svn: 31712
2006-11-13 23:36:35 +00:00
Chris Lattner
81ea2c7c0a teach the g5 hazard recognizer about update loads. This fixes
Ptrdist/anagram among others.

llvm-svn: 31708
2006-11-13 20:11:06 +00:00
Jim Laskey
d692c1a0ab Make sure stack link is set in 64-bit.
llvm-svn: 31690
2006-11-11 22:22:07 +00:00
Chris Lattner
b5aefe29ae implement proper PPC64 prolog/epilog codegen.
llvm-svn: 31684
2006-11-11 19:05:28 +00:00
Jim Laskey
f5bffa5670 Running with frame pointers prevented debugging, external probes and
potentially some system calls/exception handling from working.  TOS must always
link to previous frame.  This is a short term workaround until alloca scheme is
reworked.

llvm-svn: 31677
2006-11-11 10:21:58 +00:00
Chris Lattner
1409347c13 allow the offset of a preinc'd load to be the low-part of a global. This
produces this clever code:

_millisecs:
        lis r2, ha16(_Time.1182)
        lwzu r3, lo16(_Time.1182)(r2)
        lwz r2, 4(r2)
        addic r4, r2, 1
        addze r3, r3
        blr

instead of this:

_millisecs:
        lis r2, ha16(_Time.1182)
        la r3, lo16(_Time.1182)(r2)
        lwz r2, lo16(_Time.1182)(r2)
        lwz r3, 4(r3)
        addic r4, r3, 1
        addze r3, r2
        blr

for:

long %millisecs() {
        %tmp = load long* %Time.1182            ; <long> [#uses=1]
        %tmp1 = add long %tmp, 1                ; <long> [#uses=1]
        ret long %tmp1
}

llvm-svn: 31673
2006-11-11 04:53:30 +00:00
Chris Lattner
3d48461071 Mark operands as symbol lo instead of imm32 so that they print lo(x) around
globals.

llvm-svn: 31672
2006-11-11 04:51:36 +00:00
Chris Lattner
9c5d395b0e ppc64 doesn't have lwau, don't attempt to form it.
llvm-svn: 31656
2006-11-11 00:08:42 +00:00
Chris Lattner
1aaa5f904c implement preinc support for r+i loads on ppc64
llvm-svn: 31654
2006-11-10 23:58:45 +00:00
Chris Lattner
5e975945a5 dform 8/9 are identical to dform 1
llvm-svn: 31637
2006-11-10 17:51:02 +00:00
Chris Lattner
1604b6a873 add an initial cut at preinc loads for ppc32. This is broken for ppc64
(because the 64-bit reg target versions aren't implemented yet), doesn't
support r+r addr modes, and doesn't handle stores, but it works otherwise. :)

This is disabled unless -enable-ppc-preinc is passed to llc for now.

llvm-svn: 31621
2006-11-10 02:08:47 +00:00
Chris Lattner
15c49af63f add note about ugly codegen with preinc
llvm-svn: 31617
2006-11-10 01:33:53 +00:00
Evan Cheng
d7df1a37bc PPC supports i32 / i64 pre-inc load / store.
llvm-svn: 31599
2006-11-09 19:11:50 +00:00
Evan Cheng
89ee587963 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
llvm-svn: 31595
2006-11-09 17:55:04 +00:00
Evan Cheng
736a8eb3cd Match tblegen changes.
llvm-svn: 31571
2006-11-08 20:34:28 +00:00
Chris Lattner
bd39c99fd1 Refactor all the addressing mode selection stuff into the isel lowering
class, where it can be used for preinc formation.

llvm-svn: 31536
2006-11-08 02:15:41 +00:00
Chris Lattner
35fb10e1a4 correct the (currently unused) pattern for lwzu.
llvm-svn: 31535
2006-11-08 02:13:12 +00:00
Chris Lattner
f64e5f5f3e add a note from viterbi
llvm-svn: 31506
2006-11-07 18:30:21 +00:00
Chris Lattner
bed20e1a25 fix encoding of BLR
llvm-svn: 31485
2006-11-07 01:51:50 +00:00
Chris Lattner
a193c9c977 encode BLR predicate info for the JIT
llvm-svn: 31450
2006-11-04 05:42:48 +00:00
Chris Lattner
a7687f805c Go through all kinds of trouble to mark 'blr' as having a predicate operand
that takes a register and condition code.  Print these pieces of BLR the
right way, even though it is currently set to 'always'.

Next up: get the JIT encoding right, then enhance branch folding to produce
predicated blr for simple examples.

llvm-svn: 31449
2006-11-04 05:27:39 +00:00
Chris Lattner
db04ba8502 Describe PPC predicates, which are a pair of CR# and condition.
llvm-svn: 31438
2006-11-03 23:53:25 +00:00
Chris Lattner
5f953f0927 remove dead vars
llvm-svn: 31433
2006-11-03 23:46:45 +00:00
Chris Lattner
d0b2340384 fix a bug reid noticed
llvm-svn: 31385
2006-11-02 23:39:53 +00:00
Reid Spencer
4bafa71dc1 For PR786:
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.

llvm-svn: 31380
2006-11-02 20:25:50 +00:00
Chris Lattner
38c04a6bd6 Implement the getRegForInlineAsmConstraint method for PPC. With recent
sdisel changes, this eliminates a ton of copies around common inline asms.
For example:

int test2(int Y, int X) {
  asm("foo %0, %1" : "=r"(X): "r"(X));
  return X;
}

now compiles to:

_test2:
        foo r3, r4
        blr

instead of:

_test2:
        mr r2, r4
        foo r2, r2
        mr r3, r2
        blr

GCC produces:

_test2:
        foo r4, r4
        mr r3,r4
        blr

llvm-svn: 31367
2006-11-02 01:44:04 +00:00
Chris Lattner
d9afd310a6 Change the prototype for TargetLowering::isOperandValidForConstraint
llvm-svn: 31318
2006-10-31 19:40:43 +00:00
Anton Korobeynikov
e6ba8a819c 1. Clean up code due to changes in SwitchTo*Section(2)
2. Added partial debug support for mingw\cygwin targets (the same as
   Linux\ELF). Please note, that currently mingw\cygwin uses 'stabs' format
   for storing debug info by default, thus many (runtime) libraries has
   this information included. These formats shouldn't be mixed in one binary
   ('stabs' & 'DWARF'), otherwise binutils tools will be confused.

llvm-svn: 31311
2006-10-31 08:31:24 +00:00
Chris Lattner
ed0b1b4b24 fix miscompilation of llvm.isunordered, where we branched on the opposite
condition.  This fixes miscompilation of Olden/bh and many others.

llvm-svn: 31301
2006-10-30 23:02:25 +00:00
Evan Cheng
5766dd6455 All targets expand BR_JT for now.
llvm-svn: 31294
2006-10-30 08:02:39 +00:00
Chris Lattner
a478e05437 implement the BlockHasNoFallThrough hook
llvm-svn: 31264
2006-10-28 17:35:02 +00:00
Evan Cheng
b60a58362a Doh. Must check if GV is constant first before putting it in .cstring.
llvm-svn: 31253
2006-10-28 05:56:51 +00:00
Chris Lattner
c94f21143f don't dist internal readme's
llvm-svn: 31246
2006-10-28 00:49:54 +00:00
Chris Lattner
838d0cbb0a this doesn't occur any more in mason
llvm-svn: 31236
2006-10-27 22:02:19 +00:00
Chris Lattner
6fe4efd730 the code in question is now:
cmpw cr0, r7, r3
        ble cr0, LBB1_5 ;bb25
LBB1_8: ;bb17
        cmpw cr0, r8, r5
        bgt cr0, LBB1_2 ;bb

which is just as good as crnand.

llvm-svn: 31235
2006-10-27 22:00:55 +00:00
Evan Cheng
65e78f3d08 Place cstrings in .cstring section.
llvm-svn: 31207
2006-10-26 21:48:57 +00:00
Devang Patel
0691019e12 Move getPreferredAlignmentLog from AsmPrinter to TargetData
llvm-svn: 31171
2006-10-24 20:32:14 +00:00
Chris Lattner
e38c95d2a3 Add intrinsics for the rest of the DCB* instructions.
llvm-svn: 31148
2006-10-24 01:08:42 +00:00
Chris Lattner
a9adb1e558 Implement support for branch reversal, fix a bug in branch analysis.
This provides stuff like:

        cmpw cr0, r15, r29
        mr r14, r15
-       bge cr0, LBB3_111       ;bb656
-       b LBB3_90       ;bb501
+       blt cr0, LBB3_90        ;bb501
 LBB3_111:      ;bb656
        lwz r18, 68(r1)

which is particularly good for dispatch group formation.

llvm-svn: 31101
2006-10-21 06:03:11 +00:00
Chris Lattner
20bb8bfd45 Simplify code, no functionality change
llvm-svn: 31097
2006-10-21 05:42:09 +00:00
Chris Lattner
d3e583b2e1 implement support for inserting a cond branch
llvm-svn: 31096
2006-10-21 05:36:13 +00:00
Chris Lattner
0f686ec438 set the ppc64 stack pointer right, dynamic alloca now works for ppc64
llvm-svn: 31028
2006-10-18 01:20:43 +00:00
Chris Lattner
6c403f7102 Expand alloca for ppc64
llvm-svn: 31027
2006-10-18 01:18:48 +00:00
Chris Lattner
7353b07275 expose DWARF_LABEL opcode# so the branch folder can update debug info properly.
llvm-svn: 31024
2006-10-17 22:41:45 +00:00
Chris Lattner
bf15d2f503 add support for inserting an uncond branch
llvm-svn: 31003
2006-10-17 18:06:55 +00:00
Jim Laskey
d266d999cb Use S_debug for dwarf info.
llvm-svn: 30994
2006-10-17 11:30:57 +00:00
Chris Lattner
b90d66b7da implement branch inspection/modification methods.
llvm-svn: 30946
2006-10-13 21:21:17 +00:00
Evan Cheng
fe5bb5dbe6 Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
llvm-svn: 30945
2006-10-13 21:14:26 +00:00
Chris Lattner
b22754853b add note
llvm-svn: 30937
2006-10-13 20:20:58 +00:00
Chris Lattner
14f18d4896 set isBarrier correctly
llvm-svn: 30936
2006-10-13 19:10:34 +00:00
Chris Lattner
a3f4e611a4 Correctly handle instruction separators.
llvm-svn: 30935
2006-10-13 17:56:02 +00:00
Chris Lattner
e4e8893807 mark adjcallstack up/down as clobbering and using the SP
llvm-svn: 30908
2006-10-12 17:56:34 +00:00
Evan Cheng
ca66f49574 Add properties to ComplexPattern.
llvm-svn: 30891
2006-10-11 21:03:53 +00:00
Evan Cheng
d22f3dd3ed Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
llvm-svn: 30844
2006-10-09 20:57:25 +00:00
Evan Cheng
275825195a Make use of getStore().
llvm-svn: 30759
2006-10-05 23:01:46 +00:00
Chris Lattner
08da1a510d Don't bother setting JumpTableTextSection, it is about to disappear
llvm-svn: 30745
2006-10-05 03:13:59 +00:00
Chris Lattner
068190eb91 Pass the MachineFunction into EmitJumpTableInfo.
llvm-svn: 30742
2006-10-05 03:01:21 +00:00
Chris Lattner
ca844c6695 Move getSectionForFunction to AsmPrinter, change it to return a string.
llvm-svn: 30735
2006-10-05 02:42:20 +00:00
Chris Lattner
0ca8a69c28 implement DarwinTargetAsmInfo::getSectionForFunction, use it when outputting
function bodies

llvm-svn: 30733
2006-10-05 00:35:50 +00:00
Chris Lattner
2e10b0c095 emit jump table before debug info
llvm-svn: 30731
2006-10-05 00:26:05 +00:00
Chris Lattner
dd6343bd8d Always emit the jump table after the function so it's part of the same 'atom'
as the function body.

llvm-svn: 30730
2006-10-05 00:24:46 +00:00
Evan Cheng
494e8e6971 Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
extra operand to LOADX to specify the exact value extension type.

llvm-svn: 30714
2006-10-04 00:56:09 +00:00
Chris Lattner
b3b7cf3be6 wrap long lines
llvm-svn: 30662
2006-09-28 23:32:43 +00:00
Chris Lattner
c1adb2f1d3 Shift amounts are always 32-bits, even in 64-bit mode. This fixes
CodeGen/PowerPC/2006-09-28-shift_64.ll

llvm-svn: 30652
2006-09-28 20:48:45 +00:00
Chris Lattner
26213b40aa Use abstract private/comment directives, to increase portability to ppc/linux
llvm-svn: 30621
2006-09-27 02:55:21 +00:00
Chris Lattner
09176ab54f Compile:
int x __attribute__((used));

to:

        .data
.comm _x,4              ; 'x'
        .no_dead_strip  _x

on both x86 and ppc darwin targets.

llvm-svn: 30605
2006-09-26 03:39:53 +00:00
Nate Begeman
7bcce1a7f6 Fold AND and ROTL more often
llvm-svn: 30577
2006-09-22 05:01:56 +00:00
Chris Lattner
663748827c The DarwinAsmPrinter need not check for isDarwin. createPPCAsmPrinterPass
should create the right asmprinter subclass.

llvm-svn: 30542
2006-09-20 17:12:19 +00:00
Chris Lattner
6d66264a5f Wrap some darwin'isms with isDarwin checks.
llvm-svn: 30541
2006-09-20 17:07:15 +00:00
Chris Lattner
6b434ee662 item done
llvm-svn: 30518
2006-09-20 06:41:56 +00:00
Chris Lattner
102718b1b2 This is already done
llvm-svn: 30512
2006-09-20 04:59:33 +00:00
Chris Lattner
4d97247875 Improve PPC64 equality comparisons like PPC32 comparisons.
llvm-svn: 30510
2006-09-20 04:33:27 +00:00
Chris Lattner
69390a3f80 Two improvements:
1. Codegen this comparison:
     if (X == 0x8000)

as:

        cmplwi cr0, r3, 32768
        bne cr0, LBB1_2 ;cond_next

instead of:

        lis r2, 0
        ori r2, r2, 32768
        cmpw cr0, r3, r2
        bne cr0, LBB1_2 ;cond_next


2. Codegen this comparison:
      if (X == 0x12345678)

as:

        xoris r2, r3, 4660
        cmplwi cr0, r2, 22136
        bne cr0, LBB1_2 ;cond_next

instead of:

        lis r2, 4660
        ori r2, r2, 22136
        cmpw cr0, r3, r2
        bne cr0, LBB1_2 ;cond_next

llvm-svn: 30509
2006-09-20 04:25:47 +00:00
Chris Lattner
ee42b9ae24 Add a note that we should match rlwnm better
llvm-svn: 30508
2006-09-20 03:59:25 +00:00
Chris Lattner
3057944738 Legalize is no longer limited to cleverness with just constant shift amounts.
Allow it to be clever when possible and fall back to the gross code when needed.

This allows us to compile:

long long foo1(long long X, int C) {
  return X << (C|32);
}
long long foo2(long long X, int C) {
  return X << (C&~32);
}

to:
_foo1:
        rlwinm r2, r5, 0, 27, 31
        slw r3, r4, r2
        li r4, 0
        blr


        .globl  _foo2
        .align  4
_foo2:
        rlwinm r2, r5, 0, 27, 25
        subfic r5, r2, 32
        slw r3, r3, r2
        srw r5, r4, r5
        or r3, r3, r5
        slw r4, r4, r2
        blr

instead of:

_foo1:
        ori r2, r5, 32
        subfic r5, r2, 32
        addi r6, r2, -32
        srw r5, r4, r5
        slw r3, r3, r2
        slw r6, r4, r6
        or r3, r3, r5
        slw r4, r4, r2
        or r3, r3, r6
        blr


        .globl  _foo2
        .align  4
_foo2:
        rlwinm r2, r5, 0, 27, 25
        subfic r5, r2, 32
        addi r6, r2, -32
        srw r5, r4, r5
        slw r3, r3, r2
        slw r6, r4, r6
        or r3, r3, r5
        slw r4, r4, r2
        or r3, r3, r6
        blr

llvm-svn: 30507
2006-09-20 03:47:40 +00:00
Chris Lattner
92c8924309 Fold the PPCISD shifts when presented with 0 inputs. This occurs for code
like:
long long test(long long X, int Y) {
  return 1ULL << Y;
}
long long test2(long long X, int Y) {
  return -1LL << Y;
}

which we used to compile to:

_test:
        li r2, 1
        subfic r3, r5, 32
        li r4, 0
        addi r6, r5, -32
        srw r3, r2, r3
        slw r4, r4, r5
        slw r6, r2, r6
        or r3, r4, r3
        slw r4, r2, r5
        or r3, r3, r6
        blr
_test2:
        li r2, -1
        subfic r3, r5, 32
        addi r6, r5, -32
        srw r3, r2, r3
        slw r4, r2, r5
        slw r2, r2, r6
        or r3, r4, r3
        or r3, r3, r2
        blr

Now we produce:

_test:
        li r2, 1
        addi r3, r5, -32
        subfic r4, r5, 32
        slw r3, r2, r3
        srw r4, r2, r4
        or r3, r4, r3
        slw r4, r2, r5
        blr
_test2:
        li r2, -1
        subfic r3, r5, 32
        addi r6, r5, -32
        srw r3, r2, r3
        slw r4, r2, r5
        slw r2, r2, r6
        or r3, r4, r3
        or r3, r3, r2
        blr

llvm-svn: 30479
2006-09-19 05:22:59 +00:00
Chris Lattner
ce85ffa396 add a note
llvm-svn: 30377
2006-09-14 20:56:30 +00:00
Evan Cheng
dd52a60189 Reflects MachineConstantPoolEntry changes.
llvm-svn: 30279
2006-09-12 21:04:05 +00:00
Nate Begeman
1109e4a222 Behold, more work on relocations. Things are looking pretty good now.
llvm-svn: 30240
2006-09-10 23:03:44 +00:00
Nate Begeman
2dfa13e74f First pass at supporting relocations. Relocations are written correctly to
the file now, however the relocated address is currently wrong.  Fixing
that will require some deep pondering.

llvm-svn: 30207
2006-09-08 22:42:09 +00:00
Jim Laskey
8cbf601f06 Missing tab
llvm-svn: 30188
2006-09-08 13:06:56 +00:00
Nate Begeman
bb053826f9 We actually do support object file writing, so don't return true (error)
llvm-svn: 30173
2006-09-08 03:42:15 +00:00
Jim Laskey
160a8aa339 1. Remove condition on delete.
2. Protect and outline createTargetAsmInfo.

3. Misc. kruft.

llvm-svn: 30169
2006-09-07 23:39:26 +00:00
Jim Laskey
9da25f6119 Make target asm info a property of the target machine.
llvm-svn: 30162
2006-09-07 22:06:40 +00:00
Jim Laskey
a64fe8ccf2 Break out target asm info into separate files.
llvm-svn: 30161
2006-09-07 22:05:02 +00:00
Jim Laskey
6b86ef852c Separate target specific asm properties from the asm printers.
llvm-svn: 30126
2006-09-06 18:34:40 +00:00
Chris Lattner
9cd4e3429e Completely eliminate def&use operands. Now a register operand is EITHER a
def operand or a use operand.

llvm-svn: 30109
2006-09-05 02:31:13 +00:00
Chris Lattner
33c9ddc91d Completely rearchitect the interface between targets and the pass manager.
This pass:

1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
   output, move all this to common code, and give targets hooks they can
   implement.
3. Commonalize the target population stuff between file emission and JIT
   emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
   paves the way for "fast -O0" stuff in the CFE later, and now LLC could
   lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
   scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
   touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
   which is now orthogonal to the fact that JIT'ing is being done.

llvm-svn: 30081
2006-09-04 04:14:57 +00:00
Chris Lattner
fb12884be6 Simplify target construction.
llvm-svn: 30070
2006-09-03 18:44:02 +00:00
Jim Laskey
d44e9493e6 Handle callee saved registers in dwarf frame info (lead up to exception
handling.)

llvm-svn: 29954
2006-08-29 16:24:26 +00:00
Nate Begeman
a67a1ec1cd Make ppc64 jit kinda work right. About 2/3 of Olden passes with this,
there are clearly some encoding bugs lurking in there somewhere.

llvm-svn: 29949
2006-08-29 02:30:59 +00:00
Reid Spencer
2567610703 For PR387:
Close out this long standing bug by removing the remaining overloaded
virtual functions in LLVM. The -Woverloaded-virtual option is now turned on.

llvm-svn: 29934
2006-08-28 01:02:49 +00:00
Chris Lattner
33bd5dcfb7 s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|
llvm-svn: 29911
2006-08-27 12:54:02 +00:00
Evan Cheng
a6f81f1863 Do not use getTargetNode() and SelectNodeTo() which takes more than 3
SDOperand arguments. Use the variants which take an array and number instead.

llvm-svn: 29907
2006-08-27 08:14:06 +00:00
Evan Cheng
1c3d571e4b SelectNodeTo now returns a SDNode*.
llvm-svn: 29901
2006-08-26 08:00:10 +00:00
Evan Cheng
2db7799507 Select() no longer require Result operand by reference.
llvm-svn: 29898
2006-08-26 05:34:46 +00:00
Evan Cheng
b246ad7b2f Match tblgen changes.
llvm-svn: 29895
2006-08-26 01:07:58 +00:00
Evan Cheng
92239fd096 Add a comment.
llvm-svn: 29889
2006-08-25 23:29:06 +00:00
Evan Cheng
ccbb645459 Encode pc-relative conditional branch offset as pc+(num of bytes / 4). The
asm printer will print it as offset*4. e.g. bne cr0, $+8.

The PPC code emitter was expecting the offset to be number of instructions, not
number of bytes. This fixes a whole bunch of JIT failures.

llvm-svn: 29885
2006-08-25 21:54:44 +00:00
Jim Laskey
c5bcc6d451 Fix some comments.
llvm-svn: 29880
2006-08-25 19:40:59 +00:00
Nate Begeman
1268d6cd46 Initial checkin of the Mach-O emitter. There's plenty of fixmes, but it
does emit linkable .o files in very simple cases.

llvm-svn: 29850
2006-08-23 21:08:52 +00:00
Chris Lattner
db290f7479 Constify some methods. Patch provided by Anton Vayvod, thanks!
llvm-svn: 29756
2006-08-17 22:00:08 +00:00
Chris Lattner
2c12a719c0 Fix PowerPC/2006-08-15-SelectionCrash.ll and simplify selection code.
llvm-svn: 29715
2006-08-15 23:48:22 +00:00
Nate Begeman
0e92042770 Emit .set directives for jump table entries when possible, which reduces
the number of relocations in object files, shrinkifying them.

llvm-svn: 29650
2006-08-12 21:29:52 +00:00
Chris Lattner
c482a5d057 Fix a bug in a recent refactoring that broke a bunch of stuff.
llvm-svn: 29649
2006-08-12 07:20:05 +00:00
Chris Lattner
8ca6e82bce Eliminate use of getNode that takes a vector.
llvm-svn: 29614
2006-08-11 17:38:39 +00:00
Chris Lattner
2f9c4426fc Convert vectors to fixed sized arrays and smallvectors. Eliminate use of getNode that takes a vector.
llvm-svn: 29609
2006-08-11 17:18:05 +00:00
Chris Lattner
7e905fba17 Fix miscompilation of float vector returns. Compile code to this:
_func:
        vsldoi v2, v3, v2, 12
        vsldoi v2, v2, v2, 4
        blr

instead of:

_func:
        vsldoi v2, v3, v2, 12
        vsldoi v2, v2, v2, 4
***     vor f1, v2, v2
        blr

llvm-svn: 29607
2006-08-11 16:47:32 +00:00
Evan Cheng
6053206580 Match tablegen changes.
llvm-svn: 29604
2006-08-11 09:08:15 +00:00
Evan Cheng
34a49551f5 CALLSEQ_* produces chain even if that's not needed.
llvm-svn: 29603
2006-08-11 09:03:33 +00:00
Chris Lattner
7b1362fa52 Start eliminating temporary vectors used to create DAG nodes. Instead, pass
in the start of an array and a count of operands where applicable.  In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap.  In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.

I updated a lot of code calling getNode that takes a vector, but ran out of
time.  The rest of the code should be updated, and these methods should be
removed.

We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.

It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.

llvm-svn: 29566
2006-08-08 02:23:42 +00:00
Evan Cheng
d18be1d9c1 Match tablegen isel changes.
llvm-svn: 29549
2006-08-07 22:28:20 +00:00
Chris Lattner
51e1b75fba Fix some ppc64 issues with vector code.
llvm-svn: 29384
2006-07-28 16:45:47 +00:00
Evan Cheng
3b5f1c6248 Remove InFlightSet hack. No longer needed.
llvm-svn: 29373
2006-07-28 00:47:19 +00:00
Evan Cheng
4ceeac4159 Resolve BB references with relocation.
llvm-svn: 29351
2006-07-27 18:21:10 +00:00
Evan Cheng
f363ae6ebd synchronizeICache removeed from TargetJITInfo.
llvm-svn: 29348
2006-07-27 17:33:48 +00:00
Evan Cheng
e869883c2d Remove NodeDepth
llvm-svn: 29338
2006-07-27 06:40:15 +00:00
Nate Begeman
3d5f5b4e8b Support jump tables when in PIC relocation model
llvm-svn: 29318
2006-07-27 01:13:04 +00:00
Chris Lattner
b4165c39d7 Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC.
llvm-svn: 29307
2006-07-26 21:12:04 +00:00
Evan Cheng
beeb4e5c8c - Refactor the code that resolve basic block references to a TargetJITInfo
method.
- Added synchronizeICache() to TargetJITInfo. It is called after each block
  of code is emitted to flush the icache. This ensures correct execution
  on targets that have separate dcache and icache.
- Added PPC / Mac OS X specific code to do icache flushing.

llvm-svn: 29276
2006-07-25 20:40:54 +00:00
Chris Lattner
0f4e4b1bcb bswapped load/store instructions are only availble in indexed addressing form.
As such, use xoaddr (indexed only), not xaddr for address selection.

This fixes CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll, a crash compiling lencod.

llvm-svn: 29208
2006-07-19 17:15:36 +00:00
Chris Lattner
5985b77fae Make the implicit def instructions look like other instrs.
llvm-svn: 29174
2006-07-18 16:33:26 +00:00
Chris Lattner
f022962081 Remove what little AIX support we have. It has never been tested and isn't
complete.

llvm-svn: 29156
2006-07-15 01:24:23 +00:00
Chris Lattner
ff8ee5486f Add missing PPC64 extload/truncstores
llvm-svn: 29140
2006-07-14 04:42:02 +00:00
Chris Lattner
9aafd2b441 Add a note
llvm-svn: 29139
2006-07-14 04:07:29 +00:00
Chris Lattner
5c489bce2c Another fix in the rotate encodings, needed when the first two operands are not
the same.

llvm-svn: 29136
2006-07-13 21:52:41 +00:00
Chris Lattner
753e4f5984 Print negative immediates as negative values instead of large constants
when using the immshifted addressing mode.

llvm-svn: 29130
2006-07-12 23:24:02 +00:00
Chris Lattner
726ca018c0 Fix encoding of rotates, such as rldicl
llvm-svn: 29128
2006-07-12 22:08:13 +00:00
Chris Lattner
024af03a3c Implement PPC64 relocations types
llvm-svn: 29125
2006-07-12 21:23:20 +00:00
Chris Lattner
c9be3277e7 An overaggressive #ifdef allows a function to fall off the bottom of the
function instead of returning a value.  This sometimes allowed the ppc32 jit
to be used in 64-bit mode.

llvm-svn: 29123
2006-07-12 20:42:10 +00:00
Chris Lattner
fd9cbcab4a The PPC64 JIT needs register numbers to encode instructions.
llvm-svn: 29114
2006-07-11 20:53:55 +00:00
Jim Laskey
4c0d841280 Ensure that dump calls that are associated with asserts are removed from
non-debug build.

llvm-svn: 29105
2006-07-11 17:58:07 +00:00
Chris Lattner
2db97248f8 In 64-bit mode, 64-bit GPRs are callee saved, not 32-bit ones.
llvm-svn: 29096
2006-07-11 00:48:23 +00:00
Chris Lattner
abaaddc214 Implement Regression/CodeGen/PowerPC/bswap-load-store.ll by folding bswaps
into i16/i32 load/stores.

llvm-svn: 29089
2006-07-10 20:56:58 +00:00
Chris Lattner
da960e218f Undisable ppc64 jit
llvm-svn: 29011
2006-07-06 17:10:42 +00:00
Chris Lattner
496bd3fbf6 Use hidden visibility to make symbols in an anonymous namespace get
dropped.  This shrinks libllvmgcc.dylib another 67K

llvm-svn: 28975
2006-06-28 23:17:24 +00:00
Chris Lattner
26f1985fdc shrink libllvmgcc.dylib another 25K
llvm-svn: 28971
2006-06-28 22:00:36 +00:00
Chris Lattner
852423b469 Don't match 64-bit bitfield inserts into rlwimi's. todo add rldimi. :)
llvm-svn: 28944
2006-06-27 21:08:52 +00:00
Chris Lattner
d7b1f61e72 Fix ppc64 jump tables
llvm-svn: 28941
2006-06-27 20:46:17 +00:00
Chris Lattner
01965c2fd8 Print stubs for external globals right.
llvm-svn: 28936
2006-06-27 20:20:53 +00:00
Chris Lattner
2c3f67f6a7 Implement 64-bit select, bswap, etc.
llvm-svn: 28935
2006-06-27 20:14:52 +00:00
Chris Lattner
86c7ca4fd4 Add a pattern for i64 sra. Print 8-byte units with a space between the .quad
and the data

llvm-svn: 28934
2006-06-27 20:07:26 +00:00
Chris Lattner
3422f47382 Fix rewriting frame offsets with ixaddr instructions, which implicitly shift
the offset two bits to the left.

llvm-svn: 28933
2006-06-27 18:55:49 +00:00
Chris Lattner
8569f4042d PPC doesn't have bit converts to/from i64
llvm-svn: 28932
2006-06-27 18:40:08 +00:00
Chris Lattner
da08df5d8a Add 64-bit MTCTR so that indirect calls work.
llvm-svn: 28931
2006-06-27 18:36:44 +00:00
Chris Lattner
20959f59cd Fix an incorrect store pattern. This fixes em3d.
llvm-svn: 28930
2006-06-27 18:22:50 +00:00
Chris Lattner
26f2bd4d4b Implement 64-bit undef, sub, shl/shr, srem/urem
llvm-svn: 28929
2006-06-27 18:18:41 +00:00
Chris Lattner
b4a636f966 Use i32 for shift amounts instead of i64. This gets bisort working.
llvm-svn: 28927
2006-06-27 17:34:57 +00:00
Chris Lattner
01182783c4 Add zextload from i32 -> i64, with this, perimeter works.
llvm-svn: 28926
2006-06-27 17:30:08 +00:00
Chris Lattner
10e71f60df Print darwin stub stuff correctly in 64-bit mode. With this, treeadd works in
ppc64 mode!

llvm-svn: 28923
2006-06-27 01:02:25 +00:00