Commit Graph

175176 Commits

Author SHA1 Message Date
David Green
98c302baef [ARM] Ensure we update the correct flags in the peephole optimiser
The Arm peephole optimiser code keeps track of both an MI and a SubAdd that can
be used to optimise away a CMP. In the rare case that both are found and not
ruled-out as valid, we could end up setting the flags on the wrong one.

Instead make sure we are using SubAdd if it exists, as it will be closer to the
CMP.

The testcase here is a little theoretical, with a dead def of cpsr. It should
hopefully show the point.

Differential Revision: https://reviews.llvm.org/D58176

llvm-svn: 354018
2019-02-14 11:09:24 +00:00
Andrew Ng
0955af957b [Support] Fix TempFile::discard to not leave behind temporary files
Moved the remove of the temporary file to after the close to avoid
remove failures caused by ETXTBSY errors.

This issue was seen when FileOutputBuffer falls back to an in memory
buffer due to the inability to mmap the on disk file. This occurred when
running LLD on an Ubuntu VM in VirtualBox on a Windows host attempting
to write the output to a VirtualBox shared folder.

Differential Revision: https://reviews.llvm.org/D57960

llvm-svn: 354017
2019-02-14 11:08:49 +00:00
Max Kazantsev
e30a2a03e8 [NFC] Refactor LICM code for better readability
llvm-svn: 354013
2019-02-14 09:04:12 +00:00
Fangrui Song
461aeaa778 [llvm-readobj][test] Add all GNU_PROPERTY_X86_FEATURE_2_{NEEDED,USED} bits
And delete trailing whitespace

llvm-svn: 354011
2019-02-14 07:52:51 +00:00
Douglas Yung
b6c17e2857 Relax test to check for a valid number instead of a specific number
to be like every other check in this test.

llvm-svn: 354007
2019-02-14 04:11:09 +00:00
Craig Topper
89420abcaa [X86] Make (f80 (sint_to_fp (i16))) use fistps/fisttps instead of fistpl/fisttpl when SSE is enabled.
When SSE is enabled sint_to_fp with i16 is blindly promoted to i32, but that changes the behavior of f80 conversion.

Move the promotion to i16 to LowerFP_TO_INT so we can limit it based on the floating point type.

llvm-svn: 354003
2019-02-14 01:41:43 +00:00
Matthew Voss
e79e227d55 Revert "[llvm-objdump] Allow short options without arguments to be grouped"
Reverted due to failures on the llvm-hexagon-elf.

This reverts commit 77e1f27476c89f65eeb496d131065177e6417f23.

llvm-svn: 354002
2019-02-14 01:39:43 +00:00
Matthew Voss
174bace66f [llvm-objdump] Allow short options without arguments to be grouped
Summary:

https://bugs.llvm.org/show_bug.cgi?id=31679

Reviewers: kristina, jhenderson, grimar, jakehehrlich, rupprecht

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57904

llvm-svn: 353998
2019-02-14 00:39:40 +00:00
Daniel Sanders
1d717fab8b [globalisel][combine] Split existing rules into a match and apply step
Summary:
The declarative tablegen definitions split rules into match and apply steps.
Prepare for that by doing the same in the C++ implementations. This aids
some of the migration effort while the tablegen version is incomplete.

Reviewers: bogner, volkan, aditya_nandakumar, paquette, aemerson

Reviewed By: aditya_nandakumar

Subscribers: rovka, kristof.beyls, Petar.Avramovic, jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58150

llvm-svn: 353996
2019-02-14 00:15:28 +00:00
Jordan Rupprecht
088fd9a6ad [llvm-ar][libObject] Fix relative paths when nesting thin archives.
Summary:
When adding one thin archive to another, we currently chop off the relative path to the flattened members. For instance, when adding `foo/child.a` (which contains `x.txt`) to `parent.a`, when flattening it we should add it as `foo/x.txt` (which exists) instead of `x.txt` (which does not exist).

As a note, this also undoes the `IsNew` parameter of handling relative paths in r288280. The unit test there still passes.

This was reported as part of testing the kernel build with llvm-ar: https://patchwork.kernel.org/patch/10767545/ (see the second point).

Reviewers: mstorsjo, pcc, ruiu, davide, david2050, inglorion

Reviewed By: ruiu

Subscribers: void, jdoerfert, tpimh, mgorny, hans, nickdesaulniers, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57842

llvm-svn: 353995
2019-02-13 23:39:41 +00:00
Stefan Pintilie
c5fe150312 [PowerPC][NFC] Added tests for prologue and epilogue code gen.
Added four test files to check the existing behaviour of prologue
and epilogue code generation. This patch was done as a setup for
the upcoming patch listed on Phabricator that will change how the
prologue and epilogue work.
The upcoming patch is: https://reviews.llvm.org/D42590

llvm-svn: 353994
2019-02-13 23:37:23 +00:00
Sanjay Patel
c5938dae95 [ConstProp] add IR tests to show miscompiles; NFC
A fix for these is proposed in D51216.

llvm-svn: 353992
2019-02-13 23:27:31 +00:00
Fangrui Song
aa6ef5a3d2 [llvm-readobj] Dump GNU_PROPERTY_X86_ISA_1_{NEEDED,USED} notes in .note.gnu.property
Reviewers: grimar, rupprecht

Reviewed By: rupprecht

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58175

llvm-svn: 353991
2019-02-13 23:18:05 +00:00
Philip Reames
17e2ed961b [SelectionDAG] Inline a single use helper function, and remove last non-MMO interface [NFC]
For D57601, we need to know whether the instruction is volatile.  We'd either have to pass yet another parameter, or just standardize on the MMO interface.  I chose the second.

llvm-svn: 353989
2019-02-13 23:01:11 +00:00
Mark Lacey
c3c7e5c75a [RegAllocGreedy] Take last chance recoloring into account in evicting.
Last chance recoloring inserts into FixedRegisters those virtual
registers it is attempting to assign a physical register to.

We must consider these when we consider candidates for eviction so that
we do not end up evicting something while we are attempting to recolor
to assign it.

This is hitting in an out-of-tree target and no longer reproduces on
trunk. That does not appear to be a result of it having been fixed, but
rather, it appears that optimization changes and/or other changes to
register allocation mask the problem.

I haven't found a way to come up with a reasonable test case for this
(i.e. one that I can actually commit to open source, is reasonable
in size, and actually reproduces the issue).

rdar://problem/45708741

llvm-svn: 353988
2019-02-13 22:56:43 +00:00
Dylan McKay
86a979d26b [AVR] Fix a typo - 's/analisys/analysis'
llvm-svn: 353987
2019-02-13 22:31:37 +00:00
Thomas Lively
6e069afba3 [WebAssembly] memory.fill
Summary:
memset lowering, fix argument types in memcpy lowering, and
test encodings. Depends on D57736.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57791

llvm-svn: 353986
2019-02-13 22:25:18 +00:00
Leonard Chan
9cbbc6a096 [NewPM] Second attempt at porting ASan
This is the second attempt to port ASan to new PM after D52739. This takes the
initialization requried by ASan from the Module by moving it into a separate
class with it's own analysis that the new PM ASan can use.

Changes:
- Split AddressSanitizer into 2 passes: 1 for the instrumentation on the
  function, and 1 for the pass itself which creates an instance of the first
  during it's run. The same is done for AddressSanitizerModule.
- Add new PM AddressSanitizer and AddressSanitizerModule.
- Add legacy and new PM analyses for reading data needed to initialize ASan with.
- Removed DominatorTree dependency from ASan since it was unused.
- Move GlobalsMetadata and ShadowMapping out of anonymous namespace since the
  new PM analysis holds these 2 classes and will need to expose them.

Differential Revision: https://reviews.llvm.org/D56470

llvm-svn: 353985
2019-02-13 22:22:48 +00:00
Thomas Lively
dd6cadae89 [WebAssembly] Bulk memory intrinsics and builtins
Summary:
implements llvm intrinsics and clang intrinsics for
memory.init and data.drop.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D57736

llvm-svn: 353983
2019-02-13 22:11:16 +00:00
Serge Guelton
a27afd3444 Revert r353962
Specialization of Optional for trivially copyable types yields failure on the buildbots I fail to reproduce locally.
Better safe than sorry, reverting.

llvm-svn: 353982
2019-02-13 22:11:09 +00:00
Peter Collingbourne
91b33a7106 gn build: Merge r353957.
llvm-svn: 353980
2019-02-13 21:03:23 +00:00
Philip Reames
99a3eaf486 [SelectionDAG] Kill last uses of getAtomic w/o a MMO operand [NFC]
The helper function was used by only two callers, and largely ended up providing distinct functionality based on optional arguments and opcode.  Inline and simply to make the functionality much more clear.

llvm-svn: 353977
2019-02-13 20:42:59 +00:00
Craig Topper
a873634ae5 [X86] Add 'mpx' to getHostCPUFeatures.
llvm-svn: 353974
2019-02-13 20:12:41 +00:00
Vedant Kumar
0101aea30b [CodeExtractor] Only lift lifetime markers present in the extraction region
When CodeExtractor finds liftime markers referencing inputs to the
extraction region, it lifts these markers out of the region and inserts
them around the call to the extracted function (see r350420, PR39671).

However, it should *only* lift lifetime markers that are actually
present in the extraction region. I.e., if a start marker is present in
the extraction region but a corresponding end marker isn't (or vice
versa), only the start marker (or end marker, resp.) should be lifted.

Differential Revision: https://reviews.llvm.org/D57834

llvm-svn: 353973
2019-02-13 19:53:38 +00:00
Philip Reames
9b9fbf59c5 [Tests] More unordered atomic lowering tests
This time, focused around narrowing and widening transformations.  Also, include a few simple memory optimization tests to highlight missed oppurtunities.  This is part of building up the test base for D57601.

llvm-svn: 353972
2019-02-13 19:49:17 +00:00
Philip Reames
b784551971 [Tests] RMW folding tests w/unordered atomic operations
We get a suprising number of these today actually, but some are missed. The main point of this is strengthen the test set for D57601.

llvm-svn: 353966
2019-02-13 18:41:54 +00:00
Philip Reames
85da1dee3a [Tests] Add a bunch of tests for load folding w/unordered atomics
llvm-svn: 353964
2019-02-13 18:26:01 +00:00
Craig Topper
56a7c4aaac [X86] Add 'fxsr' to the getHostCPUFeatures detection code.
We implicitly mark this feature as enabled when the target is 64-bits, but our detection code for -march=native didn't support it so you can't detect it on 32-bit targets.

llvm-svn: 353963
2019-02-13 18:21:36 +00:00
Serge Guelton
6a3f368498 Re-commit rL353927, patch included
Make llvm::Optional<T> trivially copyable when T is trivially copyable

This is an ever-recurring issue (see https://bugs.llvm.org/show_bug.cgi?id=39427 and https://bugs.llvm.org/show_bug.cgi?id=35978)
but I believe that thanks to https://reviews.llvm.org/D54472 we can now ship a decent implementation of this.

Basically the fact that llvm::is_trivially_copyable has a consistent behavior across compilers should prevent any ABI issue,
and using in-place new instead of memcpy should keep compiler bugs away.

This patch is slightly different from the original revision https://reviews.llvm.org/rL353927 but achieves the same goal. It just avoids
going through std::conditional which may the code more explicit.

llvm-svn: 353962
2019-02-13 18:12:04 +00:00
Philip Reames
605c7d4f6e [Tests] First batch of cornercase tests for unordered atomics
Mixture of things we legally can't do, and things we're missing.  Once D57601 is in, the later will serve as a punch list.

llvm-svn: 353959
2019-02-13 18:00:58 +00:00
Philip Reames
0141965fd5 [Tests] Auto update a test
llvm-svn: 353958
2019-02-13 17:30:03 +00:00
Petr Hosek
469dd5010d [AArch64] Support reserving arbitrary general purpose registers
This is a follow up to D48580 and D48581 which allows reserving
arbitrary general purpose registers with the exception of registers
with special purpose (X8, X16-X18, X29, X30) and registers used by LLVM
(X0, X19). This change also generalizes some of the existing logic to
rely entirely on values generated from tablegen.

Differential Revision: https://reviews.llvm.org/D56305

llvm-svn: 353957
2019-02-13 17:28:47 +00:00
Philip Reames
4423122ce4 [Tests] Rename some test files for consistency
Most are named "atomic-something" so rename the few which were "atomic_something".  I keep typing the wrong name due to the inconsistency.  :)

llvm-svn: 353956
2019-02-13 17:23:11 +00:00
Jeremy Morse
da95363843 [DebugInfo][DAG] Either salvage dangling debug info or emit Undef DBG_VALUEs
In this patch SelectionDAG tries to salvage any dbg.values that are going to be
dropped, in case they can be recovered from Values in the current BB. It also
strengthens SelectionDAGs handling of dangling debug data, so that dbg.values
are *always* emitted (as Undef or otherwise) instead of dangling forever.

The motivation behind this patch exists in the new test case: a memory address
(here a bitcast and GEP) exist in one basic block, and a dbg.value referring to
the address is left in the 'next' block. The base pointer is live across all
basic blocks. In current llvm trunk the dbg.value cannot be encoded, and it
isn't even emitted as an Undef DBG_VALUE.

The change is simply: if we're definitely going to drop a dbg.value, repeatedly
apply salvageDebugInfo to its operand until either we find something that can
be encoded, or we can't salvage any further in which case we produce an Undef
DBG_VALUE. To know when we're "definitely going to drop a dbg.value",
SelectionDAG signals SelectionDAGBuilder when all IR instructions have been
encoded to force salvaging. This ensures that any dbg.value that's dangling
after DAG creation will have a corresponding DBG_VALUE encoded. 

Differential Revision: https://reviews.llvm.org/D57694

llvm-svn: 353954
2019-02-13 16:33:05 +00:00
Simon Pilgrim
1617115844 [X86][AVX] Add shuffle_v8i32_0dcd3f14 shuffle test case
llvm-svn: 353953
2019-02-13 16:12:36 +00:00
Fangrui Song
9ae96f09ec [llvm-readobj] Rename pr_data to PrData
As requested by grimar in D58112.

llvm-svn: 353951
2019-02-13 15:58:23 +00:00
Jeremy Morse
30f940d3a2 [DebugInfo][DAG] Refactor dbg.value lowering into its own method
This is a pure copy-and-paste job, moving the logic for lowering dbg.value
intrinsics to SDDbgValues into its own function. This is ahead of adding some
more users of this logic.

Differential Revision: https://reviews.llvm.org/D57697

llvm-svn: 353950
2019-02-13 15:53:10 +00:00
Andrea Di Biagio
dac58ab03c [MCA] Store a bitmask of used groups in the instruction descriptor.
This is to speedup 'checkAvailability' queries in class ResourceManager.
No functional change intended.

llvm-svn: 353949
2019-02-13 14:56:06 +00:00
Jeremy Morse
8ab46a79dd [DebugInfo][DAG] Limit special-casing of dbg.values for Arguments
SelectionDAGBuilder has special handling for dbg.value intrinsics that are
understood to define the location of function parameters on entry to the
function. To enable this, we avoid recording a dbg.value as a virtual register
reference if it might be such a parameter, so that it later hits
EmitFuncArgumentDbgValue.

This patch reduces the set of circumstances where we avoid recording a
dbg.value as a virtual register reference, to allow more "normal" variables
to be recorded that way. We now only bypass for potential parameters if:
 * The dbg.value operand is an Argument,
 * The Variable is a parameter, and
 * The Variable is not inlined.
meaning it's very likely that the dbg.value is a function-entry parameter
location.

Differential Revision: https://reviews.llvm.org/D57584

llvm-svn: 353948
2019-02-13 13:37:33 +00:00
Max Kazantsev
4f37a6f343 [NFC] Add const qualifiers where possible
llvm-svn: 353941
2019-02-13 11:54:45 +00:00
Serge Guelton
b303bcb9be Revert r353927
llvm-svn: 353940
2019-02-13 11:35:45 +00:00
Diana Picus
900536995e [ARM GlobalISel] Support G_SELECT for Thumb2
Same as arm mode, but slightly different opcodes.

llvm-svn: 353938
2019-02-13 11:25:32 +00:00
Andrea Di Biagio
d467ca94d2 [MCA][Scheduler] Use latency information to further classify busy instructions.
This patch introduces a new instruction stage named 'IS_PENDING'.
An instruction transitions from the IS_DISPATCHED to the IS_PENDING stage if
input registers are not available, but their latency is known.

This patch also adds a new set of instructions named 'PendingSet' to class
Scheduler. The idea is that the PendingSet will only contain instructions that
have reached the IS_PENDING stage.
By construction, an instruction in the PendingSet is only dependent on
instructions that have already reached the execution stage. The plan is to use
this knowledge to identify bottlenecks caused by data dependencies (see
PR37494).

Differential Revision: https://reviews.llvm.org/D58066

llvm-svn: 353937
2019-02-13 11:02:42 +00:00
Jeremy Morse
bf0bf632c1 [DebugInfo][InstCombine] Prefer to salvage debuginfo over sinking it
When instcombine sinks an instruction between two basic blocks, it sinks any
dbg.value users in the source block with it, to prevent debug use-before-free.
However we can do better by attempting to salvage the debug users, which would
avoid moving where the variable location changes. If we successfully salvage,
still sink a (cloned) dbg.value with the sunk instruction, as the sunk
instruction is more likely to be "live" later in the compilation process.

If we can't salvage dbg.value users of a sunk instruction, mark the dbg.values
in the original block as being undef. This terminates any earlier variable
location range, and represents the fact that we've optimized out the variable
location for a portion of the program.

Differential Revision: https://reviews.llvm.org/D56788

llvm-svn: 353936
2019-02-13 10:54:53 +00:00
Serge Guelton
00030ece69 Missing header
llvm-svn: 353933
2019-02-13 10:19:06 +00:00
Max Kazantsev
2a0f4003db [GuardWidening] Support widening of explicitly expressed guards
This patch adds support of guards expressed in explicit form via
`widenable_condition` in Guard Widening pass.

Differential Revision: https://reviews.llvm.org/D56075
Reviewed By: reames

llvm-svn: 353932
2019-02-13 09:56:30 +00:00
David Stenberg
001f947270 [DebugInfo] Stop changing labels for register-described parameter DBG_VALUEs
Summary:
This is a follow-up to D57510. This patch stops DebugHandlerBase from
changing the starting label for the first non-overlapping,
register-described parameter DBG_VALUEs to the beginning of the
function. That code did not consider what defined the registers, which
could result in the ranges for the debug values starting before their
defining instructions. We currently do not emit debug values for
constant values directly at the start of the function, so this code is
still useful for such values, but my intention is to remove the code
from DebugHandlerBase completely when we get there. One reason for
removing it is that the code violates the history map's ranges, which I
think can make it quite confusing when troubleshooting.

In D57510, PrologEpilogInserter was amended so that parameter DBG_VALUEs
now are kept at the start of the entry block, even after emission of
prologue code. That was done to reduce the degradation of debug
completeness from this patch. PR40638 is another example, where the
lexical-scope trimming that LDV does, in combination with scheduling,
results in instructions after the prologue being left without locations.
There might be other cases where the DBG_VALUEs are pushed further down,
for which the DebugHandlerBase code may be helpful, but as it now quite
often result in incorrect locations, even after the prologue, it seems
better to remove that code, and try to work our way up with accurate
locations.

In the long run we should maybe not aim to provide accurate locations
inside the prologue. Some single location descriptions, at least those
referring to stack values, generate inaccurate values inside the
epilogue, so we maybe should not aim to achieve accuracy for location
lists. However, it seems that we now emit line number programs that can
result in GDB and LLDB stopping inside the prologue when doing line
number stepping into functions. See PR40188 for more information.

A summary of some of the changed test cases is available in PR40188#c2.

Reviewers: aprantl, dblaikie, rnk, jmorse

Reviewed By: aprantl

Subscribers: jdoerfert, jholewinski, jvesely, javed.absar, llvm-commits

Tags: #debug-info, #llvm

Differential Revision: https://reviews.llvm.org/D57511

llvm-svn: 353928
2019-02-13 09:34:07 +00:00
Serge Guelton
920e69d8bf Make llvm::Optional<T> trivially copyable when T is trivially copyable
This is an ever-recurring issue (see https://bugs.llvm.org/show_bug.cgi?id=39427 and https://bugs.llvm.org/show_bug.cgi?id=35978)
but I believe that thanks to https://reviews.llvm.org/D54472 we can now ship a decent implementation of this.

Basically the fact that llvm::is_trivially_copyable has a consistent behavior across compilers should prevent any ABI issue,
and using in-place new instead of memcpy should keep compiler bugs away.

Differential Revision: https://reviews.llvm.org/D57097

llvm-svn: 353927
2019-02-13 09:31:22 +00:00
Michal Gorny
ef8b9cdabe [llvm] [cmake] Provide split include paths in LLVMConfig
Modify LLVMConfig to provide split variables for in-source and generated
include paths.  Currently, it uses a single value for both
LLVM_INCLUDE_DIRS and LLVM_INCLUDE_DIR which works for install tree but
fails hard at build tree (where LLVM_INCLUDE_DIR incorrectly contains
multiple values).

Instead, put the generated directory in LLVM_INCLUDE_DIR, and the source
tree in LLVM_MAIN_INCLUDE_DIR which is consistent with in-LLVM builds.
For install tree, both variables will have the same value.

Differential Revision: https://reviews.llvm.org/D58109

llvm-svn: 353924
2019-02-13 08:34:40 +00:00
Anton Afanasyev
9be8140057 [X86][SLP] Enable SLP vectorization for 128-bit horizontal X86 instructions (add, sub)
Try to use 64-bit SLP vectorization. In addition to horizontal instrs
this change triggers optimizations for partial vector operations (for instance,
using low halfs of 128-bit registers xmm0 and xmm1 to multiply <2 x float> by
<2 x float>).

Fixes llvm.org/PR32433

llvm-svn: 353923
2019-02-13 08:26:43 +00:00